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Author SHA1 Message Date
Evan Cheng
e5b7a3a09f Silence compiler warnings. 
llvm-svn: 117128
 2010-10-22 18:57:05 +00:00
Owen Anderson
ada2b33321 Provide correct NEON encodings for vmla. 
llvm-svn: 117126
 2010-10-22 18:54:37 +00:00
Michael J. Spencer
8daaefa006 Endian: Get rid of LLVM_IS_HOST_BIG_ENDIAN. 
llvm-svn: 117124
 2010-10-22 18:45:12 +00:00
Stuart Hastings
772bf86028 Temporarily revert r117079; it broke a tester. Radar 6635085. 
llvm-svn: 117122
 2010-10-22 18:44:22 +00:00
Jim Grosbach
ca2897a0ca More ARM multiply instuction binary encodings. 
llvm-svn: 117121
 2010-10-22 18:35:16 +00:00
Evan Cheng
efac5b5f8d Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now. 
llvm-svn: 117119
 2010-10-22 18:23:05 +00:00
Owen Anderson
399ec622e4 Add testscases for encoding of NEON vdqmull. 
llvm-svn: 117115
 2010-10-22 17:57:37 +00:00
Jim Grosbach
eabb7c5bd1 Parameterize a bit of ARM encoding information, simplifying some instruction 
definitions.

llvm-svn: 117114
 2010-10-22 17:42:06 +00:00
Oscar Fuentes
b7f2510588 Avoid stalled file dependency when tablegenning. 
Patch by Frits van Bommel!

llvm-svn: 117113
 2010-10-22 17:37:42 +00:00
Benjamin Kramer
9e988fe81e Make some symbols static, move classes into anonymous namespaces. 
llvm-svn: 117111
 2010-10-22 17:35:07 +00:00
Oscar Fuentes
bd0ca690c8 Don't try to guess svn version when current path is a symlink. 
See PR 8473.

llvm-svn: 117109
 2010-10-22 17:16:26 +00:00
Jim Grosbach
0ae6bf8095 More ARM multiply instruction encoding information. 
llvm-svn: 117108
 2010-10-22 17:16:17 +00:00
Oscar Fuentes
e9b7aa0d30 Teach CMake to only touch tablegen-generated files if anything 
actually changed.

Patch by Frits van Bommel!

llvm-svn: 117102
 2010-10-22 16:20:10 +00:00
Wesley Peck
488027efa3 Making the e_machine configurable by the target backend in ELFObjectWriter. 
llvm-svn: 117099
 2010-10-22 15:52:49 +00:00
NAKAMURA Takumi
4c7d031a0d lli: On Cygwin-1.5, lli crashes at invoking destructors in atexit handler. 
llvm-svn: 117095
 2010-10-22 14:53:59 +00:00
Peter Collingbourne
e43dd89068 Standardise all build-mode affecting {EN,DIS}ABLE_* make options to 
test equality to 1, and fix/update documentation to reflect this

llvm-svn: 117094
 2010-10-22 12:54:34 +00:00
NAKAMURA Takumi
00eaed4fe8 test/Makefile: Force lit -j1 on Cygwin. 
lit -jN causes crash on Cygwin's python.

llvm-svn: 117093
 2010-10-22 09:40:37 +00:00
Michael J. Spencer
93269f7395 Rename LLVM_IS_TARGET_BIG_ENDIAN to LLVM_IS_HOST_BIG_ENDIAN to reflect what it actually means. 
llvm-svn: 117092
 2010-10-22 08:47:28 +00:00
Andrew Trick
b9e8700beb Reverting r117031 to cleanup valgrind errors. 
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.

llvm-svn: 117087
 2010-10-22 03:58:29 +00:00
Eric Christopher
58a6e62c08 Add some basic ret instruction support to arm fast-isel. 
llvm-svn: 117085
 2010-10-22 01:28:00 +00:00
Sean Callanan
9a40554de4 Fixed handling of immediate operand sizes, which 
weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.

llvm-svn: 117084
 2010-10-22 01:24:11 +00:00
NAKAMURA Takumi
76a048b6e7 Win32/Signals.inc: DontRemoveFileOnSignal(): Please acquire the CriticalSection. 
It choked BugPoint on Mingw.

llvm-svn: 117083
 2010-10-22 01:23:50 +00:00
Jim Grosbach
d86073aa9a ARM binary encoding for some of the multiply instructions. 
llvm-svn: 117080
 2010-10-21 22:52:30 +00:00
Stuart Hastings
c6b2d77375 Test case for r117075. Radar 6635085. 
llvm-svn: 117079
 2010-10-21 22:43:32 +00:00
Owen Anderson
bba3b2050e Add tests for NEON encoding of vmull. 
llvm-svn: 117077
 2010-10-21 22:19:53 +00:00
Jim Grosbach
7c42142b71 ARM binary encodings for MVN variants. 
llvm-svn: 117076
 2010-10-21 22:19:32 +00:00
Owen Anderson
653fc9304a Add tests for NEON encoding of vqdmulh and vqrdmulh. 
llvm-svn: 117074
 2010-10-21 22:05:33 +00:00
Jim Grosbach
e6d61a87e4 Trailing whitespace. 
llvm-svn: 117073
 2010-10-21 22:04:05 +00:00
Jim Grosbach
cb41e97b5c ARM Binary encoding information for BFC/BFI instructions. 
llvm-svn: 117072
 2010-10-21 22:03:21 +00:00
Dan Gohman
fe5489a0ac Add some more documentation. 
llvm-svn: 117070
 2010-10-21 21:55:35 +00:00
Owen Anderson
2c25ce7af1 Add tests for NEON vmul encoding. 
llvm-svn: 117069
 2010-10-21 21:51:58 +00:00
Eric Christopher
59683c9d71 These don't need to be virtual. 
llvm-svn: 117068
 2010-10-21 21:47:51 +00:00
Owen Anderson
b0bddd3282 Rename this test to better reflect its contents. 
llvm-svn: 117067
 2010-10-21 21:40:15 +00:00
Tobias Grosser
d1218c2661 Fix type in passes. 
llvm-svn: 117065
 2010-10-21 21:16:03 +00:00
Owen Anderson
77c5078d4a Add tests for NEON encodings of vaddhn and vraddhn. 
llvm-svn: 117064
 2010-10-21 20:56:57 +00:00
Michael J. Spencer
a43c204ef7 Fix Warnings. 
llvm-svn: 117062
 2010-10-21 20:49:38 +00:00
Michael J. Spencer
08602f9803 X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan! 
This is needed for indirect calls.

llvm-svn: 117061
 2010-10-21 20:49:23 +00:00
Owen Anderson
f84632744e Move the encoding logic for Q registers into getMachineOpValue(). 
llvm-svn: 117060
 2010-10-21 20:49:13 +00:00
Owen Anderson
ba6ee305cf Add tests for NEON encodings of vqadd, which was already correctly encoded. 
llvm-svn: 117059
 2010-10-21 20:42:04 +00:00
Mikhail Glushenkov
55ada6816e Trailing whitespace. 
llvm-svn: 117058
 2010-10-21 20:40:39 +00:00
Michael J. Spencer
b9734a5b12 Support: Add Endian.h 
llvm-svn: 117057
 2010-10-21 20:28:21 +00:00
Owen Anderson
ba2ac80921 ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower 
half of the Q register), rather than with just regno.  This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.

llvm-svn: 117056
 2010-10-21 20:21:49 +00:00
Eric Christopher
7ded7e88c8 Handle storing args to the stack for calls. 
llvm-svn: 117055
 2010-10-21 20:09:54 +00:00
Wesley Peck
8a77999240 Adding initial AsmParser implementation for the MBlaze backend. It is 
mostly based on the ARM AsmParser at this time and is not particularly
functional.

Changed the MBlaze data layout from:
    "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
    "E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.

Cleaned up the MBlaze source code:
    1. The floating point register class has been removed. The
       MicroBlaze does not have floating point registers. Floating
       point values are simply stored in integer registers.
    2. Renaming the CPURegs register class to GPR to reflect the
       standard naming.
    3. Removing a lot of stale code from AsmPrinter after
       the conversion to InstPrinter.
    4. Simplified sign extended loads by marking them as
       expanded in ISelLowering.

llvm-svn: 117054
 2010-10-21 19:48:38 +00:00
Dan Gohman
6fb125afc8 Explain what "constant" means here. 
llvm-svn: 117053
 2010-10-21 19:45:09 +00:00
Eric Christopher
b15029ea7e More load/store refactoring, call reg+offset simplification from within 
the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.

llvm-svn: 117051
 2010-10-21 19:40:30 +00:00
Jim Grosbach
f35d3b2aa1 trailing whitespace 
llvm-svn: 117050
 2010-10-21 19:38:40 +00:00
Dan Gohman
8cb659e892 Update comments. 
llvm-svn: 117048
 2010-10-21 19:01:22 +00:00
Owen Anderson
51a6bc3b27 Add correct NEON encodings for vhadd and vrhadd. 
llvm-svn: 117047
 2010-10-21 18:55:04 +00:00
Jakob Stoklund Olesen
4794d28044 Don't include the destination interval in the union when computing 
Parent - union(Y, ...). Doh.

llvm-svn: 117042
 2010-10-21 18:47:08 +00:00