Dan Gohman
bda1bacf36
Fix some typos in a comment.
...
llvm-svn: 76249
2009-07-17 22:16:21 +00:00
Evan Cheng
67ccedff04
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
...
llvm-svn: 76248
2009-07-17 22:13:25 +00:00
Chris Lattner
7cf9653432
remove AsmPrinter::findGlobalValue, just use Value::stripPointerCasts instead.
...
llvm-svn: 76246
2009-07-17 22:00:23 +00:00
Dan Gohman
c639ee66f0
Add a GEPOperator class, and move the hasNoPointerOverflow
...
accessors into it.
llvm-svn: 76245
2009-07-17 21:33:58 +00:00
Evan Cheng
51593b91d9
Simplify some more.
...
llvm-svn: 76239
2009-07-17 21:06:58 +00:00
Chris Lattner
e824b863e5
Use more terse and precise linkage checks.
...
llvm-svn: 76237
2009-07-17 21:00:50 +00:00
Dan Gohman
16335bfc09
Eliminate yet another copy of getOpcode.
...
llvm-svn: 76236
2009-07-17 20:58:59 +00:00
Chris Lattner
b6cede976e
these two pieces of code are the same because we always
...
emit the EHFrame label next to the section_eh_frame and
eh_frame_common labels.
llvm-svn: 76234
2009-07-17 20:53:51 +00:00
Dan Gohman
2ca0f65c30
Fix a typo that Duncan spotted.
...
llvm-svn: 76233
2009-07-17 20:51:47 +00:00
Dan Gohman
25a722cc45
Add a new Operator class, for handling Instructions and ConstantExprs
...
in a convenient manner, factoring out some common code from
InstructionCombining and ValueTracking. Move the contents of
BinaryOperators.h into Operator.h and use Operator to generalize them
to support ConstantExprs as well as Instructions.
llvm-svn: 76232
2009-07-17 20:47:02 +00:00
Chris Lattner
ffe0c407be
Untangle a snarl that I discovered when updating the mangler,
...
starting in getCurrentFunctionEHName. Among other problems,
we would try to privative a "foo.eh" label, but end up emitting
the label as _Lfoo.eh instead of L_foo.eh on darwin. This is really
bad, and the linker has always tolerated these labels existing.
For now, just emit them as _foo.eh.
This patch also fixes problems with ".eh" labels on unnamed
functions and eliminates two strangely defined TargetAsmInfo
hooks.
llvm-svn: 76231
2009-07-17 20:46:40 +00:00
Daniel Dunbar
de011196a4
Sketch support for target specific assembly parser.
...
- Not fully enabled yet, need a configure regeneration.
llvm-svn: 76230
2009-07-17 20:42:00 +00:00
Mikhail Glushenkov
d44eba5166
Trailing whitespace.
...
llvm-svn: 76229
2009-07-17 20:38:17 +00:00
Chris Lattner
1cb7dceb60
fix include guard.
...
llvm-svn: 76228
2009-07-17 20:32:07 +00:00
Evan Cheng
ba5b67f66d
Simplify the coalescer (finally!) by making LiveIntervals::processImplicitDefs a little more aggressive and teaching liveintervals to make use of isUndef marker on MachineOperands.
...
llvm-svn: 76223
2009-07-17 19:43:40 +00:00
Dan Gohman
56e00a404f
GetElementPtr instructions default to having no overflow.
...
llvm-svn: 76222
2009-07-17 19:23:21 +00:00
Daniel Dunbar
cff1fabab5
Start generating AsmMatcher.inc for X86.
...
llvm-svn: 76213
2009-07-17 18:55:26 +00:00
Jeffrey Yasskin
1669f312b5
r76102 added the MachineCodeEmitter::processDebugLoc call and called it from
...
the X86 Emitter. This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.
llvm-svn: 76211
2009-07-17 18:49:39 +00:00
Daniel Dunbar
cfd362eb0e
Fix compile warning.
...
llvm-svn: 76210
2009-07-17 18:33:52 +00:00
Anton Korobeynikov
fbac44c040
Add missed return
...
llvm-svn: 76209
2009-07-17 18:28:59 +00:00
Anton Korobeynikov
60f7bd3562
Add support for naked functions
...
llvm-svn: 76198
2009-07-17 18:07:26 +00:00
Bruno Cardoso Lopes
ddd0013bb6
revert one of the loops to use indicies over iterators because there are vector insertions inside the loop
...
llvm-svn: 76195
2009-07-17 18:02:30 +00:00
Dan Gohman
67f2b7d376
Add a SubclassOptionalData field to Value. See the doxygen comment for
...
details.
llvm-svn: 76189
2009-07-17 17:16:59 +00:00
Daniel Dunbar
8ce5e03431
Initialize another Context, in the hopes of unbreaking CBE.
...
llvm-svn: 76184
2009-07-17 16:20:23 +00:00
Daniel Dunbar
dc9438e8d9
Provide slightly more refined error message when trying to lookup a target, and
...
none are registered.
llvm-svn: 76181
2009-07-17 15:50:49 +00:00
David Greene
70e8a51127
Add logic to align instruction operands to columns for pretty-printing.
...
No target uses this currently. This patch only adds the mechanism so
that local installations can choose to enable this.
llvm-svn: 76177
2009-07-17 14:24:46 +00:00
Duncan Sands
d1b273609e
Avoid a compiler warning when assertions are turned off.
...
llvm-svn: 76176
2009-07-17 12:25:14 +00:00
Eli Friedman
6e61f56a5c
Oops, accidentally set a legal operation to expand.
...
llvm-svn: 76165
2009-07-17 07:34:23 +00:00
Eli Friedman
b946eb988f
Expand misc operations from test/CodeGen/Generic.
...
llvm-svn: 76163
2009-07-17 07:28:06 +00:00
Eli Friedman
93d9c9f85f
Handle void in XCoreTargetLowering::isLegalAddressingMode. Triggers in
...
test/CodeGen/Generic.
llvm-svn: 76162
2009-07-17 07:16:38 +00:00
Eli Friedman
7c72917709
Remove some unnecessary expansion markings. Add a few expansion
...
markings that show up in test/CodeGen/Generic.
llvm-svn: 76160
2009-07-17 07:03:00 +00:00
Eli Friedman
98a65107b3
Add operation expansion/promotion for a bunch of operations, many of
...
which show up in test/CodeGen/Generic.
llvm-svn: 76158
2009-07-17 06:36:24 +00:00
Evan Cheng
490d2cc5a4
Fix tSUBspi operand definition. It reads and writes sp, which is a high register.
...
llvm-svn: 76155
2009-07-17 05:43:12 +00:00
Eli Friedman
12bf15280b
Set an operation expansion, noticed while running
...
llc over test/CodeGen/Generic with -march=alpha.
llvm-svn: 76154
2009-07-17 05:23:03 +00:00
Eli Friedman
fde598545c
Make promotion in operation legalization for SETCC work correctly.
...
llvm-svn: 76153
2009-07-17 05:16:04 +00:00
Eli Friedman
b56b3ca224
Replace isTrapping with a new, similar method called
...
isSafeToSpeculativelyExecute. The new method is a bit closer to what
the callers actually care about in that it rejects more things callers
don't want. It also adds more precise handling for integer
division, and unifies code for analyzing the legality of a speculative
load.
llvm-svn: 76150
2009-07-17 04:28:42 +00:00
Eli Friedman
6be9680238
One more operation expansion for MIPS, from test/CodeGen/Generic.
...
llvm-svn: 76149
2009-07-17 04:07:24 +00:00
Daniel Dunbar
f988544dcf
Make sure CWriter's Context get's initialized.
...
llvm-svn: 76147
2009-07-17 03:43:21 +00:00
Eli Friedman
48510f16fb
Expand a bunch of illegal operations on MIPS (found by
...
inspection and running over CodeGen/Generic).
llvm-svn: 76146
2009-07-17 02:28:12 +00:00
Daniel Dunbar
fd7e588f92
Fix 'may be used uninitialized' warning.
...
- Anton, please review.
llvm-svn: 76144
2009-07-17 02:19:26 +00:00
Evan Cheng
9a2f6c2a99
Fix my brain cramp by inverting the assertion condition.
...
llvm-svn: 76131
2009-07-17 00:32:06 +00:00
Jeffrey Yasskin
5509582ad0
Fix "no newline at end of file" warning from gcc.
...
llvm-svn: 76127
2009-07-16 23:58:14 +00:00
Owen Anderson
1c2b8cc518
Privatize the MDNode uniquing table.
...
llvm-svn: 76126
2009-07-16 23:44:30 +00:00
Anton Korobeynikov
dc39f4fff8
Emit cross regclass register moves for thumb2.
...
Minor code duplication cleanup.
llvm-svn: 76124
2009-07-16 23:26:06 +00:00
Daniel Dunbar
cd1a8581ee
Disable this assert for now, it is firing on an llvm-gcc bootstrap. :(
...
llvm-svn: 76123
2009-07-16 23:02:46 +00:00
Evan Cheng
e9dc6cf3b1
GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
...
llvm-svn: 76121
2009-07-16 22:53:10 +00:00
Dale Johannesen
e08bda67c2
Assume an inline asm might be a call, so we get
...
stack alignment right when it is. This is not
ideal but conservatively correct. Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c
llvm-svn: 76120
2009-07-16 22:34:45 +00:00
David Greene
a2c98dd402
Emit line numbers in asm comments when available.
...
llvm-svn: 76117
2009-07-16 22:24:20 +00:00
Owen Anderson
476adb2e49
Privatize the MDString uniquing table.
...
llvm-svn: 76113
2009-07-16 22:11:26 +00:00
Daniel Dunbar
7a21e4c812
Fix inverted preprocessor conditional.
...
llvm-svn: 76111
2009-07-16 22:08:25 +00:00
Daniel Dunbar
46c27aaf02
Fix compiler warning (for -Asserts).
...
llvm-svn: 76110
2009-07-16 22:06:22 +00:00
Jakob Stoklund Olesen
c438f0ecfa
Silence warning in Linux builds:
...
X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'
llvm-svn: 76105
2009-07-16 21:24:13 +00:00
Daniel Dunbar
276e4a7a7d
Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output.
...
- No functionality change.
llvm-svn: 76103
2009-07-16 21:17:53 +00:00
Jeffrey Yasskin
a4b7ea7485
Add line numbers to OProfile. To do this, I added a processDebugLoc()
...
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
llvm-svn: 76102
2009-07-16 21:07:26 +00:00
Jakob Stoklund Olesen
4a0d996780
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
...
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
llvm-svn: 76101
2009-07-16 20:58:34 +00:00
Evan Cheng
981276bb16
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
...
llvm-svn: 76100
2009-07-16 20:15:00 +00:00
Owen Anderson
c63b0e7a30
Privatize the ConstantFP table. I'm on a roll!
...
llvm-svn: 76097
2009-07-16 19:05:41 +00:00
Evan Cheng
39e5f6205a
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
...
llvm-svn: 76094
2009-07-16 18:44:05 +00:00
Ted Kremenek
5d9cbfd392
Update CMake file.
...
llvm-svn: 76093
2009-07-16 18:29:22 +00:00
Owen Anderson
21d2d69727
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
...
our current context-passing stuff, which is also fixed here
llvm-svn: 76089
2009-07-16 18:04:31 +00:00
Kevin Enderby
f641ecc6e8
Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a generic
...
EmitAssemblerFlag API which takes a value from the added AssemblerFlag
enumerated constants.
llvm-svn: 76087
2009-07-16 17:56:39 +00:00
Dan Gohman
50e65d8c93
Fill in some holes in ScalarEvolution's loop iteration condition
...
analysis. This allows indvars to emit a simpler loop trip count
expression.
llvm-svn: 76085
2009-07-16 17:34:36 +00:00
Dan Gohman
69d03cf2ee
Add an isLoopSimplifyForm() predicate, following the example of
...
isLCSSAForm(), to test whether a loop is in the form guaranteed
by the LoopSimplify pass.
llvm-svn: 76077
2009-07-16 16:16:23 +00:00
Dan Gohman
0bcfcaa96c
Use size_t.
...
llvm-svn: 76069
2009-07-16 15:24:40 +00:00
Anton Korobeynikov
c66cf22284
Unbreak
...
llvm-svn: 76064
2009-07-16 14:36:52 +00:00
Anton Korobeynikov
3e8bb65ec8
Temporary disable 16 bit bswap
...
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
94e21c8740
Add instruction formats and few opcodes
...
llvm-svn: 76062
2009-07-16 14:35:20 +00:00
Anton Korobeynikov
e11a89ba74
Add bswap patterns
...
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
6c622a4547
Provide crazy pseudos for regpairs spills / reloads
...
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
Anton Korobeynikov
c5e948c021
Handle long-disp stuff more consistently
...
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
Anton Korobeynikov
d9c48cfd00
All FP instructions have 12 bit memory displacement field
...
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
Anton Korobeynikov
e1bf81893d
Another predicate routine
...
llvm-svn: 76057
2009-07-16 14:33:01 +00:00
Anton Korobeynikov
605ebc2c3c
More helpers
...
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
Anton Korobeynikov
014ce79e73
Add bunch of branch folding stuff
...
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
Anton Korobeynikov
918a93419c
Add missed opcodes to short => long displacement conversion
...
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
Anton Korobeynikov
08d9f6b882
Cleanup
...
llvm-svn: 76053
2009-07-16 14:31:32 +00:00
Anton Korobeynikov
94f250ff30
Fix logic inversion for RI-mode address selection
...
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
373515d99e
Expand 32-bit bitconverts via memory
...
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
080bdae588
Fix incomin arg stack frame offset in case we need to generate stack frame
...
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
c84e2bb30e
Fix instruction mnemonics for some fp_to_sint operations
...
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
Anton Korobeynikov
74497b2190
i32 values are passed extended also on stack. Handle this in generic way
...
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
Anton Korobeynikov
319dc4e8d3
We definitely have 1-0 bools
...
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
Anton Korobeynikov
2e8f54d16d
Revert the commit, it just hides the real bug
...
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
0276bc9176
Out GR128 regclass is not a 'real' i128 one.
...
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
Anton Korobeynikov
690fef7849
Add missed condbranch opcodes
...
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
Anton Korobeynikov
4181716247
Handle bitconverts
...
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
Anton Korobeynikov
60427c0b64
Unbreak mvi and friends - emit only 'significant' part of the operand
...
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
Anton Korobeynikov
ff6d84fd85
Expand fp_to_uint too
...
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
Anton Korobeynikov
da480ca78d
We don't have FP truncstores
...
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
Anton Korobeynikov
7ea47e70b3
Expand uint_to_fp
...
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
Anton Korobeynikov
117e7a7179
Emit proper rounding mode for fp_to_sint
...
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
Anton Korobeynikov
61bf5c13c4
f32/f64 regs are stored on stack if we're short in FP regs
...
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
Anton Korobeynikov
bbf0fe2a76
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
...
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
886e977c69
Make FP zero to be legal FP immediate via LOAD ZERO
...
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
Anton Korobeynikov
2474b40557
Loads are not two-address in any way
...
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
Anton Korobeynikov
e45c7cb554
Add LOAD NEGATIVE instruction
...
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
Anton Korobeynikov
d12e7875c9
LOAD COMPLEMENT instruction is not really two-addr
...
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
Anton Korobeynikov
f8ac41d531
Add multiple add/sub instructions
...
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
Anton Korobeynikov
df2f045667
Handle FP callee-saved regs
...
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
Anton Korobeynikov
b90a38d00d
Proper FP extloads
...
llvm-svn: 76028
2009-07-16 14:22:46 +00:00