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Author SHA1 Message Date
Jakob Stoklund Olesen
f49206c2fd Transfer weights in transferSuccessorsAndUpdatePHIs(). 
llvm-svn: 161805
 2012-08-13 23:13:25 +00:00
Jakob Stoklund Olesen
d25a03b9af Print out MachineBasicBlock successor weights when available. 
llvm-svn: 161804
 2012-08-13 23:13:23 +00:00
Nadav Rotem
a921b121e2 LICM uses AliasSet information to hoist and sink instructions. However, other passes, such as LoopRotate 
may invalidate its AliasSet because SSAUpdater does not update the AliasSet properly.
This patch teaches SSAUpdater to notify AliasSet that it made changes.
The testcase in PR12901 is too big to be useful and I could not reduce it to a normal size. 

rdar://11872059 PR12901

llvm-svn: 161803
 2012-08-13 23:06:54 +00:00
Nadav Rotem
685bd842e2 MemoryDependenceAnalysis attempts to find the first memory dependency for function calls. 
Currently, if GetLocation reports that it did not find a valid pointer (this is the case for volatile load/stores),
we ignore the result. This patch adds code to handle the cases where we did not obtain a valid pointer.

rdar://11872864  PR12899

llvm-svn: 161802
 2012-08-13 23:03:43 +00:00
Jim Grosbach
85041a05e0 ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines. 
These tests weren't actually being run before (missing ':' after CHECK).

llvm-svn: 161800
 2012-08-13 22:25:44 +00:00
Jakob Stoklund Olesen
33e364a3df Remove the TII::scheduleTwoAddrSource() hook. 
It never does anything when running 'make check', and it get's in the
way of updating live intervals in 2-addr.

The hook was originally added to help form IT blocks in Thumb2 code
before register allocation, but the pass ordering has changed since
then, and we run if-conversion after register allocation now.

When the MI scheduler is enabled, there will be no less than two
schedulers between 2-addr and Thumb2ITBlockPass, so this hook is
unlikely to help anything.

llvm-svn: 161794
 2012-08-13 21:52:57 +00:00
Bill Wendling
9cd2a5dbb9 Rename test since it's not linux-specific. 
llvm-svn: 161792
 2012-08-13 21:32:42 +00:00
Manman Ren
159ae3b3bc ARM: enable struct byval for AAPCS-VFP. 
This change is to be enabled in clang.

rdar://9877866

llvm-svn: 161789
 2012-08-13 21:22:50 +00:00
Bill Wendling
59b0b53089 Whitespace cleanup. 
llvm-svn: 161788
 2012-08-13 21:20:43 +00:00
Jakob Stoklund Olesen
343ed1017e Count triangles and diamonds in early if-conversion. 
llvm-svn: 161783
 2012-08-13 21:03:27 +00:00
Jakob Stoklund Olesen
0e46305efe Delete dead typedef. 
llvm-svn: 161782
 2012-08-13 21:03:25 +00:00
Jakob Stoklund Olesen
8e6595639e Handle extra Tail predecessors in if-conversion. 
It is still possible to if-convert if the tail block has extra
predecessors, but the tail phis must be rewritten instead of being
removed.

llvm-svn: 161781
 2012-08-13 20:49:04 +00:00
Arnold Schwaighofer
dbdb2581b8 [Hexagon] Don't mark callee saved registers as clobbered by a tail call 
This was causing unnecessary spills/restores of callee saved registers.

Fixes PR13572.

Patch by Pranav Bhandarkar!

llvm-svn: 161778
 2012-08-13 19:54:01 +00:00
Manman Ren
ead7af5ec0 Fix failure on Atom bot due to r161769 
llvm-svn: 161777
 2012-08-13 19:34:29 +00:00
Nadav Rotem
03c4d5f036 Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISDNode has more than one user. 
rdar://11876519

llvm-svn: 161775
 2012-08-13 18:52:44 +00:00
Manman Ren
cb05c49c64 X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr from 
OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed
to a memory operand.

PR13576

llvm-svn: 161769
 2012-08-13 18:29:41 +00:00
Eric Christopher
3aea549423 Add support for the %H output modifier. 
Patch by Weiming Zhao.

llvm-svn: 161768
 2012-08-13 18:18:52 +00:00
Manman Ren
c9f5387a5c X86: when auto-detecting the subtarget features, make sure use IsIntel to detect 
Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6.

llvm-svn: 161763
 2012-08-13 17:26:46 +00:00
Nadav Rotem
6af514e437 Fix a documentation typo. 
llvm-svn: 161758
 2012-08-13 15:29:53 +00:00
Kostya Serebryany
61dd5ba233 [asan] remove the code for --asan-merge-callbacks as it appears to be a bad idea. (partly related to Bug 13225) 
llvm-svn: 161757
 2012-08-13 14:08:46 +00:00
Alexander Kornienko
1665252b4b Added test for non-static use of cl::opt (fixed in r160170) 
llvm-svn: 161751
 2012-08-13 10:43:36 +00:00
Tim Northover
7acf444c11 Add test for previous commit correcting NEON load patterns. 
llvm-svn: 161750
 2012-08-13 10:38:45 +00:00
Tim Northover
b1f8be6cbe Use correct loads for vector types during extending-load operations. 
Previously, we used VLD1.32 in all cases, however there are both 16 and 64-bit
accesses being selected, so we need to use an appropriate width load in those
cases.

llvm-svn: 161748
 2012-08-13 09:06:31 +00:00
Craig Topper
4fc08044be Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and putting an a couple if conditions in a better order. 
llvm-svn: 161746
 2012-08-13 03:42:38 +00:00
Craig Topper
a438ea46bf Refactor code a bit to share commonalities. No functional change intended. 
llvm-svn: 161745
 2012-08-13 02:34:03 +00:00
Craig Topper
bb92d94049 Fix an unused variable warning from r161742. 
llvm-svn: 161743
 2012-08-13 01:26:45 +00:00
Craig Topper
1032fcf6da Remove the LowerMMXCONCAT_VECTORS function. It could never execute because there are no legal 64-bit vector types that could be used as inputs to a 128-bit concat_vectors. Remove a target specific SDNode and its patterns that become unused as a result. 
llvm-svn: 161742
 2012-08-13 01:23:55 +00:00
Nick Lewycky
6dbd265685 Give this test an explicit triple. 
llvm-svn: 161740
 2012-08-12 08:21:27 +00:00
Nick Lewycky
5178e4f814 When emitting the PC range in an FDE, use the same data encoding for both ends 
of the range. Fixes PR13581!

llvm-svn: 161739
 2012-08-12 08:09:45 +00:00
Craig Topper
5a5ed2d691 Remove call to setOperationAction for SETCC of v4f32. SETCC returns an integer type not an FP type. 
llvm-svn: 161738
 2012-08-12 05:31:32 +00:00
Craig Topper
1292e1f43c Remove unnecessary call to setOperationAction for SETCC of v2i64 under SSE42. It was already called for the same under SSE2. 
llvm-svn: 161737
 2012-08-12 05:15:16 +00:00
Arnold Schwaighofer
c751a25aed Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARM 
architecture

It broke MultiSource/Applications/JM/ldecod/ldecod on armv7 thumb O0 g and armv7
thumb O3.

llvm-svn: 161736
 2012-08-12 05:11:56 +00:00
Craig Topper
4d9cbceefd Change addTypeForNeon to use MVT instead of EVT so all the calls to getSimpleVT can be removed. 
llvm-svn: 161735
 2012-08-12 03:16:37 +00:00
Craig Topper
709114d67f Make replace many calls to getSizeInBits() with is128BitVector/is256BitVector 
llvm-svn: 161734
 2012-08-12 02:23:29 +00:00
Craig Topper
a52fcd0a14 Use MVT.isXBitVector instead of EVT.isXBitVector when setting up operation actions. Compiles to smaller code. 
llvm-svn: 161733
 2012-08-12 00:34:56 +00:00
Michael Liao
4b95cb463a fix PR13577, an issue introduced by r161687 
- FCMOV only supports a subset of X86 conditions. Skip boolean
  simplification if X86 condition is not valid for FCMOV.
- add a minimal test case for PR13577.

llvm-svn: 161732
 2012-08-11 23:47:06 +00:00
Craig Topper
3637e6c09d Create isXBitVector methods in MVT and call them from EVT. This allows targets to call them with an MVT without needing to convert to EVT. 
llvm-svn: 161731
 2012-08-11 23:31:18 +00:00
Craig Topper
93e2521659 Move setOperationAction for CONCAT_VECTORS for 256-bit vectors into loop since all 256-bit types are supported. 
llvm-svn: 161730
 2012-08-11 22:34:26 +00:00
Benjamin Kramer
28e133c8f2 MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps already. 
llvm-svn: 161729
 2012-08-11 20:42:59 +00:00
Benjamin Kramer
b338b22e72 PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely. 
This is common e.g. when doing rip-relative addressing on x86_64.

llvm-svn: 161728
 2012-08-11 19:05:13 +00:00
Craig Topper
b7f7fa86ec Tidy up indentation. No functional change. 
llvm-svn: 161727
 2012-08-11 17:53:00 +00:00
Craig Topper
ba0c3ebe9e Fix a cast that was casting away 'const' unnecessarily 
llvm-svn: 161726
 2012-08-11 17:46:16 +00:00
Craig Topper
3929432178 Add a couple default: llvm_unreachable() to some switch statements. Fix a bad message in an existing llvm_unreachable. 
llvm-svn: 161725
 2012-08-11 17:44:14 +00:00
Manman Ren
9bd686f936 X86: when we are auto-detecting the subtarget features, make sure we turn on 
FeatureFastUAMem for Nehalem, Westmere and Sandy Bridge.

FeatureFastUAMem is already on if we pass in nehalem or westmere as a command
argument.

rdar: 7252306
llvm-svn: 161717
 2012-08-10 23:43:32 +00:00
Jakob Stoklund Olesen
887e16b508 Add a proper if-conversion cost model. 
Detect when there is not enough available ILP, so if-conversion can't
speculate instructions for free.

Compute the lengthening of the critical path when inserting a select
instruction that depends on the condition as well as both sides of the
if.

Reject conversions that would stretch the critical path by more than
half a mispredict penalty.

llvm-svn: 161713
 2012-08-10 22:27:31 +00:00
Jakob Stoklund Olesen
9a004cb5fd Give MachineTraceMetrics its own debug tag. 
llvm-svn: 161712
 2012-08-10 22:27:29 +00:00
Jakob Stoklund Olesen
e3d7dc035c Add more trace query functions. 
Trace::getResourceLength() computes the number of cycles required to
execute the trace when ignoring data dependencies. The number can be
compared to the critical path to estimate the trace ILP.

Trace::getPHIDepth() computes the data dependency depth of a PHI in a
trace successor that isn't necessarily part of the trace.

llvm-svn: 161711
 2012-08-10 22:27:27 +00:00
Eli Friedman
449495cd62 The normal edge of an invoke is not allowed to branch to a block with a 
landingpad.  Enforce it in the verifier, and fix the regression tests to match.

llvm-svn: 161697
 2012-08-10 20:55:20 +00:00
Manman Ren
500d45c3d9 ARM: enable struct byval for AAPCS. 
This change is to be enabled in clang.

rdar://9877866
PR://13350

llvm-svn: 161693
 2012-08-10 20:39:38 +00:00
Jakob Stoklund Olesen
43da54d467 Add getTPred() and getFPred() functions. 
They identify the PHI predecessors in both diamonds and triangles.

llvm-svn: 161689
 2012-08-10 20:19:17 +00:00