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Author SHA1 Message Date
Bill Wendling
62385f232c Don't add in the asked for size so that we don't copy too much from the old to new vectors. 
llvm-svn: 136338
 2011-07-28 07:26:41 +00:00
Nick Lewycky
31d1c92d69 In DenseMapInfo<pair<T, U>> tombstone key, use the tombstone for T and U instead 
of the empty key for U. This shouldn't really matter because the tombstone key
for the pair was still distinct from every other key, but it is odd. Patch by
Michael Ilseman!

llvm-svn: 136336
 2011-07-28 06:48:33 +00:00
Bill Wendling
8b4ec26e4f Automatically merge the landingpad clauses when we come across a callee's 
landingpad.

llvm-svn: 136329
 2011-07-28 02:40:13 +00:00
Oscar Fuentes
af4fae1c0f Explicitly declare a library dependency of LLVM*Desc to 
LLVM*AsmPrinter.

GenLibDeps.pl fails to detect vtable references. As this is the only
referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized
builds, the algorithm that creates the list of libraries to be linked
into tools doesn't know about the dependency and sometimes places the
libraries on the wrong order, yielding error messages like this:

../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function
`llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)':
ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE
[llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo
const&)]+0x2a): undefined reference to `vtable for
llvm::ARMInstPrinter'

llvm-svn: 136328
 2011-07-28 02:33:52 +00:00
Oscar Fuentes
c6a2a22e0f Updated cmake library dependencies. 
llvm-svn: 136327
 2011-07-28 02:33:33 +00:00
Bill Wendling
b75e5fc784 Make sure that the landingpad instruction takes a Constant* as the clause's value. 
llvm-svn: 136326
 2011-07-28 02:27:12 +00:00
Bill Wendling
03445c79b9 Add a couple of convenience functions: 
* InvokeInst: Get the landingpad instruction associated with this invoke.
* LandingPadInst: A method to reserve extra space for clauses.

llvm-svn: 136325
 2011-07-28 02:15:52 +00:00
Bruno Cardoso Lopes
e0d86eec4f Invert the subvector insertion to be more likely to be taken as a COPY 
llvm-svn: 136324
 2011-07-28 01:26:53 +00:00
Bruno Cardoso Lopes
e24a043703 Add patterns to generate copies for extract_subvector instead of 
using vextractf128. This will reduce the number of issued instruction
for several avx codes.

llvm-svn: 136323
 2011-07-28 01:26:50 +00:00
Bruno Cardoso Lopes
73945bf79a movd/movq write zeros in the high 128-bit part of the vector. Use 
them to match 256-bit scalar_to_vector+zext.

llvm-svn: 136322
 2011-07-28 01:26:46 +00:00
Bruno Cardoso Lopes
1f63a37172 Add a few patterns to match allzeros without having to use the fp unit. 
Take advantage that the 128-bit vpxor zeros the higher part and use it.
This also fixes PR10491

llvm-svn: 136321
 2011-07-28 01:26:43 +00:00
Bruno Cardoso Lopes
06d8be564f Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also move 
a convert pattern close to the instruction definition.

llvm-svn: 136320
 2011-07-28 01:26:39 +00:00
Benjamin Kramer
20bc47e9c1 Fix a use after free. An instruction can't be both an intrinsic call and a fence. 
llvm-svn: 136319
 2011-07-28 01:20:19 +00:00
Bill Wendling
3af08d0231 Initial stab at getting inlining working with the EH rewrite. 
This takes the new 'resume' instruction and turns it into a direct jump to the
caller's landing pad code. The caller's landingpad instruction is merged with
the landingpad instructions of the callee. This is a bit rough and makes some
assumptions in how the code works. But it passes a simple test.

llvm-svn: 136313
 2011-07-28 00:38:23 +00:00
Jim Grosbach
992112a797 ARM parsing and encoding tests. 
UXTAB, UXTAB16, UXTAH, UXTB, UXTB16, and UXTH.

llvm-svn: 136312
 2011-07-28 00:37:03 +00:00
Argyrios Kyrtzidis
a95f22ea2b Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function. 
If true and 'model' parameter is not an absolute path, a temp directory will be prepended.
Make it true by default to match current behaviour.

llvm-svn: 136310
 2011-07-28 00:29:20 +00:00
Owen Anderson
bf92556a9e Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first. 
llvm-svn: 136295
 2011-07-27 23:36:57 +00:00
Evan Cheng
04762a3cf5 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292
 2011-07-27 23:22:03 +00:00
Jim Grosbach
37586957ee ARM assembly parsing and encoding for USUB16 and USUB8. 
llvm-svn: 136289
 2011-07-27 23:10:05 +00:00
Jim Grosbach
3e48c1f676 ARM assembly parsing and encoding for USAX. 
llvm-svn: 136288
 2011-07-27 23:07:00 +00:00
Kevin Enderby
9adbbfffd0 Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. 
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.

llvm-svn: 136287
 2011-07-27 23:01:50 +00:00
Jim Grosbach
b0bde240c1 Clean up tabs. 
llvm-svn: 136286
 2011-07-27 22:35:06 +00:00
Jim Grosbach
094803b4d0 ARM assembly parsing and encoding support for USAT and USAT16. 
Use range checked immediate operands for instructions. Add tests.

llvm-svn: 136285
 2011-07-27 22:34:17 +00:00
Jim Grosbach
e8619cb279 ARM assembly parsing and encoding tests for USAD8 and USADA8. 
llvm-svn: 136284
 2011-07-27 22:23:02 +00:00
Eli Friedman
842ea169de Code generation for 'fence' instruction. 
llvm-svn: 136283
 2011-07-27 22:21:52 +00:00
Jim Grosbach
04ab1fa0bc ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8. 
llvm-svn: 136282
 2011-07-27 22:13:08 +00:00
Jim Grosbach
2c4ea41358 Fix comment copy/paste-o. 
llvm-svn: 136281
 2011-07-27 22:11:41 +00:00
Jim Grosbach
a91fcf98c9 ARM assembly parsing and encoding tests for UQASX and UQSAX. 
llvm-svn: 136280
 2011-07-27 22:09:30 +00:00
Jim Grosbach
a85f517680 ARM assembly parsing and encoding tests for UQADD16 and UQADD8. 
llvm-svn: 136279
 2011-07-27 22:08:14 +00:00
Jakub Staszak
f5076015fc Use BlockFrequency instead of uint32_t in BlockFrequencyInfo. 
llvm-svn: 136278
 2011-07-27 22:05:51 +00:00
Jim Grosbach
df8040c528 ARM assembly parsing and encoding for UMULL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136277
 2011-07-27 22:01:42 +00:00
Devang Patel
a31c9d991e Remove outdated FIXME comment. 
llvm-svn: 136275
 2011-07-27 22:00:01 +00:00
Jim Grosbach
dd55e1de02 ARM assembly parsing and encoding for UMLAL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136274
 2011-07-27 21:58:11 +00:00
Jim Grosbach
f48e465aa5 ARM assembly parsing and encoding tests for UMAAL. 
llvm-svn: 136272
 2011-07-27 21:53:42 +00:00
Bill Wendling
6f17cb3233 Refuse to inline two functions which use different personality functions. 
llvm-svn: 136269
 2011-07-27 21:44:28 +00:00
Jim Grosbach
91f7d83f9c ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8. 
llvm-svn: 136267
 2011-07-27 21:21:59 +00:00
Jim Grosbach
6f34be1f69 ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX. 
llvm-svn: 136266
 2011-07-27 21:20:45 +00:00
Jim Grosbach
c5cd3228c4 ARM parsing and encoding of SBFX and UBFX. 
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].

llvm-svn: 136264
 2011-07-27 21:09:25 +00:00
Bill Wendling
b96d318578 Keep enums stable. Append EH stuff to the end. 
llvm-svn: 136263
 2011-07-27 21:00:28 +00:00
Jim Grosbach
8393f12ec5 ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX. 
llvm-svn: 136261
 2011-07-27 20:43:44 +00:00
Jim Grosbach
1f818d0f25 ARM assembly parsing and encoding tests for TST instruction. 
llvm-svn: 136260
 2011-07-27 20:38:58 +00:00
Jim Grosbach
e74be6ad39 ARM assembly parsing and encoding tests for TEQ instruction. 
llvm-svn: 136259
 2011-07-27 20:37:36 +00:00
Owen Anderson
d2cd33b911 Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. 
llvm-svn: 136255
 2011-07-27 20:29:48 +00:00
Bill Wendling
b20cfdfe95 Merge the contents from exception-handling-rewrite to the mainline. 
This adds the new instructions 'landingpad' and 'resume'.

llvm-svn: 136253
 2011-07-27 20:18:04 +00:00
Jim Grosbach
624acaffd7 ARM assembly parsing and encoding for extend instructions. 
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.

llvm-svn: 136252
 2011-07-27 20:15:40 +00:00
Nick Lewycky
59edfce6f7 Teach the ConstantMerge pass about alignment. Fixes PR10514! 
llvm-svn: 136250
 2011-07-27 19:47:34 +00:00
Eli Friedman
1a80401da2 X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics. 
llvm-svn: 136249
 2011-07-27 19:43:50 +00:00
Eli Friedman
a36a11b45b The numbering of LLVMOpcode is supposed to be stable; revert my earlier change, and append Fence onto the end. 
llvm-svn: 136245
 2011-07-27 18:59:19 +00:00
Jakub Staszak
4e897c8ac3 Add test cases for BlockFrequency. 
llvm-svn: 136244
 2011-07-27 18:57:40 +00:00
Ted Kremenek
ee0970dabc Add a generic 'capacity_in_bytes' function to allow inspection of memory usage of various data structures. 
llvm-svn: 136233
 2011-07-27 18:40:45 +00:00