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because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2). rdar://12201387 llvm-svn: 162926 |
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CPP | ||
Generic | ||
Hexagon | ||
MBlaze | ||
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MSP430 | ||
NVPTX | ||
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SPARC | ||
Thumb | ||
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XCore |