llvm-mirror/lib/CodeGen
Andrew Trick 25ec43e9fe Clear virtual registers after they are no longer referenced.
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

llvm-svn: 151032
2012-02-21 04:51:23 +00:00
..
AsmPrinter Modify the code that emits the module flags to use the new module flags accessor 2012-02-15 22:36:15 +00:00
SelectionDAG Teach the DAGCombiner that certain loadext nodes followed by ANDs can be converted to zeroexts. 2012-02-20 12:02:38 +00:00
AggressiveAntiDepBreaker.cpp AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit 2012-01-16 22:53:41 +00:00
AggressiveAntiDepBreaker.h Rename TargetSubtarget to TargetSubtargetInfo for consistency. 2011-07-01 21:01:15 +00:00
AllocationOrder.cpp Rename TRI::getAllocationOrder() to getRawAllocationOrder(). 2011-06-16 23:31:16 +00:00
AllocationOrder.h Fix old doxygen comment. 2012-01-24 18:09:18 +00:00
Analysis.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
AntiDepBreaker.h Update DBG_VALUEs while breaking anti dependencies. 2011-06-02 21:26:52 +00:00
BranchFolding.cpp Handle register masks in branch folding. 2012-02-15 23:42:54 +00:00
BranchFolding.h When tail-merging multiple blocks, make sure to correctly update the live-in list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). 2011-07-06 23:41:48 +00:00
CalcSpillWeights.cpp Move CalculateRegClass to MRI::recomputeRegClass. 2011-08-09 16:46:27 +00:00
CallingConvLower.cpp Rename the ParmContext enum values to make a bit more sense and add a small 2011-06-10 20:37:36 +00:00
CMakeLists.txt Added the MachineSchedulerPass skeleton. 2012-01-13 06:30:30 +00:00
CodeGen.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
CodePlacementOpt.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
CriticalAntiDepBreaker.cpp Added a late machine instruction copy propagation pass. This catches 2012-01-07 03:02:36 +00:00
CriticalAntiDepBreaker.h Teach antidependency breakers to use RegisterClassInfo. 2011-06-16 21:56:21 +00:00
DeadMachineInstructionElim.cpp Never delete instructions that define reserved registers. 2012-02-09 00:15:39 +00:00
DFAPacketizer.cpp Fix library visibility problems with VLIWPacketizer. 2012-02-15 23:34:15 +00:00
DwarfEHPrepare.cpp Reapply r149159 with a fix to add to a PHI node with a non-null parent. 2012-01-28 01:17:56 +00:00
EdgeBundles.cpp Twinify GraphWriter a little bit. 2011-11-15 16:26:38 +00:00
ExecutionDepsFix.cpp Move common code into an MRI function. 2011-12-21 19:50:05 +00:00
ExpandISelPseudos.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
ExpandPostRAPseudos.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
GCMetadata.cpp Add 'llvm_unreachable' to passify GCC's understanding of the constraints 2012-01-10 18:08:01 +00:00
GCMetadataPrinter.cpp mcize the gc metadata printing stuff. 2010-04-04 07:39:04 +00:00
GCStrategy.cpp Remove dead code. Improve llvm_unreachable text. Simplify some control flow. 2012-02-19 11:37:01 +00:00
IfConversion.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
InlineSpiller.cpp Don't store COPY pointers in VNInfo. 2012-02-04 05:20:49 +00:00
InterferenceCache.cpp Fix global live range splitting regmask accuracy. 2012-02-14 23:53:23 +00:00
InterferenceCache.h Add register mask support to InterferenceCache. 2012-02-10 18:58:34 +00:00
IntrinsicLowering.cpp Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics. 2012-01-31 01:58:48 +00:00
JITCodeEmitter.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LatencyPriorityQueue.cpp Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
LexicalScopes.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LiveDebugVariables.cpp Add bundle aware API for querying instruction properties and switch the code 2011-12-07 07:15:52 +00:00
LiveDebugVariables.h Update LiveDebugVariables after live range splitting. 2011-05-06 18:00:02 +00:00
LiveInterval.cpp Drop the REDEF_BY_EC VNInfo flag. 2012-02-04 05:51:25 +00:00
LiveIntervalAnalysis.cpp Fix some bugs in HMEditor's moveAllOperandsInto logic. 2012-02-21 00:00:36 +00:00
LiveIntervalUnion.cpp Oops - LiveIntervalUnion.cpp file does use std::find. Moving STL header include to LiveIntervalUnion.cpp file. 2011-12-21 20:16:11 +00:00
LiveIntervalUnion.h Remove disused STL header include. 2011-12-21 20:12:54 +00:00
LiveRangeCalc.cpp Don't store COPY pointers in VNInfo. 2012-02-04 05:20:49 +00:00
LiveRangeCalc.h Unbreak msvc. 2011-09-13 03:58:34 +00:00
LiveRangeEdit.cpp Tidy up. 2012-02-17 17:35:10 +00:00
LiveRangeEdit.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
LiveStackAnalysis.cpp Move getCommonSubClass() into TRI. 2011-09-30 22:18:51 +00:00
LiveVariables.cpp RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 2012-02-10 04:10:36 +00:00
LLVMBuild.txt LLVMBuild: Introduce a common section which currently has a list of the 2011-12-12 22:45:54 +00:00
LLVMTargetMachine.cpp Tidy up. 2012-02-17 17:35:10 +00:00
LocalStackSlotAllocation.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
MachineBasicBlock.cpp Cache iterators. Some of these are expensive to create. 2012-02-10 00:28:31 +00:00
MachineBlockFrequencyInfo.cpp Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo. 2011-12-20 20:03:10 +00:00
MachineBlockPlacement.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
MachineBranchProbabilityInfo.cpp Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo. 2011-12-20 20:03:10 +00:00
MachineCodeEmitter.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MachineCopyPropagation.cpp Fix machine-cp by having it to check sub-register indicies. e.g. 2012-02-20 23:28:17 +00:00
MachineCSE.cpp Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786. 2012-02-17 00:27:16 +00:00
MachineDominators.cpp Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which 2010-10-19 17:21:58 +00:00
MachineFunction.cpp Move some llvm_unreachable's from r149849 out of switch statements to satisfy -Wcovered-switch-default 2012-02-06 08:17:43 +00:00
MachineFunctionAnalysis.cpp Sink codegen optimization level into MCCodeGenInfo along side relocation model 2011-11-16 08:38:26 +00:00
MachineFunctionPass.cpp Ok, third time's the charm. No changes from last time except the CMake 2010-04-02 23:17:14 +00:00
MachineFunctionPrinterPass.cpp Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
MachineInstr.cpp Reverse iterator - should be incrementing rather than decrementing. 2012-02-17 01:54:11 +00:00
MachineInstrBundle.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
MachineLICM.cpp Revert r150288, "Allow Post-RA LICM to hoist reserved register reads." 2012-02-17 16:40:44 +00:00
MachineLoopInfo.cpp Begin adding static dependence information to passes, which will allow us to 2010-10-12 19:48:12 +00:00
MachineLoopRanges.cpp Add MachineLoopRange comparators for sorting loop lists by number and by area. 2010-12-17 18:13:52 +00:00
MachineModuleInfo.cpp Turn push_back loops into append/insert. 2012-02-14 10:29:27 +00:00
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
MachineRegisterInfo.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
MachineScheduler.cpp MachineScheduler shouldn't use/preserve LiveDebugVariables. 2012-02-17 01:11:37 +00:00
MachineSink.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
MachineSSAUpdater.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
MachineVerifier.cpp Update MachineVerifier to check the new physreg live-in rules. 2012-02-14 19:17:48 +00:00
Makefile
OcamlGC.cpp
OptimizePHIs.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
Passes.cpp Fix machine-cp by having it to check sub-register indicies. e.g. 2012-02-20 23:28:17 +00:00
PeepholeOptimizer.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
PHIElimination.cpp RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 2012-02-10 04:10:36 +00:00
PHIEliminationUtils.cpp Move the FindCopyInsertPoint method of PHIElimination to a new standalone 2010-12-05 19:51:05 +00:00
PHIEliminationUtils.h Move the FindCopyInsertPoint method of PHIElimination to a new standalone 2010-12-05 19:51:05 +00:00
PostRASchedulerList.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
ProcessImplicitDefs.cpp RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 2012-02-10 04:10:36 +00:00
PrologEpilogInserter.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
PrologEpilogInserter.h Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
PseudoSourceValue.cpp More dead code removal (using -Wunreachable-code) 2012-01-20 21:51:11 +00:00
README.txt Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
RegAllocBase.cpp Sink spillInterferences into RABasic. 2012-01-11 22:52:14 +00:00
RegAllocBase.h Make data structures private. 2012-01-11 23:19:08 +00:00
RegAllocBasic.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
RegAllocFast.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
RegAllocGreedy.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
RegAllocPBQP.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
RegisterClassInfo.cpp Detect proper register sub-classes. 2011-08-05 21:28:14 +00:00
RegisterClassInfo.h Detect proper register sub-classes. 2011-08-05 21:28:14 +00:00
RegisterCoalescer.cpp Check regmask interference for -join-physregs. 2012-02-13 18:17:04 +00:00
RegisterCoalescer.h Tidy up. 2012-02-17 17:35:10 +00:00
RegisterScavenging.cpp Fix some scavenger performance issues. 2012-01-29 01:29:28 +00:00
RenderMachineFunction.cpp Fix typo in ruler. No functionality change. 2012-01-03 18:22:43 +00:00
RenderMachineFunction.h Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which 2010-10-19 17:21:58 +00:00
ScheduleDAG.cpp Don't print out pointer values in SUnit::dump(). 2012-02-17 21:44:51 +00:00
ScheduleDAGEmit.cpp createMCInstPrinter doesn't need TargetMachine anymore. 2011-07-06 19:45:42 +00:00
ScheduleDAGInstrs.cpp Clear virtual registers after they are no longer referenced. 2012-02-21 04:51:23 +00:00
ScheduleDAGInstrs.h misched: Initial code for building an MI level scheduling DAG 2012-01-14 02:17:18 +00:00
ScheduleDAGPrinter.cpp drop unneeded config.h includes 2011-12-22 23:04:07 +00:00
ScoreboardHazardRecognizer.cpp Remove unnecessary default cases in switches that cover all enum values. 2012-01-10 16:47:17 +00:00
ShadowStackGC.cpp [unwind removal] We no longer have 'unwind' instructions being generated, so 2012-02-06 21:16:41 +00:00
ShrinkWrapping.cpp Expose TargetPassConfig to PEI Pass 2012-02-06 22:51:18 +00:00
SjLjEHPrepare.cpp Place the GEP instructions nearer to the instructions which use them. 2012-01-27 02:02:24 +00:00
SlotIndexes.cpp Use the standard MachineFunction::print() after SlotIndexes. 2012-01-24 23:28:38 +00:00
Spiller.cpp Don't store COPY pointers in VNInfo. 2012-02-04 05:20:49 +00:00
Spiller.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
SpillPlacement.cpp Be more conservative when forming compact regions. 2011-08-03 23:09:38 +00:00
SpillPlacement.h Be more conservative when forming compact regions. 2011-08-03 23:09:38 +00:00
SplitKit.cpp Don't store COPY pointers in VNInfo. 2012-02-04 05:20:49 +00:00
SplitKit.h Make SplitAnalysis::UseSlots private. 2012-01-12 17:53:44 +00:00
StackProtector.cpp Enable stack protectors for all arrays, not just char arrays. rdar://5875909 2011-11-23 07:13:56 +00:00
StackSlotColoring.cpp StackSlotColoring does not use a VirtRegMap 2012-02-21 04:51:19 +00:00
StrongPHIElimination.cpp Remove dead code. Improve llvm_unreachable text. Simplify some control flow. 2012-02-19 11:37:01 +00:00
TailDuplication.cpp Make post-ra tail duplication bundle safe. No test case as recent codegen 2012-02-20 07:51:58 +00:00
TargetFrameLoweringImpl.cpp Move parts of lib/Target that use CodeGen into lib/CodeGen. 2011-12-15 22:58:58 +00:00
TargetInstrInfoImpl.cpp Extract method for detecting constant unallocatable physregs. 2012-01-16 22:34:08 +00:00
TargetLoweringObjectFileImpl.cpp ... and it's probably best to use the correct alignment, rather than just guessing that it's the same as the size. 2012-02-17 16:30:39 +00:00
TargetOptionsImpl.cpp Move parts of lib/Target that use CodeGen into lib/CodeGen. 2011-12-15 22:58:58 +00:00
TwoAddressInstructionPass.cpp RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 2012-02-10 04:10:36 +00:00
UnreachableBlockElim.cpp Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk. 2011-05-27 05:04:51 +00:00
VirtRegMap.cpp Transfer regmasks to MRI. 2012-02-17 19:07:56 +00:00
VirtRegMap.h More dead code elimination in VirtRegMap. 2011-11-13 01:23:34 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.