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855343fa29
We can't use short granules with stack instrumentation when targeting older API levels because the rest of the system won't understand the short granule tags stored in shadow memory. Moreover, we need to be able to let old binaries (which won't understand short granule tags) run on a new system that supports short granule tags. Such binaries will call the __hwasan_tag_mismatch function when their outlined checks fail. We can compensate for the binary's lack of support for short granules by implementing the short granule part of the check in the __hwasan_tag_mismatch function. Unfortunately we can't do anything about inline checks, but I don't believe that we can generate these by default on aarch64, nor did we do so when the ABI was fixed. A new function, __hwasan_tag_mismatch_v2, is introduced that lets code targeting the new runtime avoid redoing the short granule check. Because tag mismatches are rare this isn't important from a performance perspective; the main benefit is that it introduces a symbol dependency that prevents binaries targeting the new runtime from running on older (i.e. incompatible) runtimes. Differential Revision: https://reviews.llvm.org/D68059 llvm-svn: 373035
85 lines
2.6 KiB
LLVM
85 lines
2.6 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target triple = "aarch64--linux-android"
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define i8* @f1(i8* %x0, i8* %x1) {
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; CHECK: f1:
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; CHECK: str x30, [sp, #-16]!
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: mov x9, x0
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; CHECK-NEXT: bl __hwasan_check_x1_1
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; CHECK-NEXT: mov x0, x1
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: ret
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call void @llvm.hwasan.check.memaccess(i8* %x0, i8* %x1, i32 1)
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ret i8* %x1
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}
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define i8* @f2(i8* %x0, i8* %x1) {
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; CHECK: f2:
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; CHECK: str x30, [sp, #-16]!
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: mov x9, x1
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; CHECK-NEXT: bl __hwasan_check_x0_2_short
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: ret
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call void @llvm.hwasan.check.memaccess.shortgranules(i8* %x1, i8* %x0, i32 2)
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ret i8* %x0
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}
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declare void @llvm.hwasan.check.memaccess(i8*, i8*, i32)
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declare void @llvm.hwasan.check.memaccess.shortgranules(i8*, i8*, i32)
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; CHECK: .section .text.hot,"axG",@progbits,__hwasan_check_x0_2_short,comdat
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; CHECK-NEXT: .type __hwasan_check_x0_2_short,@function
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; CHECK-NEXT: .weak __hwasan_check_x0_2_short
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; CHECK-NEXT: .hidden __hwasan_check_x0_2_short
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; CHECK-NEXT: __hwasan_check_x0_2_short:
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; CHECK-NEXT: ubfx x16, x0, #4, #52
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; CHECK-NEXT: ldrb w16, [x9, x16]
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; CHECK-NEXT: cmp x16, x0, lsr #56
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; CHECK-NEXT: b.ne .Ltmp0
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; CHECK-NEXT: .Ltmp1:
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; CHECK-NEXT: ret
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: cmp w16, #15
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; CHECK-NEXT: b.hi .Ltmp2
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; CHECK-NEXT: and x17, x0, #0xf
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; CHECK-NEXT: add x17, x17, #3
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; CHECK-NEXT: cmp w16, w17
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; CHECK-NEXT: b.ls .Ltmp2
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; CHECK-NEXT: orr x16, x0, #0xf
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; CHECK-NEXT: ldrb w16, [x16]
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; CHECK-NEXT: cmp x16, x0, lsr #56
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; CHECK-NEXT: b.eq .Ltmp1
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: stp x0, x1, [sp, #-256]!
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; CHECK-NEXT: stp x29, x30, [sp, #232]
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; CHECK-NEXT: mov x1, #2
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; CHECK-NEXT: adrp x16, :got:__hwasan_tag_mismatch_v2
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; CHECK-NEXT: ldr x16, [x16, :got_lo12:__hwasan_tag_mismatch_v2]
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; CHECK-NEXT: br x16
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; CHECK: .section .text.hot,"axG",@progbits,__hwasan_check_x1_1,comdat
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; CHECK-NEXT: .type __hwasan_check_x1_1,@function
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; CHECK-NEXT: .weak __hwasan_check_x1_1
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; CHECK-NEXT: .hidden __hwasan_check_x1_1
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; CHECK-NEXT: __hwasan_check_x1_1:
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; CHECK-NEXT: ubfx x16, x1, #4, #52
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; CHECK-NEXT: ldrb w16, [x9, x16]
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; CHECK-NEXT: cmp x16, x1, lsr #56
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; CHECK-NEXT: b.ne .Ltmp3
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; CHECK-NEXT: .Ltmp4:
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; CHECK-NEXT: ret
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; CHECK-NEXT: .Ltmp3:
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; CHECK-NEXT: stp x0, x1, [sp, #-256]!
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; CHECK-NEXT: stp x29, x30, [sp, #232]
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; CHECK-NEXT: mov x0, x1
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; CHECK-NEXT: mov x1, #1
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; CHECK-NEXT: adrp x16, :got:__hwasan_tag_mismatch
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; CHECK-NEXT: ldr x16, [x16, :got_lo12:__hwasan_tag_mismatch]
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; CHECK-NEXT: br x16
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