Alex Bradbury 2b2d105ff9 [RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands ... Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546		2018-09-06 13:41:04 +00:00
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AArch64	[AArch64] Add Tiny Code Model for AArch64	2018-08-22 11:31:39 +00:00
AMDGPU	[AMDGPU] Add support for a16 modifiear for gfx9	2018-08-28 15:07:30 +00:00
ARM	[ARM/AArch64] Support FP16 +fp16fml instructions	2018-08-17 11:29:49 +00:00
AsmParser	[debuginfo] generate debug info with asm+.file	2018-08-28 16:23:39 +00:00
AVR	[AVR] Redefine the 'SBR' instruction as an alias	2018-09-01 12:22:54 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	[codeview] Emit labels for .cv_loc immediately	2018-08-28 22:29:12 +00:00
Disassembler	[WebAssembly] Made disassembler only use stack instructions.	2018-08-30 15:40:53 +00:00
ELF	Revert r340904 "[llvm-mc] - Allow to set custom flags for debug sections."	2018-08-29 09:04:52 +00:00
Hexagon	Check for tied operands	2018-08-13 14:01:25 +00:00
Lanai	[lanai] Add more tests for assembly of conditional ALU ops	2016-07-11 17:58:16 +00:00
MachO	[MC] Error on a .zerofill directive in a non-virtual section	2018-07-02 17:29:43 +00:00
Mips	[mips] Add missing instructions	2018-08-29 11:35:03 +00:00
PowerPC	[PowerPC][MC] Support expressions in getMemRIX16Encoding.	2018-08-27 17:37:43 +00:00
RISCV	[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands	2018-09-06 13:41:04 +00:00
Sparc	[Sparc] allow tls_add/tls_call syntax in assembler parser	2018-09-03 10:38:12 +00:00
SystemZ	[SystemZ, AsmParser] Enable the mnemonic spell corrector.	2017-07-18 09:17:00 +00:00
WebAssembly	[WebAssembly] Added default stack-only instruction mode for MC.	2018-08-27 15:45:51 +00:00
X86	[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.	2018-09-06 02:03:14 +00:00