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llvm-mirror/lib/Target/AMDGPU
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Rafael Espindola d77365c081 Fully fix the movw/movt addend. 
The issue is not if the value is pcrel. It is whether we have a
relocation or not.

If we have a relocation, the static linker will select the upper
bits. If we don't have a relocation, we have to do it.

llvm-svn: 307730
2017-07-11 23:18:25 +00:00
..
AsmParser
[AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG)
2017-07-07 15:21:52 +00:00
Disassembler
[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
2017-06-27 15:02:23 +00:00
InstPrinter
[AMDGPU] Add intrinsics for tbuffer load and store
2017-06-22 16:29:22 +00:00
MCTargetDesc
Fully fix the movw/movt addend.
2017-07-11 23:18:25 +00:00
TargetInfo
fix trivial typos; NFC
2017-07-02 03:24:54 +00:00
Utils
Revert "AMDGPU: Do not test for SI in getIsaVersion"
2017-07-11 17:57:41 +00:00
AMDGPU.h
AMDGPU: Remove SITypeRewriter
2017-06-28 21:38:50 +00:00
AMDGPU.td
[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
2017-06-27 15:02:23 +00:00
AMDGPUAliasAnalysis.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUAliasAnalysis.h
AMDGPU/R600: Fix amdgpu alias analysis pass.
2017-03-31 19:26:23 +00:00
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Testing commit access only, no real change
2017-06-15 23:02:55 +00:00
AMDGPUAnnotateKernelFeatures.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
AMDGPUAnnotateUniformValues.cpp
DivergencyAnalysis patch for review
2017-06-15 19:33:10 +00:00
AMDGPUAsmPrinter.cpp
Move Object format code to lib/BinaryFormat.
2017-06-07 03:48:56 +00:00
AMDGPUAsmPrinter.h
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUCallingConv.td
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUCallLowering.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUCallLowering.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] Always use rcp + mul with fast math
2017-07-06 20:34:21 +00:00
AMDGPUFrameLowering.cpp
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUFrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
AMDGPUGenRegisterBankInfo.def
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPUInstrInfo.cpp
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
2017-06-21 08:53:38 +00:00
AMDGPUInstrInfo.h
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUInstrInfo.td
[AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc
2017-06-21 22:05:06 +00:00
AMDGPUInstructions.td
[AMDGPU][MC] Added check for truncation of SOPK imm operand
2017-04-26 15:34:19 +00:00
AMDGPUInstructionSelector.cpp
AMDGPU: Start adding offset fields to flat instructions
2017-06-12 15:55:58 +00:00
AMDGPUInstructionSelector.h
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUIntrinsicInfo.cpp
Rename AttributeSet to AttributeList
2017-03-21 16:57:19 +00:00
AMDGPUIntrinsicInfo.h
AMDGPU: Change fdiv lowering based on !fpmath metadata
2016-07-19 23:16:53 +00:00
AMDGPUIntrinsics.td
AMDGPU: Remove legacy bfe intrinsics
2017-04-03 18:08:08 +00:00
AMDGPUISelDAGToDAG.cpp
AMDGPU: Start selecting flat instruction offsets
2017-06-12 16:53:51 +00:00
AMDGPUISelLowering.cpp
Fix some more -Wimplicit-fallthrough warnings. NFCI.
2017-07-07 16:40:06 +00:00
AMDGPUISelLowering.h
[AMDGPU] Add intrinsics for tbuffer load and store
2017-06-22 16:29:22 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal
2017-06-26 15:56:52 +00:00
AMDGPULegalizerInfo.h
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPULowerIntrinsics.cpp
Extend memcpy expansion in Transform/Utils to handle wider operand types.
2017-07-07 02:00:06 +00:00
AMDGPUMachineCFGStructurizer.cpp
fix trivial typos, NFC
2017-06-27 10:35:37 +00:00
AMDGPUMachineFunction.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPUMachineFunction.h
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUMacroFusion.cpp
AMDGPU: Add macro fusion schedule DAG mutation
2017-07-06 20:57:05 +00:00
AMDGPUMacroFusion.h
AMDGPU: Add macro fusion schedule DAG mutation
2017-07-06 20:57:05 +00:00
AMDGPUMCInstLower.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPUMCInstLower.h
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
2016-10-06 17:19:11 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
AMDGPUPromoteAlloca.cpp
[AMDGPU] Fix for issue in alloca to vector promotion pass
2017-06-09 14:16:22 +00:00
AMDGPUPTNote.h
[AMDGPU] Restructure code object metadata creation
2017-03-22 22:32:22 +00:00
AMDGPURegAsmNames.inc.cpp
AMDGPU: Work around build special casing .inc files
2017-06-08 19:25:21 +00:00
AMDGPURegisterBankInfo.cpp
[RegisterBankInfo] Uniquely allocate instruction mapping.
2017-05-05 22:48:22 +00:00
AMDGPURegisterBankInfo.h
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPURegisterBanks.td
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
2017-01-30 21:56:46 +00:00
AMDGPURegisterInfo.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
AMDGPURegisterInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.td
AMDGPU: Set SubRegIndex size and offset
2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp
[AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.
2017-07-07 10:18:57 +00:00
AMDGPUSubtarget.h
[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
2017-06-27 15:02:23 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Add macro fusion schedule DAG mutation
2017-07-06 20:57:05 +00:00
AMDGPUTargetMachine.h
TargetMachine: Indicate whether machine verifier passes.
2017-05-31 18:41:23 +00:00
AMDGPUTargetObjectFile.cpp
Move Object format code to lib/BinaryFormat.
2017-06-07 03:48:56 +00:00
AMDGPUTargetObjectFile.h
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
AMDGPUTargetTransformInfo.cpp
[LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
2017-06-28 15:53:17 +00:00
AMDGPUTargetTransformInfo.h
[LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
2017-06-28 15:53:17 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPU: Unify divergent function exits.
2017-03-24 19:52:05 +00:00
AMDGPUUnifyMetadata.cpp
[AMDGPU] Turn AMDGPUUnifyMetadata back into module pass
2017-01-27 16:38:10 +00:00
AMDILCFGStructurizer.cpp
Remove unused functions. Remove static qualifier from functions in header files. NFC.
2017-04-11 14:55:32 +00:00
AMDKernelCodeT.h
[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
2016-02-24 10:54:25 +00:00
BUFInstructions.td
[AMDGPU] Add intrinsics for tbuffer load and store
2017-06-22 16:29:22 +00:00
CaymanInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
CIInstructions.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
CMakeLists.txt
AMDGPU: Add macro fusion schedule DAG mutation
2017-07-06 20:57:05 +00:00
DSInstructions.td
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
2017-05-31 16:26:47 +00:00
EvergreenInstructions.td
AMDGPU: Fix unnecessary ands when packing f16 vectors
2017-03-15 19:04:26 +00:00
FLATInstructions.td
AMDGPU: Start adding global_* instructions
2017-06-20 19:54:14 +00:00
GCNHazardRecognizer.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
GCNHazardRecognizer.h
AMDGPU: Fix broken condition in hazard recognizer
2017-03-17 21:36:28 +00:00
GCNIterativeScheduler.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
GCNIterativeScheduler.h
[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
2017-03-21 13:15:46 +00:00
GCNMinRegStrategy.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
GCNRegPressure.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
GCNRegPressure.h
[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
2017-05-22 13:09:40 +00:00
GCNSchedStrategy.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
GCNSchedStrategy.h
[AMDGPU] Cache live-ins and register pressure in scheduler
2017-05-16 16:11:26 +00:00
LLVMBuild.txt
AMDGPU: Add GlobalISel to required_libraries.
2017-01-28 18:13:08 +00:00
MIMGInstructions.td
[AMDGPU] Fix latency of MIMG instructions
2017-07-04 14:43:38 +00:00
Processors.td
AMDGPU: Whitespace fixes
2017-06-26 03:01:36 +00:00
R600ClauseMergePass.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600ControlFlowFinalizer.cpp
[AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.
2017-07-07 10:18:57 +00:00
R600Defines.h
AMDGPU: R600 code splitting cleanup
2016-03-11 08:00:27 +00:00
R600EmitClauseMarkers.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
R600ExpandSpecialInstrs.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
R600FrameLowering.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
R600FrameLowering.h
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
2017-03-10 19:39:07 +00:00
R600InstrFormats.td
AMDGPU/R600: Convert buffer id to VTX_READ input
2016-08-15 21:38:30 +00:00
R600InstrInfo.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
R600InstrInfo.h
Cyle -> Cycle; NFCI
2017-03-15 15:37:42 +00:00
R600Instructions.td
[AMDGPU] Get address space mapping by target triple environment
2017-03-27 14:04:01 +00:00
R600Intrinsics.td
AMDGPU: Make intrinsics speculatable
2017-05-02 16:57:44 +00:00
R600ISelLowering.cpp
Add DAG argument to canMergeStoresTo NFC.
2017-07-10 20:25:54 +00:00
R600ISelLowering.h
Add DAG argument to canMergeStoresTo NFC.
2017-07-10 20:25:54 +00:00
R600MachineFunctionInfo.cpp
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineFunctionInfo.h
AMDGPU: Delete more dead code
2016-07-22 17:01:25 +00:00
R600MachineScheduler.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
R600MachineScheduler.h
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2016-12-09 22:06:55 +00:00
R600OptimizeVectorRegisters.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
R600Packetizer.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
R600RegisterInfo.cpp
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
R600RegisterInfo.h
AMDGPU: Start defining a calling convention
2017-05-17 21:56:25 +00:00
R600RegisterInfo.td
[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
2017-05-23 21:27:15 +00:00
R600Schedule.td
AMDGPU: Fix trailing whitespace
2016-06-10 02:18:02 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
Remove now useless trailing nullptr in StructType::get
2017-05-11 08:46:02 +00:00
SIDebuggerInsertNops.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
SIDefines.h
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
2017-06-21 08:53:38 +00:00
SIFixControlFlowLiveIntervals.cpp
Use StringRef in Pass/PassManager APIs (NFC)
2016-10-01 02:56:57 +00:00
SIFixSGPRCopies.cpp
[AMDGPU] Eliminate SGPR to VGPR copy when possible
2017-06-20 18:32:42 +00:00
SIFixVGPRCopies.cpp
[AMDGPU] Add VGPR copies post regalloc fix pass
2017-01-24 17:46:17 +00:00
SIFoldOperands.cpp
[AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.
2017-07-07 10:18:57 +00:00
SIFrameLowering.cpp
AMDGPU: Setup SP/FP in callee function prolog/epilog
2017-06-26 17:53:59 +00:00
SIFrameLowering.h
AMDGPU: Setup SP/FP in callee function prolog/epilog
2017-06-26 17:53:59 +00:00
SIInsertSkips.cpp
AMDGPU: Rename SI_RETURN
2017-03-21 22:18:10 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] Fix uninit'ed var (RevisitLoop)
2017-06-05 19:29:01 +00:00
SIInsertWaits.cpp
AMDGPU: Make auto waitcnt before barrier a feature
2017-06-02 17:40:26 +00:00
SIInstrFormats.td
[AMDGPU][MC] Fixed bugs in export instruction
2017-05-19 13:36:09 +00:00
SIInstrInfo.cpp
[AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI.
2017-07-07 10:18:57 +00:00
SIInstrInfo.h
AMDGPU: Add operand target flags serialization
2017-07-02 23:21:48 +00:00
SIInstrInfo.td
[AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_MAD_MIX*
2017-07-07 14:29:06 +00:00
SIInstructions.td
[AMDGPU] Add pattern for v_alignbit_b32 with immediate
2017-06-28 02:52:39 +00:00
SIIntrinsics.td
AMDGPU: Remove legacy export intrinsic
2017-04-04 16:34:39 +00:00
SIISelLowering.cpp
Add DAG argument to canMergeStoresTo NFC.
2017-07-10 20:25:54 +00:00
SIISelLowering.h
Add DAG argument to canMergeStoresTo NFC.
2017-07-10 20:25:54 +00:00
SILoadStoreOptimizer.cpp
[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 17:21:13 +00:00
SILowerControlFlow.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
SILowerI1Copies.cpp
Sort the remaining #include lines in include/... and lib/....
2017-06-06 11:49:48 +00:00
SIMachineFunctionInfo.cpp
AMDGPU: Setup SP/FP in callee function prolog/epilog
2017-06-26 17:53:59 +00:00
SIMachineFunctionInfo.h
AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
2017-06-26 03:01:31 +00:00
SIMachineScheduler.cpp
[CodeGen] Rename DEBUG_TYPE to match passnames
2017-07-11 22:08:28 +00:00
SIMachineScheduler.h
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
2017-03-28 07:19:48 +00:00
SIOptimizeExecMasking.cpp
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
2016-10-07 08:40:14 +00:00
SIPeepholeSDWA.cpp
[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
2017-06-27 15:02:23 +00:00
SIRegisterInfo.cpp
AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
2017-06-26 03:01:31 +00:00
SIRegisterInfo.h
AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
2017-06-26 03:01:31 +00:00
SIRegisterInfo.td
AMDGPU: Fix not including v2i16/v2f16 in register class
2017-03-21 16:42:50 +00:00
SISchedule.td
AMDGPU: Implement early ifcvt target hooks.
2017-01-25 04:25:02 +00:00
SIShrinkInstructions.cpp
AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes
2017-07-10 20:04:35 +00:00
SIWholeQuadMode.cpp
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
2016-12-09 22:06:55 +00:00
SMInstructions.td
AMDGPUAnnotateUniformValue should always treat volatile loads as divergent
2017-06-02 15:25:52 +00:00
SOPInstructions.td
Resubmit r303859 with test fixed.
2017-05-26 20:38:26 +00:00
VIInstrFormats.td
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
2016-09-23 09:08:07 +00:00
VIInstructions.td
AMDGPU: Add VI i16 support
2016-11-10 16:02:37 +00:00
VOP1Instructions.td
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
2017-06-21 08:53:38 +00:00
VOP2Instructions.td
[AMDGPU] SDWA: remove support for VOP2 instructions that have only 64-bit encoding
2017-06-22 12:42:14 +00:00
VOP3Instructions.td
[AMDGPU] Add intrinsics for alignbit and alignbyte instructions
2017-06-09 19:03:00 +00:00
VOP3PInstructions.td
[AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_MAD_MIX*
2017-07-07 14:29:06 +00:00
VOPCInstructions.td
[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
2017-06-21 08:53:38 +00:00
VOPInstructions.td
[AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG)
2017-07-07 15:21:52 +00:00