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fdd7b1d490
Split the `zcz` feature into specific ones got GP and FP registers, `zcz-gp` and `zcz-fp`, respectively, while retaining the original feature option to mean both. Differential revision: https://reviews.llvm.org/D52621 llvm-svn: 343354
24 lines
777 B
LLVM
24 lines
777 B
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios -mattr=-zcm | FileCheck %s -check-prefixes=CHECK,NOT
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; RUN: llc < %s -mtriple=arm64-apple-ios -mattr=+zcm | FileCheck %s -check-prefixes=CHECK,YES
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; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s -check-prefixes=CHECK,YES
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; rdar://12254953
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define i32 @t(i32 %a, i32 %b, i32 %c, i32 %d) nounwind ssp {
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entry:
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; CHECK-LABEL: t:
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; NOT: mov [[REG2:w[0-9]+]], w3
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; NOT: mov [[REG1:w[0-9]+]], w2
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; YES: mov [[REG2:x[0-9]+]], x3
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; YES: mov [[REG1:x[0-9]+]], x2
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; CHECK: bl _foo
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; NOT: mov w0, [[REG1]]
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; NOT: mov w1, [[REG2]]
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; YES: mov x0, [[REG1]]
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; YES: mov x1, [[REG2]]
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%call = call i32 @foo(i32 %c, i32 %d) nounwind
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%call1 = call i32 @foo(i32 %c, i32 %d) nounwind
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unreachable
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}
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declare i32 @foo(i32, i32)
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