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36b7b3c0fa
This patch changes isFPImmLegal to return if the value can be enconded as the immediate operand of a logical instruction besides checking if for immediate field for fmov. This optimizes some floating point materization, inclusive values used on isinf lowering. Reviewed By: rengolin, efriedma, evandro Differential Revision: https://reviews.llvm.org/D57044 llvm-svn: 352866
174 lines
5.4 KiB
LLVM
174 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s
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define double @test1(double %a, double %b) {
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; CHECK-LABEL: test1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, -2.000000e+00
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%add1 = fadd double %a, %mul
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ret double %add1
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}
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; DAGCombine will canonicalize 'a - 2.0*b' to 'a + -2.0*b'
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define double @test2(double %a, double %b) {
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; CHECK-LABEL: test2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd d1, d1, d1
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %b, 2.000000e+00
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%add1 = fsub double %a, %mul
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ret double %add1
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}
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define double @test3(double %a, double %b, double %c) {
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; CHECK-LABEL: test3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, 2.000000e+00
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%sub = fsub double %mul, %mul1
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ret double %sub
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}
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define double @test4(double %a, double %b, double %c) {
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; CHECK-LABEL: test4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d2
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; CHECK-NEXT: fsub d0, d0, d1
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; CHECK-NEXT: ret
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%mul = fmul double %a, %b
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%mul1 = fmul double %c, -2.000000e+00
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%add2 = fadd double %mul, %mul1
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ret double %add2
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}
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define <4 x float> @fmulnegtwo_vec(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_commute:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float undef, float -2.0, float undef, float -2.0>
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%add = fadd <4 x float> %a, %mul
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ret <4 x float> %add
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}
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define <4 x float> @fmulnegtwo_vec_commute_undefs(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: fmulnegtwo_vec_commute_undefs:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float -2.0, float undef, float -2.0, float -2.0>
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%add = fadd <4 x float> %mul, %a
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ret <4 x float> %add
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}
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define <4 x float> @test6(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: test6:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
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; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%mul = fmul <4 x float> %b, <float 2.0, float 2.0, float 2.0, float 2.0>
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%add = fsub <4 x float> %a, %mul
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ret <4 x float> %add
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}
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; Don't fold (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)) if the fmul has
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; multiple uses.
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define double @test7(double %a, double %b) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: fmov d2, #-2.00000000
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; CHECK-NEXT: fmul d1, d1, d2
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; CHECK-NEXT: fadd d8, d0, d1
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; CHECK-NEXT: mov v0.16b, v1.16b
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; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
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; CHECK-NEXT: bl use
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; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
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; CHECK-NEXT: mov v0.16b, v8.16b
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; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%mul = fmul double %b, -2.000000e+00
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%add1 = fadd double %a, %mul
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call void @use(double %mul)
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ret double %add1
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}
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define float @fadd_const_multiuse_fmf(float %x) {
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; CHECK-LABEL: fadd_const_multiuse_fmf:
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; CHECK: // %bb.0:
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; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
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; CHECK-DAG: mov [[W42:w[0-9]+]], #1109917696
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; CHECK-DAG: fmov [[FP59:s[0-9]+]], [[W59]]
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; CHECK-DAG: fmov [[FP42:s[0-9]+]], [[W42]]
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; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP42]]
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; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], s0, [[FP59]]
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; CHECK-NEXT: fadd s0, [[TMP1]], [[TMP2]]
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; CHECK-NEXT: ret
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%a1 = fadd float %x, 42.0
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%a2 = fadd nsz reassoc float %a1, 17.0
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%a3 = fadd float %a1, %a2
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ret float %a3
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}
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; DAGCombiner transforms this into: (x + 59.0) + (x + 17.0).
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; The machine combiner transforms this into a chain of 3 dependent adds:
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; ((x + 59.0) + 17.0) + x
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define float @fadd_const_multiuse_attr(float %x) #0 {
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; CHECK-LABEL: fadd_const_multiuse_attr:
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; CHECK: // %bb.0:
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; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
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; CHECK-DAG: mov [[W17:w[0-9]+]], #1109917696
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; CHECK-NEXT: fmov [[FP59:s[0-9]+]], [[W59]]
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; CHECK-NEXT: fmov [[FP17:s[0-9]+]], [[W17]]
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; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP59]]
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; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], [[FP17]], [[TMP1]]
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; CHECK-NEXT: fadd s0, s0, [[TMP2]]
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; CHECK-NEXT: ret
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%a1 = fadd float %x, 42.0
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%a2 = fadd float %a1, 17.0
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%a3 = fadd float %a1, %a2
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ret float %a3
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}
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attributes #0 = { "unsafe-fp-math"="true" }
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declare void @use(double)
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