llvm-mirror/test/CodeGen/AArch64/win_cst_pool.ll
Adhemerval Zanella 36b7b3c0fa [AArch64] Optimize floating point materialization
This patch changes isFPImmLegal to return if the value can be enconded
as the immediate operand of a logical instruction besides checking if
for immediate field for fmov.

This optimizes some floating point materization, inclusive values
used on isinf lowering.

Reviewed By: rengolin, efriedma, evandro

Differential Revision: https://reviews.llvm.org/D57044

llvm-svn: 352866
2019-02-01 12:26:06 +00:00

25 lines
920 B
LLVM

; RUN: llc < %s -mtriple=aarch64-win32-msvc | FileCheck %s
; RUN: llc < %s -mtriple=aarch64-win32-gnu | FileCheck -check-prefix=MINGW %s
define double @double() {
ret double 0x0000000000800001
}
; CHECK: .globl __real@0000000000800001
; CHECK-NEXT: .section .rdata,"dr",discard,__real@0000000000800001
; CHECK-NEXT: .p2align 3
; CHECK-NEXT: __real@0000000000800001:
; CHECK-NEXT: .xword 8388609
; CHECK: double:
; CHECK: adrp x8, __real@0000000000800001
; CHECK-NEXT: ldr d0, [x8, __real@0000000000800001]
; CHECK-NEXT: ret
; MINGW: .section .rdata,"dr"
; MINGW-NEXT: .p2align 3
; MINGW-NEXT: [[LABEL:\.LC.*]]:
; MINGW-NEXT: .xword 8388609
; MINGW: double:
; MINGW: adrp x8, [[LABEL]]
; MINGW-NEXT: ldr d0, [x8, [[LABEL]]]
; MINGW-NEXT: ret