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dc9a43dec1
This implements execute-only support for ARM code generation, which prevents the compiler from generating data accesses to code sections. The following changes are involved: * Add the CodeGen option "-arm-execute-only" to the ARM code generator. * Add the clang flag "-mexecute-only" as well as the GCC-compatible alias "-mpure-code" to enable this option. * When enabled, literal pools are replaced with MOVW/MOVT instructions, with VMOV used in addition for floating-point literals. As the MOVT instruction is required, execute-only support is only available in Thumb mode for targets supporting ARMv8-M baseline or Thumb2. * Jump tables are placed in data sections when in execute-only mode. * The execute-only text section is assigned section ID 0, and is marked as unreadable with the SHF_ARM_PURECODE flag with symbol 'y'. This also overrides selection of ELF sections for globals. llvm-svn: 289784
45 lines
1.1 KiB
ArmAsm
45 lines
1.1 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple thumbv7m-arm-linux-gnu %s -o - \
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// RUN: | llvm-readobj -s -t | FileCheck %s
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.section .text,"axy",%progbits,unique,0
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.globl foo
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.align 2
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.type foo,%function
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.code 16
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.thumb_func
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foo:
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.fnstart
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bx lr
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.Lfunc_end0:
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.size foo, .Lfunc_end0-foo
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.fnend
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.section ".note.GNU-stack","",%progbits
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// CHECK: Section {
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// CHECK: Name: .text (16)
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// CHECK-NEXT: Type: SHT_PROGBITS (0x1)
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// CHECK-NEXT: Flags [ (0x6)
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// CHECK-NEXT: SHF_ALLOC (0x2)
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// CHECK-NEXT: SHF_EXECINSTR (0x4)
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// CHECK-NEXT: ]
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// CHECK: Size: 0
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// CHECK: }
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// CHECK: Section {
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// CHECK: Name: .text (16)
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// CHECK-NEXT: Type: SHT_PROGBITS (0x1)
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// CHECK-NEXT: Flags [ (0x20000006)
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// CHECK-NEXT: SHF_ALLOC (0x2)
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// CHECK-NEXT: SHF_ARM_PURECODE (0x20000000)
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// CHECK-NEXT: SHF_EXECINSTR (0x4)
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// CHECK-NEXT: ]
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// CHECK: Size: 2
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// CHECK: }
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// CHECK: Symbol {
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// CHECK: Name: foo (22)
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// CHECK: Section: .text (0x3)
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// CHECK: }
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