Vikram S. Adve 540655e2ae Minor changes. ...

llvm-svn: 6470

2003-05-31 07:41:54 +00:00

..

InstrSched

Changes to allow explicit physical register arguments that have been

2003-05-31 07:37:05 +00:00

InstrSelection

Added MachineCodeForInstruction object as an argument to

2003-05-31 07:41:24 +00:00

Mapping

moved this file from lib/Reoptimizer/Mapping

2002-08-27 22:47:33 +00:00

ModuloScheduling

so far everything compiles

2003-05-30 00:17:09 +00:00

PostOpts

Peephole optimization pass on final machine code.

2002-09-20 00:42:11 +00:00

PreOpts

Moving these files from Code/PreSelection to here.

2002-09-20 00:29:28 +00:00

RegAlloc

Minor changes.

2003-05-31 07:41:54 +00:00

LiveVariables.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

MachineCodeEmitter.cpp

Added saveBBreferences() for BasicBlock resolution.

2003-05-30 20:32:45 +00:00

MachineCodeForInstruction.cpp

Move CallArgsDescriptor into this class instead of making it an

2002-10-29 19:38:46 +00:00

MachineFunction.cpp

Remove unneccesary &*

2003-04-23 16:36:11 +00:00

MachineInstr.cpp

Allow explicit physical registers for implicit operands.

2003-05-31 07:39:06 +00:00

MachineInstrAnnot.cpp

Prune #includes

2003-01-15 19:48:13 +00:00

Makefile

Initial checkin of codegen infrastructure for LLVM-JIT

2002-10-25 22:54:41 +00:00

PHIElimination.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

PrologEpilogInserter.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocLocal.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocSimple.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00