..
AArch64
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
AMDGPU
Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser."
2018-09-12 07:05:30 +00:00
ARM
[DWARF] Refactoring range list dumping to fold DWARF v4 functionality into v5 handling
2018-09-12 12:01:19 +00:00
AsmParser
[debuginfo] generate debug info with asm+.file
2018-08-28 16:23:39 +00:00
AVR
[AVR] Redefine the 'SBR' instruction as an alias
2018-09-01 12:22:54 +00:00
BPF
bpf: New disassembler testcases for 32-bit subregister support
2018-02-23 23:49:35 +00:00
COFF
[codeview] Add .cv_string directive for testing purposes
2018-09-07 21:30:52 +00:00
Disassembler
[WebAssembly] v8x16.shuffle
2018-09-07 21:54:46 +00:00
ELF
The initial .text section generated in object files was missing the
2018-09-06 22:09:31 +00:00
Hexagon
Check for tied operands
2018-08-13 14:01:25 +00:00
Lanai
MachO
[MC] Error on a .zerofill directive in a non-virtual section
2018-07-02 17:29:43 +00:00
Mips
[mips] Add missing instructions
2018-08-29 11:35:03 +00:00
PowerPC
[PowerPC][MC] Support expressions in getMemRIX16Encoding.
2018-08-27 17:37:43 +00:00
RISCV
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
Sparc
[Sparc] allow tls_add/tls_call syntax in assembler parser
2018-09-03 10:38:12 +00:00
SystemZ
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
2017-07-18 09:17:00 +00:00
WebAssembly
[WebAssembly] Added default stack-only instruction mode for MC.
2018-08-27 15:45:51 +00:00
X86
[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.
2018-09-06 02:03:14 +00:00