20 Commits

Author SHA1 Message Date
Jim Lin bb9a8828e4 [AVR] Fix incorrect source regclass of LDWRdPtr
Summary:
LDWRdPtr would be expanded to ld+ldd. ldd only accepts the pointer register is Y or Z.
So the register class of pointer of LDWRdPtr should be PTRDISPREGS instead of PTRREGS.

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: dylanmckay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362351 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-03 02:31:07 +00:00
Dylan McKay 31dcac0185 [AVR] Fix codegen bug in 16-bit loads
Prior to this patch, the AVR::LDWRdPtr instruction was always lowered to
instructions of this pattern:

    ld  $GPR8, [PTR:XYZ]+
    ld  $GPR8, [PTR]+1

This has a problem; the [PTR] is incremented in-place once, but never
decremented.

Future uses of the same pointer will use the now clobbered value,
leading to the pointer being incorrect by an offset of one.

This patch modifies the expansion code of the LDWRdPtr pseudo
instruction so that the pointer variable is not silently clobbered in
future uses in the same live range.

Bug first reported by Keshav Kini.

Patch by Kaushik Phatak.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351673 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-20 03:41:08 +00:00
Dylan McKay cacb637670 Revert "[AVR] Fix codegen bug in 16-bit loads"
This reverts commit r351544.

In that commit, I had mistakenly misattributed the issue submitter as
the patch author, Kaushik Phatak.

The patch will be recommitted immediately with the correct attribution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351672 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-20 03:41:00 +00:00
Dylan McKay 912adb1a84 [AVR] Fix codegen bug in 16-bit loads
Prior to this patch, the AVR::LDWRdPtr instruction was always lowered to
instructions of this pattern:

    ld  $GPR8, [PTR:XYZ]+
    ld  $GPR8, [PTR]+1

This has a problem; the [PTR] is incremented in-place once, but never
decremented.

Future uses of the same pointer will use the now clobbered value,
leading to the pointer being incorrect by an offset of one.

This patch modifies the expansion code of the LDWRdPtr pseudo
instruction so that the pointer variable is not silently clobbered in
future uses in the same live range.

Patch by Keshav Kini.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351544 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-18 11:27:38 +00:00
Dylan McKay 9de46729ce [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination
This is an AVR-specific workaround for a limitation of the register
allocator that only exposes itself on targets with high register
contention like AVR, which only has three pointer registers.

The three pointer registers are X, Y, and Z.
In most nontrivial functions, Y is reserved for the frame pointer,
as per the calling convention. This leaves X and Z. Some instructions,
such as LPM ("load program memory"), are only defined for the Z
register. Sometimes this just leaves X.

When the backend generates a LDDWRdPtrQ instruction with Z as the
destination pointer, it usually trips up the register allocator
with this error message:

  LLVM ERROR: ran out of registers during register allocation

This patch is a hacky workaround. We ban the LDDWRdPtrQ instruction
from ever using the Z register as an operand. This gives the
register allocator a bit more space to allocate, fixing the
regalloc exhaustion error.

Here is a description from the patch author Peter Nimmervoll

  As far as I understand the problem occurs when LDDWRdPtrQ uses
  the ptrdispregs register class as target register. This should work, but
  the allocator can't deal with this for some reason. So from my testing,
  it seams like (and I might be totally wrong on this) the allocator reserves
  the Z register for the ICALL instruction and then the register class
  ptrdispregs only has 1 register left and we can't use Y for source and
  destination. Removing the Z register from DREGS fixes the problem but
  removing Y register does not.

More information about the bug can be found on the avr-rust issue
tracker at https://github.com/avr-rust/rust/issues/37.

A bug has raised to track the removal of this workaround and a proper
fix; PR39553 at https://bugs.llvm.org/show_bug.cgi?id=39553.

Patch by Peter Nimmervoll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346114 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-05 05:00:44 +00:00
Dylan McKay 001bbba7fe [AVR] Redefine the 'LSL' instruction as an alias of 'ADD'
The 'LSL Rd' instruction is equivalent to 'ADD Rd, Rd'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341278 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-01 12:23:00 +00:00
Dylan McKay 855b4f981a [AVR] Define the ROL instruction as an alias of ADC
The 'rol Rd' instruction is equivalent to 'adc Rd'.

This caused compile warnings from tablegen because of conflicting bits
shared between each instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341275 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-01 12:22:07 +00:00
Dylan McKay 80d11db652 [AVR] Fix the testsuite after '%' changed to '$' in MIR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324583 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 09:17:11 +00:00
Dylan McKay f0dc6f9696 [AVR] Elaborate LDWRdPtr into ld r, X++; ld r+1, X
Patch by Gergo Erdi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314896 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 10:33:36 +00:00
Dylan McKay 5cd68f35c8 [AVR] Fix test errors due to tied operands not matching
Broken due to r307259.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-09 16:36:35 +00:00
Dylan McKay 0226ba2373 [AVR] Support the LDWRdPtr instruction with the same Src+Dst register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301313 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-25 15:09:04 +00:00
Matthias Braun 3f55d742b2 MIRTests: Remove unnecessary 2>&1 redirection
llc mir output goes to stdout nowadays, so the 2>&1 is not necessary
anymore for most tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295859 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-22 18:47:41 +00:00
Dylan McKay cf8a46b934 [AVR] Marm MIR test functions as tracking liveness information
This fixes an assertion error that broke three tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294140 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-05 20:25:34 +00:00
Dylan McKay c2e1f83474 [AVR] Explicitly set the target in all CodeGen tests
This seems to have caused failures on the buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289324 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 11:23:16 +00:00
Dylan McKay c7e7557a51 [AVR] Use the register scavenger when expanding 'LDDW' instructions
Summary: This gets rid of the hardcoded 'r0' that was used previously.

Reviewers: asl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 10:51:55 +00:00
Dylan McKay 5aeda31aad [AVR] Remove a set of redundant tests
This fixes the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289201 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-09 11:22:26 +00:00
Dylan McKay 153fa865c6 [AVR] Add tests for a large number of pseudo instructions
This adds MIR tests for 24 pseudo instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289191 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-09 07:49:04 +00:00
Dylan McKay 8f6ef5fefd [AVR] Add MIR tests for pseudo instruction expansions
This adds tests for 13 pseudo instruction expansions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289039 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-08 10:52:13 +00:00
Dylan McKay 119507f5af [AVR] Add MIR tests for a few pseudo instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289031 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-08 08:54:41 +00:00
Dylan McKay f7450dd95f [AVR] Move a pseudo expansion test into a folder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288899 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-07 11:21:45 +00:00