41 Commits

Author SHA1 Message Date
Tom Stellard
f02d6fd47c AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
Summary:
MCTargetDesc/AMDGPUMCTargetDesc.h contains enums for all the instuction
and register defintions, which are huge so we only want to include
them where needed.

This will also make it easier if we want to split the R600 and GCN
definitions into separate tablegenerated files.

I was unable to remove AMDGPUMCTargetDesc.h from SIMachineFunctionInfo.h
because it uses some enums from the header to initialize default values
for the SIMachineFunction class, so I ended up having to remove includes of
SIMachineFunctionInfo.h from headers too.

Reviewers: arsenm, nhaehnle

Reviewed By: nhaehnle

Subscribers: MatzeB, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D46272

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332930 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-22 02:03:23 +00:00
Nicola Zaghen
0818e789cb Rename DEBUG macro to LLVM_DEBUG.
The DEBUG() macro is very generic so it might clash with other projects.
The renaming was done as follows:
- git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g'
- git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM
- Manual change to APInt
- Manually chage DOCS as regex doesn't match it.

In the transition period the DEBUG() macro is still present and aliased
to the LLVM_DEBUG() one.

Differential Revision: https://reviews.llvm.org/D43624



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332240 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-14 12:53:11 +00:00
Shiva Chen
24abe71d71 [DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.

This patch has no new test case. I have run regression test and there is
no difference in regression test.

Differential Revision: https://reviews.llvm.org/D45342

Patch by Hsiangkai Wang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331844 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-09 02:42:00 +00:00
Adrian Prantl
26b584c691 Remove \brief commands from doxygen comments.
We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

  for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331272 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-01 15:54:18 +00:00
Jonas Paulsson
a83aa7ca2e [MachineScheduler] NFC refactoring
This patch makes tryCandidate() virtual and some utility functions like
tryLess(), tryGreater(), ... externally available (used to be static).

This makes it possible for a target to derive a new MachineSchedStrategy from
GenericScheduler and reuse most parts.

It was necessary to wrap functions with the same names in
AMDGPU/SIMachineScheduler in a local namespace.

Review: Andy Trick, Florian Hahn
https://reviews.llvm.org/D43329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329884 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-12 07:21:39 +00:00
Matthias Braun
fa621d294f Rename LiveIntervalAnalysis.h to LiveIntervals.h
Headers/Implementation files should be named after the class they
declare/define.

Also eliminated an `#include "llvm/CodeGen/LiveIntervalAnalysis.h"` in
favor of `class LiveIntarvals;`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320546 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-13 02:51:04 +00:00
Francis Visoiu Mistrih
ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Francis Visoiu Mistrih
accb337c76 [CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
  Function names should be verb phrases (as they represent actions), and
  command-like function should be imperative. The name should be camel
  case, and start with a lower case letter (e.g. openFile() or isFoo()).

Differential Revision: https://reviews.llvm.org/D40416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319168 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-28 12:42:37 +00:00
David Blaikie
e3a9b4ce3a Fix a bunch more layering of CodeGen headers that are in Target
All these headers already depend on CodeGen headers so moving them into
CodeGen fixes the layering (since CodeGen depends on Target, not the
other way around).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318490 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-17 01:07:10 +00:00
Marek Olsak
6044a148c6 AMDGPU/SI: Fix Depth and Height computation for SI scheduler
Patch by: Axel Davy

Differential Revision: https://reviews.llvm.org/D34967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-25 20:37:03 +00:00
Marek Olsak
343cb90d28 AMDGPU/SI: Force exports at the end for SI scheduler
Patch by: Axel Davy

Differential Revision: https://reviews.llvm.org/D34965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-25 20:36:58 +00:00
Evandro Menezes
fdda7ea9d5 [CodeGen] Rename DEBUG_TYPE to match passnames
Rename missing DEBUG_TYPE "machine-scheduler" from backend files, which were
absent from https://reviews.llvm.org/rL303921.

Differential revision: https://reviews.llvm.org/D35231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307719 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 22:08:28 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Valery Pykhtin
072955ea76 [AMDGPU] Update SI scheduler colorHighLatenciesGroups
Depends on rL298896: MachineScheduler/ScheduleDAG: Add support for GetSubGraph

Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298902 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-28 07:19:48 +00:00
Valery Pykhtin
bc04e5d6d2 [AMDGPU] SISched: Detect dependency types between blocks
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298872 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 18:22:39 +00:00
Valery Pykhtin
96f1d455e7 [AMDGPU] SISched: Update colorEndsAccordingToDependencies
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298861 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 17:26:40 +00:00
Valery Pykhtin
2a867a816e [AMDGPU] Fix SI scheduler LiveOut Refcount issue
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30145

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298857 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 17:06:36 +00:00
Benjamin Kramer
65bb8eff35 [AMDGPU] Don't enforce constexpr, there are still old standard libraries around that don't have a constexpr std::pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298719 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 17:53:06 +00:00
Valery Pykhtin
80aca9b9aa [AMDGPU] Remove double map lookups in SI scheduler
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30382

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298718 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 17:49:05 +00:00
Valery Pykhtin
5792952b40 [AMDGPU] Fix SGPR usage count in SI scheduler
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30149

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298710 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 16:45:50 +00:00
Valery Pykhtin
4ec90bf9ea [AMDGPU] Add a new line after a debug message
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298708 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 16:37:48 +00:00
Benjamin Kramer
54c10c042d Don't build up std::vectors with constant sizes when an array suffices.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298701 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 14:11:47 +00:00
Matt Arsenault
61ec8435ca AMDGPU: Fixed '!NodePtr->isKnownSentinel()' assert
Caused by dereferencing end iterator when trying to const cast the iterator.

Patch by Martin Sherburn

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290347 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-22 16:06:32 +00:00
Eugene Zelenko
359c877504 [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289475 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-12 22:23:53 +00:00
Simon Pilgrim
9f23214cb5 Fix spelling mistakes in AMDGPU target comments. NFC.
Identified by Pedro Giffuni in PR27636.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287333 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-18 11:04:02 +00:00
Tom Stellard
8de9275a0e AMDGPU/SI: Use a better method for determining the largest pressure sets
Summary:
There are a few different sgpr pressure sets, but we only care about
the one which covers all of the sgprs.  We were using hard-coded
register pressure set names to determine the reg set id for the
biggest sgpr set.  However, we were using the wrong name, and this
method is pretty fragile, since the reg pressure set names may
change.

The new method just looks for the pressure set that contains the most
reg units and sets that set as our SGPR pressure set.  We've also
adopted the same technique for determining our VGPR pressure set.

Reviewers: arsenm

Subscribers: MatzeB, arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279867 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-26 21:16:37 +00:00
David Majnemer
975248e4fb Use the range variant of find instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278433 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-11 22:21:41 +00:00
Matt Arsenault
44cd439f9a AMDGPU: Prune includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278391 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-11 19:18:50 +00:00
Matt Arsenault
530f0c21c6 AMDGPU/SI: Fix SI scheduler refcount issue
Without this fix, releaseSuccessors when InOrOutBlock is
false could release SUs outside the schedule BasicBlock.

Patch by Axel Davy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275935 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 00:35:22 +00:00
Matt Arsenault
a7c46f7a1f AMDGPU/SI: Enable testing several variants for si scheduler
Enable testing different scheduling variants if sgpr usage
is very high. It was previously disabled because of a bug
in handleMove, but it has been fixed since.

Patch by Axel Davy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274372 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 18:03:46 +00:00
Duncan P. N. Exon Smith
567409db69 CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr.  This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other.  Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators.  The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency.  Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy.  I couldn't run tests
for AVR since llc doesn't link with it turned on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274189 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 00:01:54 +00:00
Matt Arsenault
759ed7e410 AMDGPU: Cleanup subtarget handling.
Split AMDGPUSubtarget into amdgcn/r600 specific subclasses.
This removes most of the static_casting of the basic codegen
classes everywhere, and tries to restrict the features
visible on the wrong target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273652 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 06:30:11 +00:00
Tom Stellard
aeca746050 AMDGPU/SI: Use common topological sort algorithm in SIScheduleDAGMI
Reviewers: arsenm, axeldavy

Subscribers: MatzeB, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19823

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272346 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-09 23:48:02 +00:00
Benjamin Kramer
0ad6107994 Apply clang-tidy's misc-static-assert where it makes sense.
Also fold conditions into assert(0) where it makes sense. No functional
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270982 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-27 11:36:04 +00:00
Tom Stellard
3bb1495fb4 AMDGPU/SI: Use range loops to simplify some code in the SI Scheduler
Reviewers: arsenm, axeldavy

Subscribers: MatzeB, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268396 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-03 16:30:56 +00:00
Craig Topper
2ea0a37593 Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 02:01:25 +00:00
Chad Rosier
cd3a68c781 [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.
http://reviews.llvm.org/D17967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263021 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 16:00:35 +00:00
Duncan P. N. Exon Smith
5144d3546c CodeGen: Update LiveIntervalAnalysis API to use MachineInstr&, NFC
These parameters aren't expected to be null, so take them by reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262151 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 20:14:29 +00:00
Duncan P. N. Exon Smith
42e18357c5 CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
Take MachineInstr by reference instead of by pointer in SlotIndexes and
the SlotIndex wrappers in LiveIntervals.  The MachineInstrs here are
never null, so this cleans up the API a bit.  It also incidentally
removes a few implicit conversions from MachineInstrBundleIterator to
MachineInstr* (see PR26753).

At a couple of call sites it was convenient to convert to a range-based
for loop over MachineBasicBlock::instr_begin/instr_end, so I added
MachineBasicBlock::instrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262115 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 06:40:41 +00:00
Matthias Braun
051b30e8e2 RegisterPressure: Make liveness tracking subregister aware
Differential Revision: http://reviews.llvm.org/D14968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258258 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-20 00:23:26 +00:00
Nicolai Haehnle
cead1b4a6d AMDGPU/SI: Add SI Machine Scheduler
Summary:
It is off by default, but can be used
with --misched=si

Patch by: Axel Davy

Reviewers: arsenm, tstellarAMD, nhaehnle

Subscribers: nhaehnle, solenskiner, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D11885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 16:10:10 +00:00