99 Commits

Author SHA1 Message Date
Mehdi Amini
67f335d992 Use StringRef in Pass/PassManager APIs (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283004 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-01 02:56:57 +00:00
Matthias Braun
690a3cbc95 MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of
running after register and simply describes that no vregs are used in
a machine function. With that we can simply compute the property and do
not need to dump/parse it in .mir files.

Differential Revision: http://reviews.llvm.org/D23850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279698 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-25 01:27:13 +00:00
Matthias Braun
fa5c5c7db3 CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
Re-apply this patch, hopefully I will get away without any warnings
in the constructor now.

This patch removes the MachineFunctionAnalysis. Instead we keep a
map from IR Function to MachineFunction in the MachineModuleInfo.

This allows the insertion of ModulePasses into the codegen pipeline
without breaking it because the MachineFunctionAnalysis gets dropped
before a module pass.

Peak memory should stay unchanged without a ModulePass in the codegen
pipeline: Previously the MachineFunction was freed at the end of a codegen
function pipeline because the MachineFunctionAnalysis was dropped; With
this patch the MachineFunction is freed after the AsmPrinter has
finished.

Differential Revision: http://reviews.llvm.org/D23736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279602 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-24 01:52:46 +00:00
Richard Smith
5a65f77485 Revert r279564. It introduces undefined behavior (binding a reference to a
dereferenced null pointer) in MachineModuleInfo::MachineModuleInfo that causes
-Werror builds (including several buildbots) to fail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279580 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 22:08:27 +00:00
Matthias Braun
1bb228f703 CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
Re-apply this commit with the deletion of a MachineFunction delegated to
a separate pass to avoid use after free when doing this directly in
AsmPrinter.

This patch removes the MachineFunctionAnalysis. Instead we keep a
map from IR Function to MachineFunction in the MachineModuleInfo.

This allows the insertion of ModulePasses into the codegen pipeline
without breaking it because the MachineFunctionAnalysis gets dropped
before a module pass.

Peak memory should stay unchanged without a ModulePass in the codegen
pipeline: Previously the MachineFunction was freed at the end of a codegen
function pipeline because the MachineFunctionAnalysis was dropped; With
this patch the MachineFunction is freed after the AsmPrinter has
finished.

Differential Revision: http://reviews.llvm.org/D23736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279564 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 20:58:29 +00:00
Krzysztof Parzyszek
7fd3acfecb [Hexagon] Packetize return value setup with the return instruction
Commit r279241 unintentionally reverted that ability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279526 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:01:01 +00:00
Matthias Braun
eb3b7392bb Revert "(HEAD -> master, origin/master, origin/HEAD) CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses"
Reverting while tracking down a use after free.

This reverts commit r279502.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279503 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 05:17:11 +00:00
Matthias Braun
ded269b907 CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
This patch removes the MachineFunctionAnalysis. Instead we keep a
map from IR Function to MachineFunction in the MachineModuleInfo.

This allows the insertion of ModulePasses into the codegen pipeline
without breaking it because the MachineFunctionAnalysis gets dropped
before a module pass.

Peak memory should stay unchanged without a ModulePass in the codegen
pipeline: Previously the MachineFunction was freed at the end of a codegen
function pipeline because the MachineFunctionAnalysis was dropped; With
this patch the MachineFunction is freed after the AsmPrinter has
finished.

Differential Revision: http://reviews.llvm.org/D23736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279502 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 03:20:09 +00:00
Krzysztof Parzyszek
48a33fd8e5 [Hexagon] Avoid register dependencies on indirect branches in packetizer
Do not packetize the instruction setting the branch address with the
indirect branch itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279324 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 21:07:35 +00:00
Krzysztof Parzyszek
1ea0947ff4 [Hexagon] Enforce LLSC packetization rules
Ensure that load locked and store conditional instructions are only
packetized with ALU32 instructions.

Patch by Ben Craig.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279272 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 16:57:05 +00:00
Krzysztof Parzyszek
8fa77e005c [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279241 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 14:04:45 +00:00
David Majnemer
975248e4fb Use the range variant of find instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278433 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-11 22:21:41 +00:00
Krzysztof Parzyszek
c54b1ec0f8 Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFC
There were a few cases introduced with the modulo scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277358 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 17:55:48 +00:00
Krzysztof Parzyszek
33bf01e7cc [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277220 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-29 21:49:42 +00:00
Matthias Braun
f79c57a412 MachineFunction: Return reference for getFrameInfo(); NFC
getFrameInfo() never returns nullptr so we should use a reference
instead of a pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277017 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-28 18:40:00 +00:00
Krzysztof Parzyszek
43492b2a7a [Hexagon] Post-increment loads/stores enhancements
- Generate vector post-increment stores more aggressively.
- Predicate post-increment and vector stores in early if-conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276800 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-26 20:30:30 +00:00
Krzysztof Parzyszek
c4320ab2d8 [Hexagon] Update store offset when not packetizing it with allocframe
When the packetizer wants to put a store to a stack slot in the same
packet with an allocframe, it updates the store offset to reflect the
value of SP before it is updated by allocframe. If the store cannot
be packetized with the allocframe after all, the offset needs to be
updated back to the previous value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276749 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-26 14:24:46 +00:00
Krzysztof Parzyszek
5e3461ebc2 [Hexagon] Add a scheduling DAG mutation
- Remove output dependencies on USR_OVF register.
- Update chain edge latencies between v60 vector loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275586 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 17:48:09 +00:00
Krzysztof Parzyszek
1a360b3be9 [Hexagon] Packetize function call arguments with tail call instructions
On Hexagon is it legal to packetize the instructions setting up call
arguments with the call instruction itself. This was already done,
except for tail calls. Make sure tail calls are handled as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275458 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14 19:30:55 +00:00
Duncan P. N. Exon Smith
8c13ec21d3 Hexagon: Avoid implicit iterator conversions, NFC
Avoid implicit iterator conversions from MachineInstrBundleIterator to
MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr&
over MachineInstr* and switching to range-based for loops.

There's a long tail of API cleanup here, but I'm planning to leave the
rest to the Hexagon maintainers.  HexagonInstrInfo defines many of its
own predicates, and most of them still take MachineInstr*.  Some of
those actually check for nullptr, so I didn't feel comfortable changing
them to MachineInstr& en masse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275142 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 01:55:32 +00:00
Duncan P. N. Exon Smith
567409db69 CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr.  This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other.  Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators.  The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency.  Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy.  I couldn't run tests
for AVR since llc doesn't link with it turned on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274189 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 00:01:54 +00:00
Krzysztof Parzyszek
687c1919cc [Hexagon] Be careful about anti-dependencies with a call in packetizer
In a case like
  J2_callr <ga:@foo>, %R0<imp-use>, ...
  R0<def> = ...
the anti-dependency on R0 cannot be ignored and the two instructions
cannot be packetized together, since if they were, the assignment to
R0 would take place before the call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268776 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 19:13:38 +00:00
Andrew Kaylor
650fa7d863 Add optimization bisect opt-in calls for Hexagon passes
Differential Revision: http://reviews.llvm.org/D19509



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267593 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-26 19:46:28 +00:00
Mehdi Amini
f6071e14c5 [NFC] Header cleanup
Removed some unused headers, replaced some headers with forward class declarations.

Found using simple scripts like this one:
clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap'

Patch by Eugene Kosov <claprix@yandex.ru>

Differential Revision: http://reviews.llvm.org/D19219

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-18 09:17:29 +00:00
Derek Schuff
9b3da26fa8 Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
Summary:
This adds the same checks that were added in r264593 to all
target-specific passes that run after register allocation.

Reviewers: qcolombet

Subscribers: jyknight, dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265313 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-04 17:09:25 +00:00
Duncan P. N. Exon Smith
0ce039da16 CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
In all but one case, change the DFAPacketizer API to take MachineInstr&
instead of MachineInstr*.  In DFAPacketizer::endPacket(), take
MachineBasicBlock::iterator.  Besides cleaning up the API, this is in
search of PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262142 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 19:09:00 +00:00
Duncan P. N. Exon Smith
5b9b80ea30 CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest).  All of these
functions require non-null parameters already, so references are more
clear.  As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261605 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 02:46:52 +00:00
Duncan P. N. Exon Smith
110284e56c CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
This is a little embarrassing.

When I reverted r261504 (getIterator() => getInstrIterator()) in
r261567, I did a `git grep` to see if there were new calls to
`getInstrIterator()` that I needed to migrate.  There were 10-20 hits,
and I blindly did a `sed ...` before calling `ninja check`.

However, these were `MachineInstrBundleIterator::getInstrIterator()`,
which predated r261567.  Perhaps coincidentally, these had an identical
name and return type.

This commit undoes my careless sed and restores
`MachineBasicBlock::iterator::getInstrIterator()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261577 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:30:15 +00:00
Duncan P. N. Exon Smith
20a62528ef Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is
better:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html

I'll recommit if we get consensus that it's the right direction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261567 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:49:58 +00:00
Krzysztof Parzyszek
1895c55f4f [Hexagon] Misc fixes to r255807
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255811 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-16 20:07:04 +00:00
Krzysztof Parzyszek
dcf9d4a0cb [Hexagon] Update the Hexagon packetizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-16 19:36:12 +00:00
Krzysztof Parzyszek
e0d5233e36 [Packetizer] Add AliasAnalysis as a parameter to the packetizer
This will make the depedence graph more accurate if an alias analysis
is provided. If nullptr is specified in its place, the behavior will
remain as it is currently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14 20:35:13 +00:00
Krzysztof Parzyszek
fe9f74ec61 Add "const" to function arguments in DFAPacketizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255526 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14 18:54:44 +00:00
Krzysztof Parzyszek
8e716832ef [Hexagon] Bring HexagonInstrInfo up to date
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253986 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 14:55:26 +00:00
Matthias Braun
e5065bdcd7 Fix build problme introduced in r251883
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 02:19:07 +00:00
Oleg Ranevskyy
cd69ab5ddf Test commit: fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251122 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-23 17:10:44 +00:00
Duncan P. N. Exon Smith
8525f3a7bc Hexagon: Remove implicit ilist iterator conversions, NFC
There are two things out of the ordinary in this commit.  First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp.  After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition.  This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.

Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`).  While not incorrect,
it's fragile.  I switched this to `::instr_end()`.

All that said, no functionality change intended here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-20 00:46:39 +00:00
Chandler Carruth
9146833fa3 [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible
with the new pass manager, and no longer relying on analysis groups.

This builds essentially a ground-up new AA infrastructure stack for
LLVM. The core ideas are the same that are used throughout the new pass
manager: type erased polymorphism and direct composition. The design is
as follows:

- FunctionAAResults is a type-erasing alias analysis results aggregation
  interface to walk a single query across a range of results from
  different alias analyses. Currently this is function-specific as we
  always assume that aliasing queries are *within* a function.

- AAResultBase is a CRTP utility providing stub implementations of
  various parts of the alias analysis result concept, notably in several
  cases in terms of other more general parts of the interface. This can
  be used to implement only a narrow part of the interface rather than
  the entire interface. This isn't really ideal, this logic should be
  hoisted into FunctionAAResults as currently it will cause
  a significant amount of redundant work, but it faithfully models the
  behavior of the prior infrastructure.

- All the alias analysis passes are ported to be wrapper passes for the
  legacy PM and new-style analysis passes for the new PM with a shared
  result object. In some cases (most notably CFL), this is an extremely
  naive approach that we should revisit when we can specialize for the
  new pass manager.

- BasicAA has been restructured to reflect that it is much more
  fundamentally a function analysis because it uses dominator trees and
  loop info that need to be constructed for each function.

All of the references to getting alias analysis results have been
updated to use the new aggregation interface. All the preservation and
other pass management code has been updated accordingly.

The way the FunctionAAResultsWrapperPass works is to detect the
available alias analyses when run, and add them to the results object.
This means that we should be able to continue to respect when various
passes are added to the pipeline, for example adding CFL or adding TBAA
passes should just cause their results to be available and to get folded
into this. The exception to this rule is BasicAA which really needs to
be a function pass due to using dominator trees and loop info. As
a consequence, the FunctionAAResultsWrapperPass directly depends on
BasicAA and always includes it in the aggregation.

This has significant implications for preserving analyses. Generally,
most passes shouldn't bother preserving FunctionAAResultsWrapperPass
because rebuilding the results just updates the set of known AA passes.
The exception to this rule are LoopPass instances which need to preserve
all the function analyses that the loop pass manager will end up
needing. This means preserving both BasicAAWrapperPass and the
aggregating FunctionAAResultsWrapperPass.

Now, when preserving an alias analysis, you do so by directly preserving
that analysis. This is only necessary for non-immutable-pass-provided
alias analyses though, and there are only three of interest: BasicAA,
GlobalsAA (formerly GlobalsModRef), and SCEVAA. Usually BasicAA is
preserved when needed because it (like DominatorTree and LoopInfo) is
marked as a CFG-only pass. I've expanded GlobalsAA into the preserved
set everywhere we previously were preserving all of AliasAnalysis, and
I've added SCEVAA in the intersection of that with where we preserve
SCEV itself.

One significant challenge to all of this is that the CGSCC passes were
actually using the alias analysis implementations by taking advantage of
a pretty amazing set of loop holes in the old pass manager's analysis
management code which allowed analysis groups to slide through in many
cases. Moving away from analysis groups makes this problem much more
obvious. To fix it, I've leveraged the flexibility the design of the new
PM components provides to just directly construct the relevant alias
analyses for the relevant functions in the IPO passes that need them.
This is a bit hacky, but should go away with the new pass manager, and
is already in many ways cleaner than the prior state.

Another significant challenge is that various facilities of the old
alias analysis infrastructure just don't fit any more. The most
significant of these is the alias analysis 'counter' pass. That pass
relied on the ability to snoop on AA queries at different points in the
analysis group chain. Instead, I'm planning to build printing
functionality directly into the aggregation layer. I've not included
that in this patch merely to keep it smaller.

Note that all of this needs a nearly complete rewrite of the AA
documentation. I'm planning to do that, but I'd like to make sure the
new design settles, and to flesh out a bit more of what it looks like in
the new pass manager first.

Differential Revision: http://reviews.llvm.org/D12080

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-09 17:55:00 +00:00
Krzysztof Parzyszek
14e438dfb3 [Hexagon] Use MF reference from parent class in HexagonPacketizerList
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240403 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 13:50:23 +00:00
Alexander Kornienko
cd52a7a381 Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 09:49:53 +00:00
Alexander Kornienko
cf0db29df2 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 15:57:42 +00:00
Colin LeMahieu
cf9ca4fd5d [Hexagon] Moving pass declarations out of header and in to implementation files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 19:05:35 +00:00
Krzysztof Parzyszek
637f84c80e [Hexagon] Treat CFI as solo instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-22 15:47:35 +00:00
Colin LeMahieu
fdfad962a4 [Hexagon] Simplify boolean expression
Patch by Richard
http://reviews.llvm.org/D8523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232955 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 16:01:03 +00:00
Eric Christopher
5233c26b6b Have getCalleeSavedRegs take a non-null MachineFunction all the
time. The target independent code was passing in one all the
time and targets weren't checking validity before using. Update
a few calls to pass in a MachineFunction where necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 21:41:28 +00:00
Colin LeMahieu
3bddb8b918 [Hexagon] Removing more V4 predicates since V4 is the required minimum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228614 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-09 21:56:37 +00:00
Colin LeMahieu
7441ea470c [Hexagon] Renaming Y2_barrier. Fixing issues where doubleword variants of instructions can't be newvalue producers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228330 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 18:56:28 +00:00
Colin LeMahieu
9fd1ca6c40 [Hexagon] Updating call/jump instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 17:05:27 +00:00
Colin LeMahieu
af9e1c79a5 [Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 15:44:17 +00:00
Colin LeMahieu
7c58cad0ca [Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224957 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-29 21:33:45 +00:00