Commit Graph

15216 Commits

Author SHA1 Message Date
Jim Grosbach
e90ac9bce9 ARM NEON VST2 assembly parsing and encoding.
Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:35:22 +00:00
Stepan Dyatkovskiy
ac12ef4ad2 Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:19:17 +00:00
Dan Gohman
f9096e450b It turns out that clang does use pointer-to-function types to
point to ARC-managed pointers sometimes. This fixes rdar://10551239.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 19:10:53 +00:00
Akira Hatanaka
3faac0a78c Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
emission is not supported yet, but a patch that adds the support should follow
soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:26:41 +00:00
Jim Grosbach
8d11c6349f ARM/Thumb2 'cmp rn, #imm' alias to cmn.
When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 17:30:24 +00:00
Jim Grosbach
a39cda7aff ARM assembler support for the target-specific .req directive.
rdar://10549683


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:16:11 +00:00
Evan Cheng
ddfd1377d2 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 02:11:42 +00:00
Chad Rosier
8f644259dc Add newline at EOF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 01:34:39 +00:00
Jim Grosbach
863d2af947 Thumb2 assembler aliases for "mov(shifted register)"
rdar://10549767


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 22:45:11 +00:00
Jim Grosbach
27debd60a1 ARM LDM/STM system instruction variants.
rdar://10550269

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 21:48:29 +00:00
Jim Grosbach
0da6e867cf Test for 146516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 21:06:59 +00:00
Jim Grosbach
55b02f28c1 ARM thumb2 parsing of "rsb rd, rn, #0".
rdar://10549741


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:50:38 +00:00
Jim Grosbach
0f293de207 ARM NEON two-operand aliases for VQDMULH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:40:37 +00:00
Jim Grosbach
e91e7bcadc ARM pre-UAL NEG mnemonic for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 20:23:22 +00:00
Chad Rosier
8a9bce978f [fast-isel] Unaligned loads of floats are not supported. Therefore, convert to a regular
load and then move the result from a GPR to a FPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 19:22:14 +00:00
Akira Hatanaka
d1472e8657 Add test/MC/Mips/dg.exp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 04:12:49 +00:00
Akira Hatanaka
692be5491a Move direct object emitter test to directory test/MC/Mips. Rename it to
elf-relsym.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 03:50:34 +00:00
Akira Hatanaka
f3315cf65f Relocation against a symbol, instead of against section. We had some extreme
test cases where there were a lot of relocations applied relative to a large
rodata section. Gas would create a symbol for each of these whereas we would
be relative to the beginning of the rodata section. This change mimics what
gas does.

Patch by Jack Carter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 02:27:40 +00:00
Nick Lewycky
5a3d4c9830 Don't rely on a particular version string for llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146456 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 00:34:14 +00:00
Tony Linthicum
781907b2b8 Temporarily disable Hexagon tests. They are failing on OS X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146455 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 00:33:45 +00:00
Akira Hatanaka
dcfc2eaf62 Test case for r146432 by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:41:39 +00:00
Bob Wilson
9cd2b9562d Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
These modifiers simply select either the low or high D subregister of a Neon
Q register.  I've also removed the unimplemented 'p' modifier, which turns out
to be a bit different than the comment here suggests and as far as I can tell
was only intended for internal use in Apple's version of gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:45:15 +00:00
Tony Linthicum
b4b54153ad Hexagon backend support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:14:40 +00:00
Joerg Sonnenberger
127a669d09 Only replace fwrite with fputc, if the return value is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 20:18:31 +00:00
Jan Sjödin
37e7ecf52b XOP instructions and encoding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:37:49 +00:00
Roman Divacky
a0c17a495b Add support for gnu_indirect_function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 17:34:04 +00:00
Chandler Carruth
ddbc274169 Manually upgrade the test suite to specify the flag to cttz and ctlz.
I followed three heuristics for deciding whether to set 'true' or
'false':

- Everything target independent got 'true' as that is the expected
  common output of the GCC builtins.
- If the target arch only has one way of implementing this operation,
  set the flag in the way that exercises the most of codegen. For most
  architectures this is also the likely path from a GCC builtin, with
  'true' being set. It will (eventually) require lowering away that
  difference, and then lowering to the architecture's operation.
- Otherwise, set the flag differently dependending on which target
  operation should be tested.

Let me know if anyone has any issue with this pattern or would like
specific tests of another form. This should allow the x86 codegen to
just iteratively improve as I teach the backend how to differentiate
between the two forms, and everything else should remain exactly the
same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 11:59:10 +00:00
Chandler Carruth
2106badea3 Add an explicit test of the auto-upgrade functionality for the new
intrinsic syntax.

Now that this is explicitly covered, I plan to upgrade the existing test
suite to use an explicit immediate. Note that I plan to specify 'true'
in most places rather than the auto-upgraded value as that is the far
more common value to end up here as that is the value coming from GCC's
builtins. The only place I'm likely to put a 'false' in is when testing
x86 which actually has different instructions for the two variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 11:23:11 +00:00
Chandler Carruth
c4eab904c9 Teach the verifier to reject all non-constant arguments to the second
argument of the cttz and ctlz intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 04:36:02 +00:00
Stepan Dyatkovskiy
3e0dc0606a Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Third attempt: simplified checks in test for armv7-apple-darwin11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 14:35:48 +00:00
Chandler Carruth
59164b731b Don't assume things about the exact details of the LLVM version number,
such as what VCS information is attached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 21:40:31 +00:00
Chad Rosier
2baabf0374 Revert associate SelectInsertValue test as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 21:34:28 +00:00
Chad Rosier
d440f678fb Revert r146322 to appease buildbots. Original commit message:
Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for
FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second
attempt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 19:55:03 +00:00
Stepan Dyatkovskiy
8c0b807e8f Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 08:42:24 +00:00
Hal Finkel
fed4d19edd Make CR spill and restore use a reserved register. These operations cannot use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 04:50:53 +00:00
Rafael Espindola
f3aefb56de Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas
does. The _GLOBAL_OFFSET_TABLE_ is still magical in that we get a R_386_GOTPC,
but it doesn't change the immediate in the same way as when the expression
has no right hand side symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:28:43 +00:00
Eli Friedman
effab8fa24 Splats can contain undef's; make sure to handle them correctly. PR11526.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 23:54:42 +00:00
Jim Grosbach
840bf7eda7 ARM assembly aliases for BIC<-->AND (immediate).
When the immediate operand of an AND or BIC instruction isn't representable
in the immediate field of the instruction, but the bitwise negation of the
immediate is, assemble the instruction as the inverse operation instead
with the inverted immediate as the operand.

rdar://10550057


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 22:02:17 +00:00
Evan Cheng
b3e6c70c84 Update test to something more sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 21:54:10 +00:00
Jim Grosbach
a4e3c7fc4b ARM assembly parsing and encoding for VLD2 with writeback.
Refactor the instructions into fixed writeback and register-stride
writeback variants to simplify the offset operand (no more optional
register operand using reg0). This is a simpler representation and allows
the assembly parser to more easily handle these instructions.

Add tests for the instruction variants now supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146278 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 21:28:25 +00:00
Chad Rosier
cd462d055f [fast-isel] Add support for selecting insertvalue.
rdar://10530851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 20:09:54 +00:00
Rafael Espindola
3c68acd202 Handle reloc_signed_4byte in here. Not doing so was a regression from my
previous commit. It is strange that we see it in 32 bits. We already
have a fixme about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 19:57:29 +00:00
Kevin Enderby
94c2e85bea The second part of support for generating dwarf for assembly source files. This
generates the dwarf Compile Unit DIE and a dwarf subprogram DIE for each
non-temporary label.

The next part will be to get the clang driver to enable this when assembling
a .s file.  rdar://9275556


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146262 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 18:09:40 +00:00
Benjamin Kramer
b653397dcd X86: Add patterns for the various rounding ops for SSE4.1 and AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 15:44:03 +00:00
Andrew Trick
5d73448bb7 Add -unroll-runtime for unrolling loops with run-time trip counts.
Patch by Brendon Cahoon!

This extends the existing LoopUnroll and LoopUnrollPass. Brendon
measured no regressions in the llvm test suite with -unroll-runtime
enabled. This implementation works by using the existing loop
unrolling code to unroll the loop by a power-of-two (default 8). It
generates an if-then-else sequence of code prior to the loop to
execute the extra iterations before entering the unrolled loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 06:19:40 +00:00
Evan Cheng
9c181a92d8 Forgot setting -march.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 06:15:00 +00:00
Rafael Espindola
1d5969d839 Handle the case of the magical _GLOBAL_OFFSET_TABLE_ showing up in a
symbol difference. This matches gas behavior and fixes PR11513.

We still don't handle _GLOBAL_OFFSET_TABLE_ in data sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 03:03:58 +00:00
Akira Hatanaka
0dca9456c5 jalr should use t9 ($25) for indirect calls regardless of the relocation model
specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:45:12 +00:00
Eli Friedman
2dd0353fec Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146219 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:16:26 +00:00
Nick Lewycky
c9b98ad7a7 Fix infinite loop in DSE when deleting a free in a reachable loop that's also
trivially infinite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:36:35 +00:00