132350 Commits

Author SHA1 Message Date
Craig Topper
022094446e [AVX512] Add patterns for extracting subvectors and storing to memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:14 +00:00
Craig Topper
3b51b4692e [AVX512] Capitalize the Z in VEXTRACTPSzmr. Lowercase z has been primarily used to indicating the zero masking behavior which is not the case here. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270333 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:11 +00:00
Craig Topper
aca352c053 [AVX512] Rename vector extract instructions so 'mr' intead of 'rm' to reflect the fact that memory is the destination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270332 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:09 +00:00
Craig Topper
23d0d8909d [AVX512] Fix copy/paste mistake a I made in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270331 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 22:50:04 +00:00
Chad Rosier
7143168577 Fix 80-column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270329 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 21:12:06 +00:00
Hal Finkel
8fdeacc0ca [LiveIntervalAnalysis] Don't dereference an end iterator in repairIntervalsInRange
This fixes a bug introduced in:

  r262115 - CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC

The iterator End here might == MBB->end(), and so we can't unconditionally
dereference it. This often goes unnoticed (I don't have a test case that always
crashes, and ASAN does not catch it either) because the function call arguments are
turned right back into iterators. MachineInstrBundleIterator's constructor,
however, does have an assert which might randomly fire.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270323 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 16:03:50 +00:00
Michael Zuckerman
e90b7d501e [Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.
Differential Revision: http://reviews.llvm.org/D20438


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 14:44:18 +00:00
Michael Zuckerman
981df2f2ac [Clang][AVX512][intrinsics] Fix vscalef intrinsics.
Differential Revision: http://reviews.llvm.org/D20324


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270321 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 11:09:53 +00:00
George Rimar
e73be5ff27 [llvm-readobj] - Teach readobj to recognize SHF_COMPRESSED flag.
Main problem here was that SHF_COMPRESSED has the same value with
XCORE_SHF_CP_SECTION, which was included as standart (common) flag.
As far I understand xCore is a family of controllers and it that
means it's constant should be processed separately,
only if e_machine == EM_XCORE, otherwise llvm-readobj would output
different constants twice for compressed section:

Flags [
..
SHF_COMPRESSED (0x800)
..
XCORE_SHF_CP_SECTION (0x800)
..
]

what probably does not make sence if you're not working with xcore file.

Differential revision: http://reviews.llvm.org/D20273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270320 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 10:16:58 +00:00
Craig Topper
945c4ac1dc [AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable AVX2 versions of vector extract when AVX512VL is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270318 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 07:08:56 +00:00
Craig Topper
a798097945 [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270317 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 06:07:18 +00:00
Craig Topper
55ce98c47e [AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270316 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:47:25 +00:00
Craig Topper
0b20b65b6e [AVX512] Use update_llc_test_checks to update some tests so we can see all the instruction encodings and ensure everything is with EVEX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270315 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:46:58 +00:00
David Majnemer
3785891684 [SimplifyCFG] Remove cleanuppads which are empty except for calls to lifetime.end
A cleanuppad is not cheap, they turn into many instructions and result
in additional spills and fills.  It is not worth keeping a cleanuppad
around if all it does is hold a lifetime.end instruction.

N.B.  We first try to merge the cleanuppad with another cleanuppad to
avoid dropping the lifetime and debug info markers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270314 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 05:12:32 +00:00
Craig Topper
1dd3d1b5f5 [AVX512] Fix test cases I missed in r270311.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270313 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:59:55 +00:00
Matt Arsenault
03ca6fb151 AMDGPU: Define priorities for register classes
Allocating larger register classes first should give better allocation
results (and more importantly for myself, make the lit tests more stable
with respect to scheduler changes).

Patch by Matthias Braun

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:55:07 +00:00
Craig Topper
2cec448db5 [AVX512] Disable AVX/AVX2 patterns for VPSADBW and VPMULUDQ when the AVX512VL/AVX512BWI equivalents are available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270311 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:52:32 +00:00
Craig Topper
cb70dc6a28 [X86] Convert some SSE2/AVX2 intrinsics to ISD opcodes during lowering instead of pattern matching the intrinsics. This unifies handling with AVX512 and allows these intrinsics to select EVEX encoded instructions to increase available registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270310 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 03:52:28 +00:00
Sanjoy Das
7a3bcbc7cf [IRCE] Don't use an allocator for range checks; NFC
The InductiveRangeCheck struct is only five words long; so passing these
around value is fine.  The allocator makes the code look more complex
than it is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270309 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:52:13 +00:00
Sanjoy Das
d874a39835 [IRCE] Don't pass IRBuilder<> where unnecessary; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270308 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:31:51 +00:00
Matt Arsenault
be522c6214 AMDGPU: Cleanup lowering actions
These are kind of a mess and hard to follow, particularly
for loads and stores. Fix various redundant, unnecessary
and dead settings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270307 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:27:49 +00:00
Sanjoy Das
c17e533ca7 [GuardWidening] Fix incorrect use of remove_if
I had used `std::remove_if` under the assumption that it moves the
predicate matching elements to the end, but actaully the elements
remaining towards the end (after the iterator returned by
`std::remove_if`) are indeterminate.  Fix the bug (and make the code
more straightforward) by using a temporary SmallVector, and add a test
case demonstrating the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270306 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 02:24:44 +00:00
Matt Arsenault
4e5b30a0a9 AMDGPU: Fix high bits after division optimization
This is essentially doing a 24-bit signed division with FP.
We need to truncate to the N bit result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270305 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 01:53:33 +00:00
Quentin Colombet
a829698854 [RegBankSelect] Compute the repairing cost for copies.
Prior to this patch, we were using 1 for all the repairing costs.
Now, we use the information from the target to get this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270304 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 01:43:25 +00:00
Quentin Colombet
9e57bf586c [RegisterBankInfo] Fix the initialization of the map VT to RegBank.
Prior to this patch we could have read uninitialized memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270303 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 01:41:17 +00:00
Dylan McKay
521e503c8b [AVR] Add AVRMCAsmInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270302 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 01:06:37 +00:00
Matt Arsenault
6416e4c521 AMDGPU: Fix verifier error when spilling SGPRs
The current SGPR spilling test does not stress this
because it is using s_buffer_load instructions to
increase SGPR pressure and spill, but their output
operands have the same SReg_32_XM0 constraint. This fixes
an error when the SReg_32 output from most instructions
is spilled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270301 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:53:42 +00:00
Matt Arsenault
3455af8338 AMDGPU: Fix relationship between SReg_32 and SReg_32_XM0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270300 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:53:28 +00:00
Chris Bieneman
957d8db773 Fix implicit type conversion. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270299 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:36:47 +00:00
Dylan McKay
cfb570d66f [AVR] Fix header files in MCTargetDesc
Everything now compiles successfully, but there are still undefined
references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270298 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:35:07 +00:00
Matt Arsenault
9d922be248 AMDGPU: Handle cbranch vccz/vccnz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270297 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:29:40 +00:00
Matt Arsenault
dcb6543de5 AMDGPU: Implement ReverseBranchCondition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270296 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:29:34 +00:00
Matt Arsenault
f91238f391 AMDGPU: Implement AnalyzeBranch
Original patch by Tom Stellard

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270295 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:29:27 +00:00
Dan Gohman
1a513a6964 [WebAssembly] Optimize away return instructions using fallthroughs.
This saves a small amount of code size, and is a first small step toward
passing values on the stack across block boundaries.

Differential Review: http://reviews.llvm.org/D20450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270294 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:21:56 +00:00
Matt Arsenault
bca8aba44a Fix constant folding of addrspacecast of null
This should not be making assumptions on the value of
the casted pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270293 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:14:04 +00:00
Dylan McKay
d8a1b8c883 [AVR] Fix signuature of AVRTargetMachine constructor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270292 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 23:39:04 +00:00
Matthias Braun
6054e84d82 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

This re-applies r269016. The fixes from r270290 and r270259 should avoid
the machine verifier problems this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270291 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 23:14:56 +00:00
Matthias Braun
d8eb7dec3e MachineVerifier: subregs so not require defs/valnos on every path
It is fine for subregister ranges to be undefined on some CFG paths as
we may have a "vregX:other_subreg<read-undef> =" def on that path. We
do not (and should not) have live segments for the subregister ranges.
The MachineVerifier should not complain about this.

This is a slight variant of http://llvm.org/PR27705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270290 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 23:02:13 +00:00
Rui Ueyama
73dfdb31f6 Fix struct member names and simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270289 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:59:05 +00:00
Tim Shen
258d886f61 [PowerPC] Add a testcase for TCO on string rvo function
Differential Revision: http://reviews.llvm.org/D20311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270287 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:42:01 +00:00
Chris Bieneman
d60c9c7025 [yaml2obj] [MachO] Fill Segment and Section data
This fills section data with 0xDEADBEEF and segment data not inside a section with 0xBAADDA7A. This results in yaml2obj generating a matching size object file. Any additional bytes in the file are zero'd.

This is a starting point for populating the remaining segment data, and provides a hex viewable file that you can easily see the missing data in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270286 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:31:50 +00:00
Sanjay Patel
85b08a7199 add test vector sdiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270285 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:08:40 +00:00
Sanjay Patel
45022fd14b add test for vector shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270284 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:08:16 +00:00
Justin Bogner
a0427d47f8 SDAG: Implement Select instead of SelectImpl in PPCDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270283 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:43:23 +00:00
Jacques Pienaar
0724f4d051 [lanai] Change reloc to use PIC_ by default and cleanup.
* Change reloc to PIC_;
* Cleanup (clang-format & modify test);



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270282 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:41:53 +00:00
Richard Smith
85e9eec972 Switch from the linux-specific 'struct sigaltstack' to POSIX's 'stack_t'. This
is what I get for trusting my system's man pages I suppose.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270280 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:38:15 +00:00
Richard Smith
b074e2826f Add a configure-time check for the existence of sigaltstack. It seems that some
systems provide a <signal.h> that doesn't declare it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270278 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:26:00 +00:00
Richard Smith
f77c43d1f3 Reinstate r269992 (reverting r270267), but restricted to cases where glibc is
the C standard library implementation in use.

This works around a glibc bug in the backtrace() function where it fails to
produce a backtrace on x86_64 if libgcc / libunwind is statically linked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270276 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:18:12 +00:00
Richard Smith
ccdd1ce520 Create a sigaltstack when we register our signal handlers. Otherwise we'd very
likely fail to produce a backtrace if we crash due to stack overflow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270273 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 21:07:41 +00:00
Michael Kuperstein
1c8492880e Revert r270268 due to unused variable warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270272 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 20:55:51 +00:00