This patch adds the ability to dump mach headers. For my local clang binary the macho2yaml output is now:
--- !mach-o
FileHeader:
cputype: 0x01000007
cpusubtype: 0x80000003
filetype: 0x00000002
ncmds: 19
flags: 0x00A18085
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269304 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assembler temporary is not needed when the .cprestore offset fits
inside a simm16 and it is not an error to use it inside a '.set noat' in this
case.
Reviewers: emaste, seanbruno, sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D20199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269295 91177308-0d34-0410-b5e6-96231b3b80d8
As explained in r269196, microMIPS has a special case that is not correctly
implemented in LLVM. If we have a symbol 'foo' which is equivalent to
'.text+0x10'. The value of an R_MICROMIPS_LO16 relocation using 'foo' is
'foo+0x11' and not 'foo+0x10'. The in-place addend should therefore be 0x11.
This commit reverts a little more of the effect of r268900 by keeping the
symbol when the STO_MIPS_MICROMIPS flag is set for R_MIPS_GPREL32 relocations.
This fixes SingleSource/UnitTests/2003-08-11-VaListArg, and
SingleSource/UnitTests/2003-05-07-VarArgs for microMIPS.
I believe there are additional relocations that have the same issue (e.g.
R_MIPS_64, and R_MIPS_GPREL16) but for now I'm focusing on restoring our
internal buildbots back to the green state we had in r268899.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269294 91177308-0d34-0410-b5e6-96231b3b80d8
The EXTR combine has been in tree for over 2 years without complain, so go ahead
and remove the option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269292 91177308-0d34-0410-b5e6-96231b3b80d8
For BITREVERSE, bit shifting/masking every bit in a vector element is a very lengthy procedure.
If the input vector type is a whole multiple of bytes wide then we can split this into a BSWAP shuffle stage (to reverse at the byte level) and then a BITREVERSE stage applied to each byte. Most vector capable targets can efficiently BSWAP using shuffles resulting in a considerable reduction in instructions.
With this patch targets would only need to implement a target specific vXi8 BITREVERSE implementation to efficiently reverse most legal vector types.
Differential Revision: http://reviews.llvm.org/D19978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269290 91177308-0d34-0410-b5e6-96231b3b80d8
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer.
Patch by Apelete Seketeli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269285 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This eliminates the default case for N64 that was left out of r269047.
The change to R_MIPS_SUB is needed in this patch to make this testable since
%lo(%neg(%gp_rel(foo))) and %hi(%neg(%gp_rel(foo))) remain the only ways to get
a compound relocation from the assembler.
Reviewers: sdardis, rafael
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D20097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269280 91177308-0d34-0410-b5e6-96231b3b80d8
While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is
possible for one of the nodes to be replaced by another. To make sure we do not
visit the deleted nodes, and to make sure we visit the replacement nodes, use a
list of HandleSDNodes to track the to-be-promoted nodes during the promotion
process.
The same fix has been applied to the analogous code in
PPCTargetLowering::DAGCombineTruncBoolExt.
Fixes PR26985.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269272 91177308-0d34-0410-b5e6-96231b3b80d8
Shifts beyond the bitwidth are undef but SCCP resolved them to zero.
Instead, DTRT and resolve them to undef.
This reimplements the transform which caused PR27712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269269 91177308-0d34-0410-b5e6-96231b3b80d8
Currently cost based loop rotation algo can only be turned on with
two conditions: the function has real profile data, and -precise-rotation-cost
flag is turned on. This is not convenient for developers to experiment
when profile is not available. Add a new option to force the new
rotation algorithm -force-precise-rotation-cost
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269266 91177308-0d34-0410-b5e6-96231b3b80d8
The promote alloca pass would attempt to promote an alloca with
a select, icmp, or phi user, even though the other operand was
from a non-promotable source, producing a select on two different
pointer types.
Only do this if we know that both operands derive from the same
alloca. In the future we should be able to relax this to an alloca
which will also be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269265 91177308-0d34-0410-b5e6-96231b3b80d8
This new verifier rule lets us unambigously pick a calling convention
when creating a new declaration for
`@llvm.experimental.deoptimize.<ty>`. It is also congruent with our
lowering strategy -- since all calls to `@llvm.experimental.deoptimize`
are lowered to calls to `__llvm_deoptimize`, it is reasonable to enforce
a unique calling convention.
Some of the tests that were breaking this verifier rule have had to be
split up into different .ll files.
The inliner was violating this rule as well, and has been fixed to avoid
producing invalid IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269261 91177308-0d34-0410-b5e6-96231b3b80d8
This is a large change, but it's pretty mechanical:
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269258 91177308-0d34-0410-b5e6-96231b3b80d8
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269256 91177308-0d34-0410-b5e6-96231b3b80d8
Do not precompute value counts for all sites. This
eliminates one more use of dynamic allocation
in profiler writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269253 91177308-0d34-0410-b5e6-96231b3b80d8
This should just be a compile-time change. Correct the check for whether
we have already analyzed the callee when making summary based decisions.
There is no need to reprocess one at the same threshold as when it was
last processed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269251 91177308-0d34-0410-b5e6-96231b3b80d8
InsertPointAnalysis.
Because both split and spill hoisting want to use LastSplitPoint computation
result, extract the LastSplitPoint computation from SplitAnalysis class which
also contains a bunch of other analysises only related to split.
Differential Revision: http://reviews.llvm.org/D20027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269248 91177308-0d34-0410-b5e6-96231b3b80d8
This was a typo in an earlier commit - there's no point in keeping the
old node around here.
Noticed by Meador Inge. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269245 91177308-0d34-0410-b5e6-96231b3b80d8
Adding the initial files for adding MachO support to yaml2obj. Passing a MachO file will result in an error.
I will be implementing obj2yaml and yaml2obj for MachO in parallel so that one can be used to test the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269244 91177308-0d34-0410-b5e6-96231b3b80d8
Adding the initial files for adding MachO support to obj2yaml. Passing a MachO file will result in a new not_implemented error.
I will be implementing obj2yaml and yaml2obj for MachO in parallel so that one can be used to test the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269243 91177308-0d34-0410-b5e6-96231b3b80d8
Do not use getVRegDef() to print "the definition" of a vreg. If there
are multiple or none the function will fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269239 91177308-0d34-0410-b5e6-96231b3b80d8
It's very common to want to replace a node and then remove it since
it's dead, especially as we port backends from the SDNode *Select API
to the void Select one. This helper makes this sequence a bit less
verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269236 91177308-0d34-0410-b5e6-96231b3b80d8
It's awkward to force callers of SelectNodeTo to figure out whether
the node was morphed or CSE'd. Update uses here instead of requiring
callers to (sometimes) do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269235 91177308-0d34-0410-b5e6-96231b3b80d8
This fixes a debug assert on Windows from the new iterator
implementation added in r269059. The Windows std::vector iterator
operator== checks in debug mode that the containers being iterated over
are the same, which they may not be.
Fixed by checking that we are iterating over the same container before
comparing the container iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269232 91177308-0d34-0410-b5e6-96231b3b80d8
For narrow stores (e.g., strb, srth) we know the upper bits of the register are
unused/not useful. In some cases we can use this information to eliminate
unnecessary instructions.
For example, without this patch we generate (from the 2nd test case):
ldr w8, [x0]
and w8, w8, #0xfff0
bfxil w8, w2, #16, #4
strh w8, [x1]
and after the patch the 'and' is removed:
ldr w8, [x0]
bfxil w8, w2, #16, #4
strh w8, [x1]
ret
During the lowering of the bitfield insert instruction the 'and' is eliminated
because we know the upper 16-bits that are masked off are unused and the lower
4-bits that are masked off are overwritten by the insert itself. Therefore, the
'and' is unnecessary.
Differential Revision: http://reviews.llvm.org/D20175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269226 91177308-0d34-0410-b5e6-96231b3b80d8
Don't bother returning a result we don't use here. I've also renamed
this from selectGather to tryGather to better indicate that it may not
do anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269215 91177308-0d34-0410-b5e6-96231b3b80d8
SCEVExpander::replaceCongruentIVs assumes the backedge value of an
SCEV-analysable PHI to always be an instruction, when this is not
necessarily true. For now address this by bailing out of the
optimization if the backedge value of the PHI is a non-Instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269213 91177308-0d34-0410-b5e6-96231b3b80d8
`SCEVExpander::replaceCongruentIVs` bypasses `hoistIVInc` if both the
original and the isomorphic increments are PHI nodes. Doing this can
break SSA if the isomorphic increment is not dominated by the original
increment. Get rid of the bypass, and let `hoistIVInc` do the right
thing.
Fixes PR27232 (compile time crash/hang).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269212 91177308-0d34-0410-b5e6-96231b3b80d8
... for AddRec's in loops for which SCEV is unable to compute a max
tripcount. This is not a problem for "normal" loops[0] that don't have
guards or assumes, but helps in cases where we have guards or assumes in
the loop that can be used to constrain incoming values over the backedge.
This partially fixes PR27691 (we still don't handle the NUW case).
[0]: for "normal" loops, in the cases where we'd be able to prove
no-wrap via isKnownPredicate, we'd also be able to compute a max
tripcount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269211 91177308-0d34-0410-b5e6-96231b3b80d8
