84872 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
05ee0ece0b Add vector types for intrinsics
Author: Ron Lieberman <ronl@codeaurora.org>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253992 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 16:28:14 +00:00
Teresa Johnson
24a3d0e0ad [ThinLTO] Fix FunctionImport alias checking and test
Skip imports for weak_any aliases as well. Fix the test to check
non-import of weak aliases and functions, and import of normal alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253991 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 16:10:43 +00:00
Sanjay Patel
5c2d0848ab [x86] remove duplicate movq instruction defs (PR25554)
We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE:

  def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
                     [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))],
                     IIC_SSE_MOVDQ>;

  def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}",
                     [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))],
                     IIC_SSE_MOVDQ>, Sched<[WriteMove]>;

As shown in the test case and PR25554:
https://llvm.org/bugs/show_bug.cgi?id=25554

This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction.
This patch deletes one pair of these defs.
Sadly, this won't fix the original test case in the bug report. Something else is still broken.

Differential Revision: http://reviews.llvm.org/D14941



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 15:44:35 +00:00
Krzysztof Parzyszek
1c9cdef8b9 [Hexagon] Add missing include of <cctype>
Lack thereof breaks Windows builds due to the use of std::isspace
in HexagonInstrInfo.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 15:11:13 +00:00
Krzysztof Parzyszek
8e716832ef [Hexagon] Bring HexagonInstrInfo up to date
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253986 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 14:55:26 +00:00
Krzysztof Parzyszek
ed5c8866a9 Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 13:07:35 +00:00
Matt Arsenault
25a68d8d25 AMDGPU: Split LDS vector loads
If properly aligned this could allow using ds_read_b64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253975 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 12:18:54 +00:00
Matt Arsenault
04abf1ee5f AMDGPU: Split x8 and x16 vector loads instead of scalarize
The one regression in the builtin tests is in the read2 test which now
(again) has many extra copies, but this should be solved once the pass
is replaced with a DAG combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 12:05:03 +00:00
Ismail Donmez
25203ad3b3 Fix build after r253954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 09:48:09 +00:00
Cong Hou
fc33b8bb31 Let SelectionDAG start to use probability-based interface to add successors.
The patch in http://reviews.llvm.org/D13745 is broken into four parts:

1. New interfaces without functional changes.
2. Use new interfaces in SelectionDAG, while in other passes treat probabilities
as weights.
3. Use new interfaces in all other passes.
4. Remove old interfaces.

This the second patch above. In this patch SelectionDAG starts to use
probability-based interfaces in MBB to add successors but other MC passes are
still using weight-based interfaces. Therefore, we need to maintain correct
weight list in MBB even when probability-based interfaces are used. This is
done by updating weight list in probability-based interfaces by treating the
numerator of probabilities as weights. This change affects many test cases
that check successor weight values. I will update those test cases once this
patch looks good to you.


Differential revision: http://reviews.llvm.org/D14361




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253965 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 08:51:23 +00:00
Mehdi Amini
a7649e87bb Add a FunctionImporter helper to perform summary-based cross-module function importing
Summary:
This is a helper to perform cross-module import for ThinLTO. Right now
it is importing naively every possible called functions.

Reviewers: tejohnson

Subscribers: dexonsmith, llvm-commits

Differential Revision: http://reviews.llvm.org/D14914

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 06:07:49 +00:00
Cong Hou
b5b07c3686 [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:

%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>

and with this patch it will be converted to a X86ISD::AVG instruction.

The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.

Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.


Differential revision: http://reviews.llvm.org/D14761




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 05:44:19 +00:00
Davide Italiano
505dc6c863 [DIE] Make DIE.h NDEBUG conditional-free.
Switch dump()/print() method definitions to LLVM_DUMP_METHOD instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253945 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 02:21:43 +00:00
Sanjoy Das
5ac8b382d8 [RuntimeDyld] Avoid unused-private-field warning; NFC
Fixes the no asserts -Werror,-Wunused-private-field build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253933 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:59:36 +00:00
Dan Gohman
c165502aa2 [WebAssembly] Don't print the types of memory_size and grow_memory
This matches the current spec, for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253931 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:37:29 +00:00
Xinliang David Li
54daffcbaa [PGO] In llvm-profdata text dump, add comment lines as annotations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:31:22 +00:00
Krzysztof Parzyszek
85354d4e30 Revert r253923.
Per Eric's request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253928 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:19:57 +00:00
Andy Ayers
77a84a9451 findDeadCallerSavedReg needs to pay attention to calling convention
Caller saved regs differ between SysV and Win64. Use the tail call available set to scavenge from.

Refactor register info to create new helper to get at tail call GPRs. Added a new test case for windows. Fixed up a number of X64 tests since now RCX is preferred over RDX on SysV.

Differential Revision: http://reviews.llvm.org/D14878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253927 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:17:44 +00:00
Dan Gohman
272978f362 [WebAssembly] Don't special-case call operand order.
With the '=' suffix now indicating which operands are output operands, it's
no longer as important to distinguish between a call's inputs and its outputs
using operand ordering, so we can go back to printing them in the normal order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253925 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:04:06 +00:00
Krzysztof Parzyszek
277704eaac Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 22:00:17 +00:00
Dan Gohman
789af34864 [WebAssembly] Suffix output operands with '='.
This distinguishes input operands from output operands. This is something of
a syntactic experiment to see whether the mild amount of clutter this adds is
outweighed by the extra information it conveys to the reader.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253922 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:55:57 +00:00
Sanjoy Das
96ddcceb80 [RuntimeDyld] Don't allocate unnecessary stub buffer space
Summary:
For relocation types that are known to not require stub functions, there
is no need to allocate extra space for the stub functions.

Reviewers: lhames, reames, maksfb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253920 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:47:51 +00:00
Sanjoy Das
0fec8398ca [RuntimeDyld] Add bounds checking to SectionEntry::advanceStubOffset
Summary:
Change SectionEntry to keep track of the size of its underlying
allocation, and use that to bounds check advanceStubOffset.

Reviewers: lhames, andrew.w.kaylor, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253919 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:47:46 +00:00
Sanjoy Das
43e224dd49 [RuntimeDyld] Add accessors to SectionEntry; NFC
Summary:
Remove naked access to the data members in `SectionEntry` and route
accesses through accessor functions.  This makes it obvious how the
instances of the class are used, and will also facilitate adding bounds
checking to `advanceStubOffset` in a later change.

Reviewers: lhames, loladiro, andrew.w.kaylor

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253918 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:47:41 +00:00
Dan Gohman
9a9e26b34f [WebAssembly] Model the return value of store instructions in wasm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:16:35 +00:00
Chad Rosier
7ce4dcb91f [LIR] Put includes in correct order. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 21:09:13 +00:00
Xinliang David Li
55f78334c1 [PGO] Add --text option for llvm-profdata show|merge commands
The new option is similar to the SampleProfile dump option.

- dump raw/indexed format into text profile format
- merge the profile and output into text profile format.

Note that Value Profiling data text format is not yet designed. 
That functionality will be added later.

Differential Revision: http://reviews.llvm.org/D14894



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253913 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 20:47:38 +00:00
Diego Novillo
df79221070 SamplePGO - Add coverage tracking for samples.
The existing coverage tracker counts the number of records that were used
from the input profile. An alternative view of coverage is to check how
many available samples were applied.

This way, if the profile contains several records with few samples, it
doesn't really matter much that they were not applied. The more
interesting records to apply are the ones that contribute many samples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253912 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 20:12:21 +00:00
Andrew Kaylor
704489d52e [WinEH] Fix a case where GVN could incorrectly PRE a load into an EH pad.
Differential Revision: http://reviews.llvm.org/D14842



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253908 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 19:51:41 +00:00
Dan Gohman
c558dd39be [WebAssembly] Don't use set_local instructions explicitly.
The current approach to using get_local and set_local is to use them
implicitly, as register uses and defs. Introduce new copy instructions
which are themselves no-ops except for the get_local and set_local
that they imply, so that we use get_local and set_local consistently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 19:30:43 +00:00
Teresa Johnson
846661215e [ThinLTO] Deduplicate function index loading into shared helper (NFC)
Add a shared helper routine to read the function index from a file
and create/return the function index object. Use it in llvm-link and
llvm-lto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 19:19:11 +00:00
Andrew Kaylor
e03f5e5c43 [WinEH] Fix problem where CodeGenPrepare incorrectly sinks a bitcast into an EH pad.
Differential Revision: http://reviews.llvm.org/D14842



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 19:16:15 +00:00
Dan Gohman
5aafb6def5 [WebAssembly] Always print loop end labels
WebAssembly is currently using labels to end scopes, so for example a
loop scope looks like this:

BB0_0:
  loop BB0_1
  ...
BB0_1:

with BB0_0 being the label of the first block not in the loop. This
requires that the label be printed even when it's only reachable via
fallthrough. To arrange this, insert a no-op LOOP_END instruction in
such cases at the end of the loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 19:12:37 +00:00
Xinliang David Li
236067a61b [PGO] Introduce alignment macro for instr-prof control data(NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253893 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 18:02:59 +00:00
Dan Gohman
e89242e734 [WebAssembly] Remove incomplete MCCodeEmitter bits.
These are parts of a separate patch that I accidentally included in r253878.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253892 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 18:00:04 +00:00
Paul Robinson
5112df471f Add Windows error code and tidy formatting for system errors.
Differential Revision: http://reviews.llvm.org/D14892


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 17:34:20 +00:00
Dan Gohman
19dfe052ee [WebAssembly] Emit .param, .result, and .local through MC.
This eliminates one of the main remaining uses of EmitRawText.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253878 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 16:50:18 +00:00
Diego Novillo
b08070ce10 SamplePGO - Clear coverage tracking when clearing per-function data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 16:30:17 +00:00
Dan Gohman
96bd946285 [WebAssembly] Use dominator information to improve BLOCK placement
Always starting blocks at the top of their containing loops works, but creates
unnecessarily deep nesting because it makes all blocks in a loop overlap.
Refine the BLOCK placement algorithm to start blocks at nearest common
dominating points instead, which significantly shrinks them and reduces
overlapping.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 16:19:56 +00:00
Daniel Sanders
8452e84d36 [mips] .ent and .end should also set the type and size of the symbol respectively.
Reviewers: vkalintiris

Subscribers: llvm-commits, seanbruno, emaste, vkalintiris, dsanders

Differential Revision: http://reviews.llvm.org/D14221

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 16:08:03 +00:00
Diego Novillo
e5c2c47f2f SamplePGO - Use newly introduced local variable. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253868 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 15:24:13 +00:00
Krzysztof Parzyszek
a1bbb47859 [Hexagon] Update instruction formats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 14:09:26 +00:00
Martell Malone
ee54187984 ARM: address WoA division overflow crash
Disable custom handling of signed 32-bit and 64-bit integer divide.
Add test cases for both 32-bit and 64-bit integer overflow crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 13:11:39 +00:00
Craig Topper
3d6b356c19 [Mips] Remove an unnecessary wrapping of a predicate with std::ptr_fun. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 07:19:06 +00:00
Davide Italiano
a7e61b0322 [Analysis/CallGraph] Switch dump() definitions over to LLVM_DUMP_METHOD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 02:58:42 +00:00
Davide Italiano
b5e17577ae [LoopStrengthReduce] Mark dump() definitions as LLVM_DUMP_METHOD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 02:47:30 +00:00
Mehdi Amini
6fc1509fb7 Add const qualifier for FunctionInfoIndex in ModuleLinker and linkInModule() (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253840 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-23 01:59:16 +00:00
Sanjoy Das
85b3856163 [SCEV] Use C++11'isms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 21:20:13 +00:00
Benjamin Kramer
987c37b777 [MDBuilder] Simplify code using initializer lists. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253826 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 18:03:17 +00:00
Simon Pilgrim
f4a7279ca5 Remove duplicate getValueType() calls. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253823 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 16:49:38 +00:00