137231 Commits

Author SHA1 Message Date
Peter Zotov
29a5291c40 [CMake] [OCaml] Add -DLLVM_ENABLE_OCAMLDOC switch
Patch by Michael Gorny.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279544 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 18:07:16 +00:00
Sanjay Patel
d439a66862 [InstSimplify] allow icmp with constant folds for splat vectors, part 2
Completes the m_APInt changes for simplifyICmpWithConstant().

Other commits in this series:
https://reviews.llvm.org/rL279492
https://reviews.llvm.org/rL279530
https://reviews.llvm.org/rL279534
https://reviews.llvm.org/rL279538



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279543 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 18:00:51 +00:00
Xinliang David Li
0303a1abe3 Possible fix of test failures on win bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279542 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 18:00:41 +00:00
Sanjay Patel
405b046cb5 [InstSimplify] allow icmp with constant folds for splat vectors, part 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279538 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 17:30:56 +00:00
Justin Lebar
073ec4ad49 [SelectionDAG] Use a union of bitfield structs for SDNode::SubclassData.
Summary:
This greatly simplifies our handling of SDNode::SubclassData.

NFC, hopefully.  :)

See discussion in D23035 for discussion about the design API of these
bitfields.

Reviewers: chandlerc

Subscribers: llvm-commits, rnk

Differential Revision: https://reviews.llvm.org/D23036

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279537 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 17:18:11 +00:00
Justin Lebar
66abb74f7f [CodeGen] Convert a loop to a for-each loop. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279536 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 17:18:07 +00:00
Eugene Zelenko
9feaa97ada Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D23789


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279535 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 17:14:32 +00:00
Sanjay Patel
f98248330c [InstSimplify] add tests to show missing vector icmp folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279534 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 17:13:38 +00:00
Mehdi Amini
52a318c9a9 [ThinLTO] Make sure the Context used for the ThinLTO backend has all the appropriate options
An important performance setting on the LLVMContext for LTO is
enableDebugTypeODRUniquing(), this adds an automatic merging of
debug information in the context based on type ids.

Also, the lto::Config includes a diagnostic handler that needs to
be set on the Context, as well as the setDiscardValueNames() setting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279532 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:53:34 +00:00
Sanjay Patel
d09e4ee68a [InstSimplify] move icmp with constant tests to another file; NFC
...because like the corresponding code, this is just too big to keep adding to.
And the next step is to add a vector version of each of these tests to show
missed folds.

Also, auto-generate CHECK lines and add comments for the tests that correspond to
the source code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279530 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:46:53 +00:00
Pete Cooper
0504d91b00 Fix some more asserts after r279466.
That commit added a new version of Intrinsic::getName which should only
be called when the intrinsic has no overloaded types.  There are several
debugging paths, such as SDNode::dump which are printing the name of the
intrinsic but don't have the overloaded types.  These paths should be ok
to just print the name instead of crashing.

The fix here is ultimately to just add a 'None' second argument as that
calls the overload capable getName, which is less efficient, but this is a
debugging path anyway, and not perf critical.

Thanks to Björn Pettersson for pointing out that there were more crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279528 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:23:45 +00:00
Simon Pilgrim
a350f5d0bf [X86][SSE] Demonstrate inability to recognise that (v)cvtpd2dq & (v)cvttpd2dq intrinsics implicitly zeroes the upper half of the xmm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279527 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:11:21 +00:00
Krzysztof Parzyszek
7fd3acfecb [Hexagon] Packetize return value setup with the return instruction
Commit r279241 unintentionally reverted that ability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279526 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:01:01 +00:00
Xinliang David Li
d2746eafa6 Fix windows build failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279525 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 16:00:54 +00:00
Duncan P. N. Exon Smith
bda1572261 Rename unittests/ADT/ilistTest.cpp to ilistTestTemp.cpp (temporarily)
I'll rename this to IListTest.cpp after a waiting period (tonight?
tomorrow?), with a full explanation in that commit.

First, I'm moving it aside because Git doesn't play well with case-only
filename changes on case-insensitive file systems (and I suspect the
same is true of SVN).  This two-stage change should help to avoid
spurious failures on bots that don't do clean checkouts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279524 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 15:56:50 +00:00
Xinliang David Li
ee836b9f52 [Profile] refactor meta data copying/swapping code
Differential Revision: http://reviews.llvm.org/D23619



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279523 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 15:39:03 +00:00
Adrian Prantl
20885de16a Work around PR29097 to get the module bots going again.
This replaces an =default constructor with an explicit definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279522 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 15:38:59 +00:00
Simon Pilgrim
66bde5c4b3 [X86][AVX] Updated fptosi_2f64_to_4i32 test to show missed opportunity to implicit zero the upper elements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279521 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 15:10:39 +00:00
Simon Pilgrim
847920798b [X86][AVX] Add v2i32 fp to int conversion tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279520 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 15:00:52 +00:00
Simon Pilgrim
f3f6eb585b [X86][AVX] Add AVX2/AVX512 fp to int conversion tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279518 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 14:37:35 +00:00
Jacques Pienaar
0b99a8a2b0 [lanai] Use const instead of constexpr
The windows build bot did not like constexpr.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279517 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 14:36:53 +00:00
Elliot Colp
3804663c86 Fix SystemZ hang caused by r279105
The change in r279105 causes an infinite loop in some cases, as it sets the upper bits of an AND mask constant, which DAGCombiner::SimplifyDemandedBits then unsets.
This patch reverts that part of the behaviour, instead relying on .td peepholes to perform the transformation to NILL. I reapplied my original fix for the problem addressed by r279105 (unsetting the upper bits, which prevents a compiler abort for a different reason).

Differential Revision: https://reviews.llvm.org/D23781


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279515 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 14:03:02 +00:00
Davide Italiano
5bf89a1581 [LTOCodeGenerator] Reduce code duplication. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279514 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 12:32:57 +00:00
Simon Pilgrim
9cbe8af733 [X86][SSE] Demonstrate inability to recognise that (v)cvtpd2ps intrinsics implicitly zeroes the upper half of the xmm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279511 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 11:26:28 +00:00
NAKAMURA Takumi
d53c5e9244 LLVMLanaDesc: Update libdesp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279510 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 10:47:40 +00:00
NAKAMURA Takumi
2d4d29012e Change the target's name, s/LanaiMCTargetDesc/LanaiDesc/g.
"AllTargetsDescs" in llvm-mc/CMakeLists.txt expects not ${target}MCTargetDesc, but ${target}Desc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279509 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 10:43:01 +00:00
Simon Pilgrim
688daa78a4 [X86][SSE] Demonstrate inability to recognise that (v)cvtpd2ps implicitly zeroes the upper half of the xmm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279508 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 10:35:24 +00:00
Oliver Stannard
a04e9e4a0a [ARM] Generate consistent frame records for Thumb2
There is not an official documented ABI for frame pointers in Thumb2,
but we should try to emit something which is useful.

We use r7 as the frame pointer for Thumb code, which currently means
that if a function needs to save a high register (r8-r11), it will get
pushed to the stack between the frame pointer (r7) and link register
(r14). This means that while a stack unwinder can follow the chain of
frame pointers up the stack, it cannot know the offset to lr, so does
not know which functions correspond to the stack frames.

To fix this, we need to push the callee-saved registers in two batches,
with the first push saving the low registers, fp and lr, and the second
push saving the high registers. This is already implemented, but
previously only used for iOS. This patch turns it on for all Thumb2
targets when frame pointers are required by the ABI, and the frame
pointer is r7 (Windows uses r11, so this isn't a problem there). If
frame pointer elimination is enabled we still emit a single push/pop
even if we need a frame pointer for other reasons, to avoid increasing
code size.

We must also ensure that lr is pushed to the stack when using a frame
pointer, so that we end up with a complete frame record. Situations that
could cause this were rare, because we already push lr in most
situations so that we can return using the pop instruction.

Differential Revision: https://reviews.llvm.org/D23516



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279506 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 09:19:22 +00:00
Daniel Berlin
412e2564fd GVNHoist: Use the pass version of MemorySSA and preserve it.
Summary: GVNHoist: Use the pass version of MemorySSA and preserve it.

Reviewers: sebpop, george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279504 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 05:42:41 +00:00
Matthias Braun
eb3b7392bb Revert "(HEAD -> master, origin/master, origin/HEAD) CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses"
Reverting while tracking down a use after free.

This reverts commit r279502.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279503 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 05:17:11 +00:00
Matthias Braun
ded269b907 CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
This patch removes the MachineFunctionAnalysis. Instead we keep a
map from IR Function to MachineFunction in the MachineModuleInfo.

This allows the insertion of ModulePasses into the codegen pipeline
without breaking it because the MachineFunctionAnalysis gets dropped
before a module pass.

Peak memory should stay unchanged without a ModulePass in the codegen
pipeline: Previously the MachineFunction was freed at the end of a codegen
function pipeline because the MachineFunctionAnalysis was dropped; With
this patch the MachineFunction is freed after the AsmPrinter has
finished.

Differential Revision: http://reviews.llvm.org/D23736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279502 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 03:20:09 +00:00
Matt Arsenault
5f3b1be4e1 BranchRelaxation: Fix handling of blocks with multiple conditional
branches

Looping over all terminators exposed AArch64 tests hitting
an assert from analyzeBranch failing. I believe these cases
were miscompiled before.

e.g.
  fcmp s0, s1
  b.ne LBB0_1
  b.vc LBB0_2
  b LBB0_2
LBB0_1:
  ; Large block
LBB0_2:
 ; ...

Both of the individual conditional branches need to
be expanded, since neither can reach the final block.

Split the original block into ones which analyzeBranch
will be able to understand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279499 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 01:30:30 +00:00
Jacques Pienaar
cf0122b23f [lanai] Make Lanai backend non-experimental
Summary:
Add Lanai backend to default targets.

Discussion of proposal: http://lists.llvm.org/pipermail/llvm-dev/2016-July/102480.html. ISA added in r279149.

Reviewers: jyknight, rengolin, eliben, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22530

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279498 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 01:06:44 +00:00
Jacques Pienaar
ee0313b555 [lanai] Exit early in Mem Alu combiner if sentinel reach.
LanaiMemAluCombiner could try to query the debug value of a list sentinel. Add check to exit early instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279497 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-23 01:04:41 +00:00
George Burgess IV
9d02a13819 [MemorySSA] Remove unused field. NFC.
Given that we're not currently using blocker info, and whether or not we
will end up using it it is unclear, don't waste 8 (or 4) bytes of memory
per path node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279493 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 23:40:01 +00:00
Sanjay Patel
a28b29b8db [InstSimplify] add helper function for SimplifyICmpInst(); NFCI
And add a FIXME because the helper excludes folds for vectors. It's
not clear yet how many of these are actually testable (and therefore
necessary?) because later analysis uses computeKnownBits and other
methods to catch many of these cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279492 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 23:12:02 +00:00
Pete Cooper
72d647d689 Fix crash from assert in r279466.
The assert in r279466 checks that we call the correct version of
Intrinsic::getName.  The version which accepts only an ID should not
be used for intrinsics with overloaded types.  The global-isel
code was calling the wrong version.  The test CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
will ensure that we call the correct version from now on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279487 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 22:27:05 +00:00
Duncan P. N. Exon Smith
fd2abc5908 ADT: Separate some list manipulation API into ilist_base, NFC
Separate algorithms in iplist<T> that don't depend on T into ilist_base,
and unit test them.

While I was adding unit tests for these algorithms anyway, I also added
unit tests for ilist_node_base and ilist_sentinel<T>.

To make the algorithms and unit tests easier to write, I also did the
following minor changes as a drive-by:
- encapsulate Prev/Next in ilist_node_base to so that algorithms are
  easier to read, and
- update ilist_node_access API to take nodes by reference.

There should be no real functionality change here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279484 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 22:21:07 +00:00
Duncan P. N. Exon Smith
9ed748efef Fix header comment for unittests/ADT/ilistTest.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279483 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 22:04:16 +00:00
Tim Shen
3d515f61b6 [ADT] Actually mutate the iterator VisitStack.back().second, not its copy.
Summary: Before the change, *Opt never actually gets updated by the end
of toNext(), so for every next time the loop has to start over from
child_begin(). This bug doesn't affect the correctness, since Visited prevents
it from re-entering the same node again; but it's slow.

Reviewers: dberris, dblaikie, dannyb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279482 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 21:59:26 +00:00
Sanjay Patel
0fd3c95310 [InstCombine] change param type from Instruction to BinaryOperator for icmp helpers; NFCI
This saves some casting in the helper functions and eases some further refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279478 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 21:24:29 +00:00
Tim Shen
22fca38c9c [GraphTraits] Replace all NodeType usage with NodeRef
This should finish the GraphTraits migration.

Differential Revision: http://reviews.llvm.org/D23730


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279475 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 21:09:30 +00:00
Duncan P. N. Exon Smith
d47df8775d ADT: Remove ilist_*sentinel_traits, NFC
Remove all the dead code around ilist_*sentinel_traits.  This is a
follow-up to gutting them as part of r279314 (originally r278974),
staged to prevent broken builds in sub-projects.

Uses were removed from clang in r279457 and lld in r279458.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279473 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 20:51:00 +00:00
Sanjay Patel
e3ecb56f22 [InstCombine] use m_APInt to allow icmp (shr exact X, Y), 0 folds for splat constant vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279472 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 20:45:06 +00:00
Pete Cooper
00a565c2cd Add ADT headers to the cmake headers directory for LLVMSupport. NFC.
Xcode and MSVC list the headers and source files for each library.

LLVMSupport lists included the source files for ADT but not the headers.  This
add the ADT headers so that they are browsable by the UI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279470 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 20:38:53 +00:00
Pete Cooper
75494aa604 Add comments and an assert to follow-up on r279113. NFC.
Philip commented on r279113 to ask for better comments as to
when to use the different versions of getName.  Its also possible
to assert in the simple case that we aren't an overloaded intrinsic
as those have to use the more capable version of getName.

Thanks for the comments Philip.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279466 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 20:18:28 +00:00
Daniel Berlin
084874bf6b IDFCalculator: Remove unused field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279465 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 19:52:23 +00:00
Matt Arsenault
7517ed227a AMDGPU: Split SILowerControlFlow into two pieces
Do most of the lowering in a pre-RA pass. Keep the skip jump
insertion late, plus a few other things that require more
work to move out.

One concern I have is now there may be COPY instructions
which do not have the necessary implicit exec uses
if they will be lowered to v_mov_b32.

This has a positive effect on SGPR usage in shader-db.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279464 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 19:33:16 +00:00
Daniel Berlin
ce35dd29a5 MSSA: Factor out phi node placement
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279462 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 19:14:30 +00:00
Daniel Berlin
51dfc8b81f MSSA: Only rename accesses whose defining access is nullptr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279461 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-22 19:14:16 +00:00