15580 Commits

Author SHA1 Message Date
James Molloy
3015dfb7d7 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 10:56:31 +00:00
NAKAMURA Takumi
c1b18e7549 test/CodeGen/X86/atom-lea-sp.ll: Add explicit -mtriple=i686-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 05:12:58 +00:00
Evan Cheng
54a4ce431f Commit Andy Zhang's test for the lea patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 22:33:17 +00:00
Kostya Serebryany
95e3cf44a9 [asan] unpoison the stack before every noreturn call. Fixes asan issue 37. llvm part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 21:36:17 +00:00
Elena Demikhovsky
f602040c49 Fixed a bug in printing "cmp" pseudo ops.
> This IR code
> %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14)
> fails with assertion:
>
> llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed.
> 0  llc             0x0000000001355803
> 1  llc             0x0000000001355dc9
> 2  libpthread.so.0 0x00007f79a30575d0
> 3  libc.so.6       0x00007f79a23a1945 gsignal + 53
> 4  libc.so.6       0x00007f79a23a2f21 abort + 385
> 5  libc.so.6       0x00007f79a239a810 __assert_fail + 240
> 6  llc             0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119

I added the full testing for all possible pseudo-ops of cmp.
I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp.

You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 08:37:26 +00:00
Chad Rosier
743e19983e [fast-isel] Add support for SUBs with non-legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150047 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 02:45:44 +00:00
Chad Rosier
176346d021 Add comment to test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 02:30:12 +00:00
Chad Rosier
6fde875621 [fast-isel] Add support for ORs with non-legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150045 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 02:29:21 +00:00
Chad Rosier
60c8fa6bb9 [fast-isel] Add support for indirect branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 23:56:08 +00:00
Craig Topper
dbd98a4b1b Add instruction selection for 256-bit VPSHUFD and 128-bit VPERMILPS/VPERMILPD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 06:28:42 +00:00
Chad Rosier
3901c3e750 [fast-isel] Add support for ADDs with non-legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06 23:50:07 +00:00
Kostya Serebryany
0ca032b03d The patch resolves the conflict between AddressSanitizer and load widening (GVN).
The problem initially reported by Mozilla folks (http://code.google.com/p/address-sanitizer/issues/detail?id=20),
but it also prevents us from enabling LLVM bootstrap with AddressSanitizer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06 22:48:56 +00:00
Bill Wendling
b595c48a8a The 'unwind' instruction is deprecated and will be removed, making this test
obsolete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06 18:18:47 +00:00
Nick Lewycky
fad4d40f37 Teach GlobalOpt to handle atomic accesses to globals.
* Most of the transforms come through intact by having each transformed load or
store copy the ordering and synchronization scope of the original.
 * The transform that turns a global only accessed in main() into an alloca
(since main is non-recursive) with a store of the initial value uses an
unordered store, since it's guaranteed to be the first thing to happen in main.
(Threads may have started before main (!) but they can't have the address of a
function local before the point in the entry block we insert our code.)
 * The heap-SRoA transforms are disabled in the face of atomic operations. This
can probably be improved; it seems odd to have atomic accesses to an alloca
that doesn't have its address taken.

AnalyzeGlobal keeps track of the strongest ordering found in any use of the
global. This is more information than we need right now, but it's cheap to
compute and likely to be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149847 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 19:56:38 +00:00
Duncan Sands
7abf924d31 Testcase for commit 149833 (use of an uninitialized variable noticed
by GCC).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 19:27:57 +00:00
Duncan Sands
33756f96d7 Reduce the number of dom queries made by GVN's conditional propagation
logic by half: isOnlyReachableViaThisEdge was trying to be clever and
handle the case of a branch to a basic block which is contained in a
loop.  This costs a domtree lookup and is completely useless due to
GVN's position in the pass pipeline: all loops have preheaders at this
point, which means it is enough for isOnlyReachableViaThisEdge to check
that Dst has only one predecessor.  (I checked this theoretical argument
by running over the entire nightly testsuite, and indeed it is so!).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149838 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 18:25:50 +00:00
Benjamin Kramer
d52d9cd038 Testing vector code without sse doesn't make much sense.
Should bring arm and ppc testers back to life (they default to -mcpu=generic)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 11:19:39 +00:00
Chris Lattner
521a255693 Add a test for the miscompilation my recent ConstantDataArray patches introduced, to make sure
we don't regress on it in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 02:37:36 +00:00
Craig Topper
eea723fe02 Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 00:55:56 +00:00
Hal Finkel
edc8db87dc Boost the effective chain depth of loads and stores.
By default, boost the chain depth contribution of loads and stores. This will allow a load/store pair to vectorize even when it would not otherwise be long enough to satisfy the chain depth requirement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 04:14:04 +00:00
Chad Rosier
2f2d1d7ec0 [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 00:39:19 +00:00
Chad Rosier
ee8901c08f [fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149706 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 20:27:51 +00:00
Chad Rosier
36b7beb429 [fast-isel] Add support for selecting UIToFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 19:42:52 +00:00
Nadav Rotem
7e413e9c94 The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149692 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 13:18:25 +00:00
Akira Hatanaka
6c2cf8b1fb Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 04:33:00 +00:00
Dan Gohman
16717a7c56 Fix SSAUpdaterImpl's RecordMatchingPHI to record exactly the
PHI nodes which were matched, rather than climbing up the
original PHI node's operands to rediscover PHI nodes for
recording, since the PHI nodes found that are not
necessarily part of the matched set.
This fixes rdar://10589171.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 01:07:01 +00:00
Jim Grosbach
d5917f0b4d Revert "Disable InstCombine unsafe folding bitcasts of calls w/ varargs."
This reverts commit d0e277d272d517ca1cda368267d199f0da7cad95.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 00:00:50 +00:00
Matt Beaumont-Gay
6ab8949cc1 Unix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 19:00:49 +00:00
NAKAMURA Takumi
7a73925c50 Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
I cannot reproduce a fixed issue with other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 11:44:58 +00:00
Elena Demikhovsky
dcabc7bca9 Optimization for SIGN_EXTEND operation on AVX.
Special handling was added for v4i32 -> v4i64 and v8i16 -> v8i32
extensions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 09:10:43 +00:00
Lang Hames
50a36f7102 Set EFLAGS correctly in EmitLoweredSelect on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 07:48:37 +00:00
Lang Hames
02e08d5b4d PR11868. The previous loop in LiveIntervals::join would sometimes fall over if
more than two adjacent ranges needed to be merged. The new version should be
able to handle an arbitrary sequence of adjancent ranges.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02 05:37:34 +00:00
Andrew Trick
922d314e8f Instruction scheduling itinerary for Intel Atom.
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:20:51 +00:00
Mon P Wang
845b1899b6 Avoid creating an extract element to an illegal type after LegalizeTypes has run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:15:20 +00:00
Andrew Trick
ee498d3254 VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:13:57 +00:00
NAKAMURA Takumi
3a14d0f0fd test/CodeGen/X86/avx-minmax.ll: Relax expressions for Win32 targets. YMM arguments are passed as indirect on Win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 14:35:29 +00:00
Elena Demikhovsky
1766971769 Passing AVX 256-bit structures in Win64 was wrong.
Fixed Win64 calling conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149494 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 10:46:14 +00:00
Elena Demikhovsky
3ae98150e3 Optimization for "truncate" operation on AVX.
Truncating v4i64 -> v4i32 and v8i32 -> v8i16 may be done with set of shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149485 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 07:56:44 +00:00
Hal Finkel
de5e5ec304 Add a basic-block autovectorization pass.
This is the initial checkin of the basic-block autovectorization pass along with some supporting vectorization infrastructure.
Special thanks to everyone who helped review this code over the last several months (especially Tobias Grosser).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149468 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 03:51:43 +00:00
Jim Grosbach
d0e277d272 Disable InstCombine unsafe folding bitcasts of calls w/ varargs.
Changing arguments from being passed as fixed to varargs is unsafe, as
the ABI may require they be handled differently (stack vs. register, for
example).

Remove two tests which rely on the bitcast being folded into the direct
call, which is exactly the transformation that's unsafe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149457 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 00:08:17 +00:00
Kevin Enderby
d49b2a7a9d Fixed a crash in llvm-mc for Mach-O when a symbol difference expression uses a
symbol from an assignment.  In this case the symbol did not have a fragment so
MCObjectWriter::IsSymbolRefDifferenceFullyResolved() should not have been
calling IsSymbolRefDifferenceFullyResolvedImpl() with a NULL fragment and should
just have returned false in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149442 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 23:02:57 +00:00
Craig Topper
cac50c5ab8 Remove pcmpgt/pcmpeq intrinsics as clang is not using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 06:52:44 +00:00
Bill Wendling
1fe1adeeba Remove all references to the old EH.
There was always the current EH. -- Ministry of Truth


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:09:07 +00:00
Bill Wendling
35b8870961 Update test to new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:05:13 +00:00
Bill Wendling
4b523b4371 Update test to new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 02:04:20 +00:00
Chandler Carruth
beb05952ce Chris's constant data sequence refactoring actually enabled printing
vectors of all one bits to be printed more cleverly in the AsmPrinter.
Unfortunately, the byte value for all one bits is the same with
-fsigned-char as the error return of '-1'. Force this to be the unsigned
byte value when returning it to avoid this problem, and update the test
case for the shiny new behavior.

Yay for building LLVM and Clang with -funsigned-char.

Chris, please review, and let me know if there is any reason to not
desire this change. It seems good on the surface, and certainly intended
based on the code written.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 23:47:44 +00:00
Devang Patel
885f65b4a1 Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 22:47:12 +00:00
Devang Patel
be3e310d5e Intel syntax. Support .intel_syntax directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 20:02:42 +00:00
Craig Topper
cc30006391 Fix pattern for memory form of PSHUFD for use with FP vectors to remove bitcast to an integer vector that normal code wouldn't have. Also remove bitcasts from code that turns splat vector loads into a shuffle as it was making the broken pattern necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 07:50:31 +00:00
NAKAMURA Takumi
90fb059222 CMake: Promote the testing targets out of folders on IDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 03:15:47 +00:00