1. Key constant values (version, magic) and data structures related to raw and
indexed profile format are moved into one centralized file: InstrProf.h.
2. Utility function such as MD5Hash computation is also moved to the common
header to allow sharing with other components in the future.
3. A header data structure is introduced for Indexed format so that the reader
and writer can always be in sync.
4. Added some comments to document different places where multiple definition
of the data structure must be kept in sync (reader/writer, runtime, lowering
etc). No functional change is intended.
Differential Revision: http://reviews.llvm.org/D13758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250638 91177308-0d34-0410-b5e6-96231b3b80d8
This patch improves support for combining the SSE4A EXTRQ(I) and INSERTQ(I) intrinsics:
1 - Converts INSERTQ/EXTRQ calls to INSERTQI/EXTRQI if the 'bit index' and 'length' operands are constant
2 - Converts INSERTQI/EXTRQI calls to shufflevector if the bit index/length are both byte aligned (we can already lower shuffles to INSERTQI/EXTRQI if its useful)
3 - Constant folding support
4 - Add zeroinitializer handling
Differential Revision: http://reviews.llvm.org/D13348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250609 91177308-0d34-0410-b5e6-96231b3b80d8
This property was already used in the code path when no liveness
intervals are present. Unfortunately the code path that uses liveness
intervals tried to query a cached live interval for an allocatable
physreg, those are usually not computed so a conservative default was
used.
This doesn't affect any of the lit testcases. This is a foreclosure to
upcoming changes which should be NFC but without this patch this tidbit
wouldn't be NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250596 91177308-0d34-0410-b5e6-96231b3b80d8
This should not change behaviour because as far as I can see all code
reading the pressure changes has no effect if the PressureInc is 0.
Removing these entries however does avoid unnecessary computation, and
results in a more stable debug output. I want the stable debug output to
check that some upcoming changes are indeed NFC and identical even at
the debug output level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250595 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This is a temporary hack until we get around to remapping the vreg
numbers to local numbers. Dead vregs cause bad numbering and make
consumers sad.
We could also just look at debug info an use named locals instead, but
vregs have to work properly anyways so there!
Reviewers: binji, sunfish
Subscribers: jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D13839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250594 91177308-0d34-0410-b5e6-96231b3b80d8
It is too easy to accidentally violate the ordering requirements when
modifying the PressureDiff entries through iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250590 91177308-0d34-0410-b5e6-96231b3b80d8
This avoids problems with different (u)intXX definition on different
platforms. Specifically this fixes a case on OS/X which had uint64_t
defined as unsigned long long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250589 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
Some shared code for handling eh.exceptionpointer and eh.exceptioncode
needs to not share the part that truncates to 32 bits, which is intended
just for exception codes.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250588 91177308-0d34-0410-b5e6-96231b3b80d8
Our previous value of "16 + 8 + MaxCallFrameSize" for ParentFrameOffset
is incorrect when CSRs are involved. We were supposed to have a test
case to catch this, but it wasn't very rigorous.
The main effect here is that calling _CxxThrowException inside a
catchpad doesn't immediately crash on MOVAPS when you have an odd number
of CSRs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250583 91177308-0d34-0410-b5e6-96231b3b80d8
This lets us make guesses about symbols in third party DLLs without
debug info, like MSVCR120.dll or kernel32.dll. dbghelp does the same
thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250582 91177308-0d34-0410-b5e6-96231b3b80d8
Changing PGO data format layout can be a pain. Many different places need
to be touched and kept in sync. Failing to do so usually results in errors
very time consuming to debug.
This file is intended to be the master file that defines the layout of the
core runtime data structures. Currently only two structure is covered: Per
function ProfData structure and the function record structure used in
coverage mapping.
No client code has been made yet, so this commit is NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250574 91177308-0d34-0410-b5e6-96231b3b80d8
In order to resolve PR25059, we're going to need to be able to generate symlinks to libraries manually, so I need this code to be reusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250573 91177308-0d34-0410-b5e6-96231b3b80d8
The motivation for this patch starts with PR20134:
https://llvm.org/bugs/show_bug.cgi?id=20134
void foo(int *a, int i) {
a[i] = a[i+1] + a[i+2];
}
It seems better to produce this (14 bytes):
movslq %esi, %rsi
movl 0x4(%rdi,%rsi,4), %eax
addl 0x8(%rdi,%rsi,4), %eax
movl %eax, (%rdi,%rsi,4)
Rather than this (22 bytes):
leal 0x1(%rsi), %eax
cltq
leal 0x2(%rsi), %ecx
movslq %ecx, %rcx
movl (%rdi,%rcx,4), %ecx
addl (%rdi,%rax,4), %ecx
movslq %esi, %rax
movl %ecx, (%rdi,%rax,4)
The most basic problem (the first test case in the patch combines constants) should also be fixed in InstCombine,
but it gets more complicated after that because we need to consider architecture and micro-architecture. For
example, AArch64 may not see any benefit from the more general transform because the ISA solves the sexting in
hardware. Some x86 chips may not want to replace 2 ADD insts with 1 LEA, and there's an attribute for that:
FeatureSlowLEA. But I suspect that doesn't go far enough or maybe it's not getting used when it should; I'm
also not sure if FeatureSlowLEA should also mean "slow complex addressing mode".
I see no perf differences on test-suite with this change running on AMD Jaguar, but I see small code size
improvements when building clang and the LLVM tools with the patched compiler.
A more general solution to the sext(add nsw(x, C)) problem that works for multiple targets is available
in CodeGenPrepare, but it may take quite a bit more work to get that to fire on all of the test cases that
this patch takes care of.
Differential Revision: http://reviews.llvm.org/D13757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250560 91177308-0d34-0410-b5e6-96231b3b80d8
Crashing is bad, m'kay? Fixing a 4 year old bug of my own creation.
Adding the testcase now which I should have added then which would have
long since caught this.
The problem is that printMessage() will display the diagnostic but not
set HadError to true, resulting in the assembler continuing on its way
and trying to create relocations for things that may not allow them or
otherwise get itself into trouble. Using the Error() helper function
here rather than calling printMessage() directly resolves this.
rdar://23133240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250557 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
We now use the block for the catchpad itself, rather than its normal
successor, as the funclet entry.
Putting the normal successor in the map leads downstream funclet
membership computations to erroneous results.
Reviewers: majnemer, rnk
Subscribers: rnk, llvm-commits
Differential Revision: http://reviews.llvm.org/D13798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250552 91177308-0d34-0410-b5e6-96231b3b80d8
