33039 Commits

Author SHA1 Message Date
Eric Christopher
3de08c62a1 Weak non-function symbols were being accessed directly, which is
incorrect, as the chosen representative of the weak symbol may not live
with the code in question. Always indirect the access through the TOC
instead.

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 20:51:31 +00:00
Bill Seurer
89c83dc08b Fix test case label check
Several (but not all) of the labels that are checked for in this test case
are checked as strings instead of labels.  This can cause an apparent test
case failure if they are tested in an appropriately named directory.

For example, one of them that fails:

define zeroext i32 @test2(i32 %A.u, i32 %B.u)  {
; A8: test2
; A8: uxtab  r0, r0, r1


Output that causes it to fail:

. . .
	.file	"/home/seurer/llvm/llvm-test2/test/CodeGen/Thumb2/thumb2-uxt_rot.ll"
. . .
	.globl	test2
	.align	1
	.type	test2,%function
	.code	16                      @ @test2
	.thumb_func
test2:
	.fnstart


The "A8: test2" matches on the directory name instead of the label.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 20:24:49 +00:00
Artyom Skrobov
7cbf72b489 Handle ARMv6-J as an alias, instead of fake architecture
Summary:
This follows D14577 to treat ARMv6-J as an alias for ARMv6,
instead of an architecture in its own right.

The functional change is that the default CPU when targeting ARMv6-J
changes from arm1136j-s to arm1136jf-s, which is currently used as
the default CPU for ARMv6; both are, in fact, ARMv6-J CPUs.

The J-bit (Jazelle support) is irrelevant to LLVM, and it doesn't
affect code generation, attributes, optimizations, or anything else,
apart from selecting the default CPU.

Reviewers: rengolin, logan, compnerd

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 16:46:09 +00:00
Diego Novillo
c6b24c2806 SamplePGO - Add line offset and discriminator information to sample reports.
While debugging some sampling coverage problems, I found this useful:
When applying samples from a profile, it helps to also know what line
offset and discriminator the sample belongs to. This makes it easy to
correlate against the input profile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 15:39:42 +00:00
Owen Anderson
3f9c2909a5 Fix a pair of issues that caused an infinite loop in reassociate.
Terrifyingly, one of them is a mishandling of floating point vectors
in Constant::isZero().  How exactly this issue survived this long
is beyond me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 08:16:13 +00:00
Hrvoje Varga
63e0cbed94 [mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, MULEU_S.PH.QBL, MULEU_S.PH.QBR, MULQ_RS.PH, MULQ_RS.W, MULQ_S.PH and MULQ_S.W instructions
Differential Revision: http://reviews.llvm.org/D14280


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 07:14:52 +00:00
Dan Gohman
b2e21a25bd [WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 03:02:49 +00:00
Peter Collingbourne
5178bc957a ScalarEvolution: do not set nuw when creating exprs of form <expr> + <all-ones>.
The nuw constraint will not be satisfied unless <expr> == 0.

This bug has been around since r102234 (in 2010!), but was uncovered by
r251052, which introduced more aggressive optimization of nuw scev expressions.

Differential Revision: http://reviews.llvm.org/D14850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 01:26:13 +00:00
Tobias Edler von Koch
cbf870d3b1 [LTO] Add options to llvm-lto to select output format and dump merged module
This introduces two new options:
- "llvm-lto -save-merged-module -o outfile" dumps the LTO Module to
  outfile.merged.bc prior to CodeGen and after LTO optimizations have been run.
- "llvm-lto -filetype=asm -o outfile" makes llvm-lto emit assembly instead of
  object code in outfile.

Both are intended for use in lit tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253624 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 00:13:05 +00:00
Reid Kleckner
d1d6f53a8b [WinEH] Disable most forms of demotion
Now that the register allocator knows about the barriers on funclet
entry and exit, testing has shown that this is unnecessary.

We still demote PHIs on unsplittable blocks due to the differences
between the IR CFG and the Machine CFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253619 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 23:23:33 +00:00
Simon Pilgrim
3f1dbfd35d [X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index.
Found during stress testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:13:56 +00:00
Sanjay Patel
272898a425 [InstCombine] add tests to show missing trunc optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 22:11:52 +00:00
Sanjay Patel
634e1cb482 [InstCombine] add tests to show missing bitcast optimizations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253602 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 21:32:25 +00:00
Dehao Chen
0a7baafe64 Reimplement discriminator assignment algorithm.
Summary: The new algorithm is more efficient (O(n), n is number of basic blocks). And it is guaranteed to cover all cases of multiple BB mapped to same line.

Reviewers: dblaikie, davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253594 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 19:53:05 +00:00
James Molloy
a6b4079da3 [GlobalOpt] Localize some globals that have non-instruction users
We currently bail out of global localization if the global has non-instruction users. However, often these can be simple bitcasts or constant-GEPs, which we can easily turn into instructions before localizing. Be a bit more aggressive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 18:04:33 +00:00
Jun Bum Lim
575b88edcb [AArch64]Extend merging narrow loads into a wider load
This change extends r251438 to handle more narrow load promotions
including byte type, unscaled, and signed. For example, this change will
convert :
  ldursh w1, [x0, #-2]
  ldurh  w2, [x0, #-4]
into
  ldur  w2, [x0, #-4]
  asr   w1, w2, #16
  and   w2, w2, #0xffff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 17:21:41 +00:00
Sanjay Patel
02857f7b46 this new test file was accidentally left out of r253573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 16:39:00 +00:00
Sanjay Patel
da754b5015 [CGP] despeculate expensive cttz/ctlz intrinsics
This is another step towards allowing SimplifyCFG to speculate harder, but then have 
CGP clean things up if the target doesn't like it.

Previous patches in this series:
http://reviews.llvm.org/D12882
http://reviews.llvm.org/D13297

D13297 should catch most expensive ops, but speculation of cttz/ctlz requires special
handling because of weirdness in the intrinsic definition for handling a zero input 
(that definition can probably be blamed on x86).

For example, if we have the usual speculated-by-select expensive op pattern like this:

  %tobool = icmp eq i64 %A, 0
  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)   ; is_zero_undef == true
  %cond = select i1 %tobool, i64 64, i64 %0
  ret i64 %cond

There's an instcombine that will turn it into:

  %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 false)   ; is_zero_undef == false

This CGP patch is looking for that case and despeculating it back into:

  entry:
    %tobool = icmp eq i64 %A, 0
    br i1 %tobool, label %cond.end, label %cond.true

  cond.true:
    %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)    ; is_zero_undef == true
    br label %cond.end

  cond.end:
    %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
    ret i64 %cond

This unfortunately may lead to poorer codegen (see the changes in the existing x86 test), 
but if we increase speculation in SimplifyCFG (the next step in this patch series), then
we should avoid those kinds of cases in the first place.

The need for this patch was originally mentioned here:
http://reviews.llvm.org/D7506
with follow-up here:
http://reviews.llvm.org/D7554

Differential Revision: http://reviews.llvm.org/D14630



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 16:37:10 +00:00
Hans Wennborg
086b179985 X86: More efficient legalization of wide integer compares
In particular, this makes the code for 64-bit compares on 32-bit targets
much more efficient.

Example:

  define i32 @test_slt(i64 %a, i64 %b) {
  entry:
    %cmp = icmp slt i64 %a, %b
    br i1 %cmp, label %bb1, label %bb2
  bb1:
    ret i32 1
  bb2:
    ret i32 2
  }

Before this patch:

  test_slt:
          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          setae   %al
          cmpl    16(%esp), %ecx
          setge   %cl
          je      .LBB2_2
          movb    %cl, %al
  .LBB2_2:
          testb   %al, %al
          jne     .LBB2_4
          movl    $1, %eax
          retl
  .LBB2_4:
          movl    $2, %eax
          retl

After this patch:

  test_slt:
          movl    4(%esp), %eax
          movl    8(%esp), %ecx
          cmpl    12(%esp), %eax
          sbbl    16(%esp), %ecx
          jge     .LBB1_2
          movl    $1, %eax
          retl
  .LBB1_2:
          movl    $2, %eax
          retl

Differential Revision: http://reviews.llvm.org/D14496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 16:35:08 +00:00
Diego Novillo
5d8ee1bd0d SamplePGO - Sort samples by source location when emitting as text.
When dumping function samples or writing them out as text format, it
helps if the samples are emitted sorted by source location. The sorting
of the maps is a bit slow, so we only do it on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253568 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 15:33:08 +00:00
Zoran Jovanovic
96664db5ff [mips] Add tests for ROL and ROR macros expansion
Author: obucina


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 15:04:31 +00:00
Elena Demikhovsky
1c8b4f0796 AVX-512: Fixed COPY_TO_REGCLASS for mask registers
Copying one mask register to another under BW should be done with kmovq instruction, otherwise we can loose some bits.
Copying 8 bits under DQ may be done with kmovb.

Differential Revision: http://reviews.llvm.org/D14812



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 13:13:00 +00:00
Artyom Skrobov
cc1b3e47c0 Removing specific target from the generic test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253562 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 12:24:47 +00:00
Simon Pilgrim
175ea25f68 [X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension
The lowering patterns for X86ISD::VZEXT_MOVL for 128-bit to 256-bit vectors were just copying the lower xmm instead of actually masking off the first scalar using a blend.

Fix for PR25320.

Differential Revision: http://reviews.llvm.org/D14151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 12:18:37 +00:00
Alexey Bataev
3e00ff9fdc Alternative to long nops for X86 CPUs, by Andrey Turetsky
Make X86AsmBackend generate smarter nops instead of a bunch of 0x90 for code alignment for CPUs which don't support long nop instructions.
Differential Revision: http://reviews.llvm.org/D14178


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253557 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 11:44:35 +00:00
James Molloy
e30d17a4d7 [FunctionAttrs] Provide a mechanism for adding function attributes from the command line
This provides a way to force a function to have certain attributes from the command line. This can be useful when debugging or doing workload exploration, where manually editing IR is tedious or not possible (due to build systems etc).

The syntax is -force-attribute=function_name:attribute_name

All function attributes are parsed except alignstack as it requires an argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 08:49:57 +00:00
Igor Breger
e20dfebf87 AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions.
Differential Revision: http://reviews.llvm.org/D14702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253548 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 08:26:56 +00:00
Igor Breger
499f1059a5 AVX512: Implemented encoding for the vmovss.s and vmovsd.s instructions.
Differential Revision: http://reviews.llvm.org/D14771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253547 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 07:58:33 +00:00
Igor Breger
96600b3c15 AVX512: Implemented encoding for the follow instructions.
vmovapd.s, vmovaps.s, vmovdqa32.s, vmovdqa64.s, vmovdqu16.s, vmovdqu32.s, vmovdqu64.s, vmovdqu8.s, vmovupd.s, vmovups.s

Differential Revision: http://reviews.llvm.org/D14768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253546 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 07:43:43 +00:00
Elena Demikhovsky
43be5f580c Pointers in Masked Load, Store, Gather, Scatter intrinsics
The masked intrinsics support all integer and floating point data types. I added the pointer type to this list.
Added tests for CodeGen and for Loop Vectorizer.
Updated the Language Reference.

Differential Revision: http://reviews.llvm.org/D14150



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253544 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 07:17:16 +00:00
Pete Cooper
6d024c616a Revert "Change memcpy/memset/memmove to have dest and source alignments."
This reverts commit r253511.

This likely broke the bots in
http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2/builds/20202
http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/3787

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 05:56:52 +00:00
Weiming Zhao
f9d8b8d2ab Fix bug 25440: GVN assertion after coercing loads
Optimizations like LoadPRE in GVN will insert new instructions.
If the insertion point is in a already processed BB, they should
get a value number explicitly. If the insertion point is after
current instruction, then just leave it. However, current GVN framework
has no support for it.
In this patch, we just bail out if a VN can't be found.

Dfferential Revision: http://reviews.llvm.org/D14670

A    test/Transforms/GVN/pr25440.ll
M    lib/Transforms/Scalar/GVN.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 02:45:18 +00:00
Quentin Colombet
1fcad31efa [X86] Enable shrink-wrapping by default.
Differential Revision: http://reviews.llvm.org/D14156

rdar://problem/21118279


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 00:38:00 +00:00
Reid Kleckner
5f2411b750 Disable Go bindings test with MSan, it has tons of linker errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253525 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 00:05:20 +00:00
Davide Italiano
b8dd4a3d67 [SimplifyLibCalls] New trick: pow(x, 0.5) -> sqrt(x) under -ffast-math.
Differential Revision:	http://reviews.llvm.org/D14466


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 23:21:32 +00:00
Quentin Colombet
3fe74b8026 [AArch64] Enable shrink-wrapping by default.
Differential Revision: http://reviews.llvm.org/D14360

rdar://problem/20820748


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 23:12:20 +00:00
Pete Cooper
8b170f7f29 Change memcpy/memset/memmove to have dest and source alignments.
Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

These intrinsics currently have an explicit alignment argument which is
required to be a constant integer.  It represents the alignment of the
source and dest, and so must be the minimum of those.

This change allows source and dest to each have their own alignments
by using the alignment attribute on their arguments.  The alignment
argument itself is removed.

There are a few places in the code for which the code needs to be
checked by an expert as to whether using only src/dest alignment is
safe.  For those places, they currently take the minimum of src/dest
alignments which matches the current behaviour.

For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)
will now read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %dest, i8* align 8 %src, i32 500, i1 false)

For out of tree owners, I was able to strip alignment from calls using sed by replacing:
  (call.*llvm\.memset.*)i32\ [0-9]*\,\ i1 false\)
with:
  $1i1 false)

and similarly for memmove and memcpy.

I then added back in alignment to test cases which needed it.

A similar commit will be made to clang which actually has many differences in alignment as now
IRBuilder can generate different source/dest alignments on calls.

In IRBuilder itself, a new argument was added.  Instead of calling:
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, /* isVolatile */ false)
you now call
  CreateMemCpy(Dst, Src, getInt64(Size), DstAlign, SrcAlign, /* isVolatile */ false)

There is a temporary class (IntegerAlignment) which takes the source alignment and rejects
implicit conversion from bool.  This is to prevent isVolatile here from passing its default
parameter to the source alignment.

Note, changes in future can now be made to codegen.  I didn't change anything here, but this
change should enable better memcpy code sequences.

Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253511 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 22:17:24 +00:00
Simon Pilgrim
5c882ac1dc [DAGCombiner] Vector constant folding for comparisons
This patch adds support for vector constant folding of integer/float comparisons.

This requires FoldConstantVectorArithmetic to support scalar constant operands (in this case ISD::CONDCASE). In future we should be able to support other scalar constant types as necessary (and possibly start calling FoldConstantVectorArithmetic for all node creations)

Differential Revision: http://reviews.llvm.org/D14683

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253504 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 21:17:19 +00:00
Tim Northover
c931f35508 ARM: make sure backend is consistent about exception handling method.
It turns out we decide whether to use SjLj exceptions or some alternative in
two separate places in the backend, and they disagreed with each other. This
led to inconsistent code and is generally a terrible idea.

So make them consistent and add an assert that they *do* match (unfortunately
MCAsmInfo isn't available in opt, so it can't be used to initialise the CodeGen
version directly).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 21:10:39 +00:00
Mike Aizatsky
54225a9153 Disable gvn non-local speculative loads under asan.
Summary: Fix for https://llvm.org/bugs/show_bug.cgi?id=25550

Differential Revision: http://reviews.llvm.org/D14763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253498 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 20:43:00 +00:00
Betul Buyukkurt
a5be9e3cfb [PGO] Value profiling support
This change introduces an instrumentation intrinsic instruction for
value profiling purposes, the lowering of the instrumentation intrinsic
and raw reader updates. The raw profile data files for llvm-profdata
testing are updated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 18:14:55 +00:00
Artyom Skrobov
83d9e5696b Removing specific target from the generic test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 17:50:47 +00:00
Dan Gohman
3a7d5cfa3b [WebAssembly] Make bogus inline asm strings in tests be comments.
These tests aren't testing that the result is valid syntax; they're testing
that the compiler emits the inline asm operands correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253469 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 16:28:58 +00:00
Dan Gohman
94401ce9c8 [WebAssembly] Enable register coloring and register stackifying.
This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 16:12:01 +00:00
Manuel Klimek
fc0981ecbc Fix bug where WinCOFFObjectWriter would assume starting from an empty output.
Starting on an input stream that is not at offset 0 would trigger the
assert in WinCOFFObjectWriter.cpp:1065:

  assert(getStream().tell() <= (*i)->Header.PointerToRawData &&
               "Section::PointerToRawData is insane!");

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253464 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 15:24:17 +00:00
Jonas Paulsson
0e8fc1e8d2 [SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class.
The virtual register containing the address for returned value on
stack should in the DAG be represented with a CopyFromReg node and not
a Register node. Otherwise, InstrEmitter will not make sure that it
ends up in the right register class for the target instruction.

SystemZ needs this, becuause the reg class for address registers is a
subset of the general 64 bit register class.

test/SystemZ/CodeGen/args-07.ll and args-04.ll updated to run with
-verify-machineinstrs.

Reviewed by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253461 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 14:59:00 +00:00
Igor Laevsky
a90859a6e3 Revert "Revert "Strip metadata when speculatively hoisting instructions (r252604)"
Failing clang test is now fixed by the r253458.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253459 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 14:50:18 +00:00
James Molloy
66b8eaaca4 [LTO] Appease buildbots take 3
This time I've found a linux box and checked it there. This test now passes.

Because I'd introduced an undefined reference in @bar, gold now returns an error. This doesn't matter for the test itself, because it also emits the remarks the test is checking for. But it does cause LIT to notice a nonzero return code which it faults on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253454 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 12:08:24 +00:00
James Molloy
9e9da1f7c3 [LTO] Buildbot appeasing take 2
Let's try again. This time using the right function signature. It's a real pity I can't run this on a darwin machine...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253453 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 11:37:32 +00:00
James Molloy
e2c844f486 [LTO] Fix up test/tools/gold/X86/remarks.ll
It needs the same fixes as in test/LTO/X86/remarks.ll, but this test appears not to get run on my system (but does on the buildbot). Strange.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253452 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-18 11:32:14 +00:00