156795 Commits

Author SHA1 Message Date
Daniel Sanders
438d60f1e7 [tablegen] Handle atomic predicates for memory type inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.

This patch moves the implementation of the common atomic predicates related to
memory type into tablegen so that it can handle these differences.

It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318095 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 22:26:13 +00:00
Jake Ehrlich
ecb06411e6 [llvm-objcopy] Add --strip-debug
Many projects use this option. There are two ways to use it. You can
either a) Just use --strip-debug and keep the old file with debug
content or b) you can use --strip-debug, --only-keep-debug, and
--add-gnu-debuglink all in conjunction to create two separate files, the
stripped file and the debug file. --only-keep-debug is more complicated
than --strip-debug because it keeps the section headers without keeping
section contents. That's not really supported by llvm-objcopy at the
moment but I plan on adding it. So this change just supports a) and
options to support b) will come soon.

Differential Revision: https://reviews.llvm.org/D39919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318094 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 22:13:08 +00:00
Jake Ehrlich
a722ab9759 [llvm-objcopy] Add --strip-all option to llvm-objcopy
This change adds a slightly less extreme form of stripping. It should
remove any section that starts with ".debug" and should remove any
symbol table or relocations. In general this strips out most of the
stuff you don't need to execute but leaves a number of things around.
This behavior has been designed to be compatible with GNU strip/objcopy
--strip-all so that anywhere you currently use --strip-all you should be
able to use llvm-objcopy as a drop in replacement.

Differential Revision: https://reviews.llvm.org/D39769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318092 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 22:02:07 +00:00
Serge Guelton
f3d06a209d Fix -Werror when compiling rL318083 (ter)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318091 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 21:55:01 +00:00
Serge Guelton
da0e1ff523 Fix -Werror when compiling rL318083 (bis)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318090 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 21:40:57 +00:00
Serge Guelton
5aed538ef1 Fix -Werror when compiling rL318083
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318087 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 21:25:35 +00:00
Adrian Prantl
cfcc1f1c64 Fix an assertion in SelectionDAG::transferDbgValues()
when transferring debug info describing the lower bits of an extended SDNode.

rdar://problem/35504722

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318086 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 21:24:54 +00:00
Serge Guelton
1fd1611565 Reorder Value.def to optimize code size
If the first values in Value.def is the range of constant, then the code
generated by `isa<Constant>` is smaller by one operation (basically, an add is
removed). It turns out this small optimization reduces the size of the
statically linked clang binary by 400ko on my laptop. The theoritical
performance gain is non visible from my benchmarks, but the size dropdown is.

Differential Revision: https://reviews.llvm.org/D39373



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318083 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 20:57:40 +00:00
Evgeniy Stepanov
fbb029c5bb [arm] Fix Unnecessary reloads from GOT.
Summary:
This fixes PR35221.
Use pseudo-instructions to let MachineCSE hoist global address computation.

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39871

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318081 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 20:45:38 +00:00
Sanjay Patel
c7ea0c36fe [Reassociation] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318076 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 19:46:28 +00:00
Reid Kleckner
7983d3bb32 Fix clang -Wsometimes-uninitialized warning in SCEV code
I don't believe this was a problem in practice, as it's likely that the
boolean wasn't checked unless the backend condition was non-null.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 18:43:11 +00:00
Dinar Temirbulatov
461a9580a6 NFC, Allow SystemZ SLP tests only when SystemZ is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318070 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 18:35:43 +00:00
Rafael Espindola
8adf022a73 Create a TempFile class.
This just adds a TempFile class and replaces the use in
FileOutputBuffer with it.

The only difference for now is better error handling. Followup work includes:

- Convert other user of temporary files to it.
- Add support for automatically deleting on windows.
- Add a createUnnamed method that returns a potentially unnamed
  file. It would be actually unnamed on modern linux and have a
  unknown name on windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 18:33:44 +00:00
Daniel Sanders
ed22c23692 [globalisel][tablegen] Add support for extload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318068 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 18:30:23 +00:00
Petar Jovanovic
372866c87c fix printing of alias instructions by removing redundant spacing
Some alias instructions are printed with an extra space after the tab
character. Fix this by skipping that space when the tab character is printed
so that the instructions are aligned with the rest of the code.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D35946


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 18:00:24 +00:00
Sanjay Patel
0e1d4ee93e [ValueTracking] use 'auto' with 'dyn_cast'; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318058 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 17:56:23 +00:00
Craig Topper
65f52bf60e [X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter address
If the base of our gather corresponds to something contained in X86ISD::Wrapper we should be able to fold it into the address.

This patch refactors some of the address matching to more fully use the X86ISelAddressMode struct and the getAddressOperands helper. A new helper function matchVectorAddress is added to call matchWrapper or fall back to matchAddressBase.

We should also be able to support constant offsets from a wrapper, but I'll look into that in a future patch. We may even be able to completely reuse matchAddress here, but I wanted to start simple and work up to it.

Differential Revision: https://reviews.llvm.org/D39927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318057 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 17:53:59 +00:00
Sanjay Patel
b5fc14e6f8 [ValueTracking] simplify code in CannotBeNegativeZero() with match(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 17:40:47 +00:00
Sanjay Patel
5762a456d4 [Reassociate] add tests with 'reassoc' FMF; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318053 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 17:29:11 +00:00
Jan Vesely
9ac18d6709 AMDGPU: Drop duplicate setOperationAction
These are set with other scalar int ops few lines up

Differential Revision: https://reviews.llvm.org/D39928

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318051 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 16:46:07 +00:00
Jatin Bhateja
5afa924e80 [SCEV] Handling for ICmp occuring in the evolution chain.
Summary:
 If a compare instruction is same or inverse of the compare in the
 branch of the loop latch, then return a constant evolution node.
 This shall facilitate computations of loop exit counts in cases
 where compare appears in the evolution chain of induction variables.

 Will fix PR 34538

Reviewers: sanjoy, hfinkel, junryoungju

Reviewed By: sanjoy, junryoungju

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D38494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318050 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 16:43:24 +00:00
Simon Dardis
e618886889 Revert "[CodeGenPrepare] Check that erased sunken address are not reused"
This reverts commit r318032. The test broke some sanitizer bots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 16:41:17 +00:00
Diana Picus
a797fb9901 [ARM GlobalISel] Update legalizer test
Make one of the legalizer tests a bit more robust by making sure all
values we're interested in are used (either in a store or a return) and
by using loads instead of constants for obtaining values on fewer than
32 bits. This should make the test less fragile to changes in the
legalize combiner, since those loads are legal (as opposed to the
constants, which were being widened and thus produced opportunities for
the legalize combiner).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 16:02:42 +00:00
Bill Seurer
71f0575da1 [PowerPC][msan] Update msan to handle changed memory layouts in newer kernels
In more recent Linux kernels (including those with 47 bit VMAs) the layout of
virtual memory for powerpc64 changed causing the memory sanitizer to not
work properly. This patch adjusts a bit mask in the memory sanitizer to work
on the newer kernels while continuing to work on the older ones as well.

This is the non-runtime part of the patch and finishes it. ref: r317802

Tested on several 4.x and 3.x kernel releases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318045 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 15:43:19 +00:00
Omer Paparo Bivas
c95900468d Inserting a base test for X86 performance nops
Change-Id: I69da08b617d7fae8024c5aee04720eb465f39b81

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318041 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 15:02:39 +00:00
Uriel Korach
377a566dce [X86] test/testn intrinsics lowering to IR. llvm part.
Remove builtins from llvm and add AutoUpgrade support.
Also add fast-isel tests for the TEST and TESTN instructions.

Differential Revision: https://reviews.llvm.org/D38736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 12:51:18 +00:00
Greg Bedwell
bf3b5163ff Move the setting of LLVM_BUILD_MODE to a macro so that we can re-use it in compiler-rt
Differential Revision: https://reviews.llvm.org/D38470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 12:40:05 +00:00
Momchil Velikov
ce8bfffac1 [ARM] Place jump table as the first operand in additions
When generating table jump code for switch statements, place the jump
table label as the first operand in the various addition instructions
in order to enable addressing mode selectors to better match index
computation and possibly fold them into the addressing mode of the
table entry load instruction.

Differential revision: https://reviews.llvm.org/D39752


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318033 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 11:56:48 +00:00
Simon Dardis
ff80f7609d [CodeGenPrepare] Check that erased sunken address are not reused
CodeGenPrepare sinks address computations from one basic block to another
and attempts to reuse address computations that have already been sunk. If
the same address computation appears twice with the first instance as an
operand of a load whose result is an operand to a simplifable select,
CodeGenPrepare simplifies the select and recursively erases the now dead
instructions. CodeGenPrepare then attempts to use the erased address
computation for the second load.

Fix this by erasing the cached address value if it has zero uses before
looking for the address value in the sunken address map.

This partially resolves PR35209.

Thanks to Alexander Richardson for reporting the issue!

Reviewers: john.brawn

Differential Revision: https://reviews.llvm.org/D39841


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 11:47:21 +00:00
Florian Hahn
0b4ce86d63 [CodeExtractor] Add missing AllowVarArgs initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 11:08:47 +00:00
Florian Hahn
0e6bdca6cc [PartialInliner] Inline vararg functions that forward varargs.
Summary:
This patch extends the partial inliner to support inlining parts of
vararg functions, if the vararg handling is done in the outlined part.

It adds a `ForwardVarArgsTo` argument to InlineFunction. If it is
non-null, all varargs passed to the inlined function will be added to
all calls to `ForwardVarArgsTo`.

The partial inliner takes care to only pass `ForwardVarArgsTo` if the
varargs handing is done in the outlined function. It checks that vastart
is not part of the function to be inlined.

`test/Transforms/CodeExtractor/PartialInlineNoInline.ll` (already part
of the repo) checks we do not do partial inlining if vastart is used in
a basic block that will be inlined.

Reviewers: davide, davidxl, grosser

Reviewed By: davide, davidxl, grosser

Subscribers: gyiu, grosser, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D39607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 10:35:52 +00:00
Sander de Smalen
4aa7ca82da Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 09:57:20 +00:00
Jina Nahias
99449d9e38 [x86][AVX512] Lowering shuffle i/f intrinsics to LLVM IR
This patch, together with a matching clang patch (https://reviews.llvm.org/D38672), implements the lowering of X86 shuffle i/f intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D38671

Change-Id: I1e7d359a74743e995ec356237a85214ce55d3661

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 09:16:39 +00:00
Gadi Haber
d0b10f1627 [X86][SKX] Adding scheduling info of non-intrinsic + commutable SKX opcodes.
Updated the scheduling information of the SKX subtarget  in the file X86SchedSkylakeServer.td under lib/Target/X86 to:
1. add regular opcodes in addition to the suffixed "_Int" opcodes
2. add the (V)MAXCPD/MAXCPS/MAXCSD/MAXCSS/MINCPD/MINCPS/MINCSD/MINCSS
    instructions that are equivalent to their counterparts without the 'C' as they are part of a hack to
    make floating point min/max commutable under fast math.

Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D39833

Change-Id: Ie13702a5ce1b1a08af91ca637a52b6962881e7d6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 08:42:07 +00:00
Craig Topper
dbbb3a2b32 [X86] Limit NOPs to 7 bytes when 'slm' is spelled 'silvermont'.
We support 2 spelling for silvermont and we should accept both here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 08:17:30 +00:00
Craig Topper
15d3d0a9fd [X86] Use sse_load_f32/f64 to improve load folding of scalar vfscalefss/sd, vrcp14ss/sd, rsqrt14ss/sd instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318022 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 08:07:33 +00:00
Craig Topper
ad2cbf9b12 [X86] Regenerate test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 08:07:31 +00:00
Matt Arsenault
30cb4e2494 MI: Print ranges on MMO
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318020 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 07:09:20 +00:00
Craig Topper
b30ac7e518 [X86] Use sse_load_f32/f64 to improve load folding for scalar VFPCLASS intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 06:46:48 +00:00
Craig Topper
1d8fbacd7d [X86] Add tests for missed opportunities to fold a 128-bit vector load into vfpclassss and vpfpclasssd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318018 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 06:46:46 +00:00
Matt Arsenault
f5c667f88c AMDGPU: Preserve nuw in shl add ptr combine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 05:33:35 +00:00
Craig Topper
986f1e6c44 [X86] Fix SQRTSS/SQRTSD/RCPSS/RCPSD intrinsics to use sse_load_f32/sse_load_f64 to increase load folding opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318016 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 05:25:24 +00:00
Craig Topper
44ff104a6c [X86] Add tests for full vector loads to fold-load-unops.ll.
We should be able to fold a full vector load into a scalar intrinsic. Since it's legal to narrow a load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318015 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 05:25:23 +00:00
Craig Topper
0207b2e66b [X86] Regenerate fold-load-unops.ll and add and avx512f command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 05:25:21 +00:00
Matt Arsenault
3e3d015f52 AMDGPU: Fix multi-use shl/add combine
This was using a custom function that didn't handle the
addressing modes properly for private. Use
isLegalAddressingMode to avoid duplicating this.

Additionally, skip the combine if there is only one use
since the standard combine will handle it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318013 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 05:11:54 +00:00
Craig Topper
d024fd1406 [X86] Attempt to fix signed and unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 02:19:13 +00:00
Craig Topper
5f9380c926 [X86] Use sse_load_f32/f64 in patterns for the memory forms of VRNDSCALESS/SD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 02:03:01 +00:00
Craig Topper
e6cdd20402 [X86] Use EVEX encoded VRNDSCALE instructions to implement the legacy round intrinsics.
The VRNDSCALE instructions implement a superset of the (V)ROUND instructions. They are equivalent if the upper 4-bits of the immediate are 0.

This patch lowers the legacy intrinsics to the VRNDSCALE ISD node and masks the upper bits of the immediate to 0. This allows us to take advantage of the larger register encoding space.

We should maybe consider converting VRNDSCALE back to VROUND in the EVEX to VEX pass if the extended registers are not being used.

I notice some load folding opportunities being missed for the VRNDSCALESS/SD instructions that I'll try to fix in future patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 02:03:00 +00:00
Craig Topper
fa371074cb [X86] Split VRNDSCALE/VREDUCE/VGETMANT/VRANGE ISD nodes into versions with and without the rounding operand. NFCI
I want to reuse the VRNDSCALE node for the legacy SSE rounding intrinsics so that those intrinsics can use EVEX instructions. All of these nodes share tablegen multiclasses so I split them all so that they all remain similar in their implementations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 02:02:58 +00:00
Matt Arsenault
1cedae7c8d Fix some misc. -enable-var-scope violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-13 01:47:52 +00:00