Commit Graph

80521 Commits

Author SHA1 Message Date
Sanjay Patel
6b71bf10b6 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239532 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:26:49 +00:00
Aaron Ballman
89f93ead2a Fixing MSVC 2013 build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 13:06:02 +00:00
Toma Tabacu
f24e4e46cd Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
Apparently, Arcanist didn't include some of my local changes in my previous
commit attempt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:36:10 +00:00
Zoran Jovanovic
9d115effdf [mips][microMIPS] Implement ERET and ERETNC instructions
http://reviews.llvm.org/D10091


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:22:46 +00:00
Zoran Jovanovic
d09e8beec3 [mips] Change existing uimm10 operand to restrict the accepted immediates
http://reviews.llvm.org/D10312


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:51:58 +00:00
Hao Liu
7b35bb4e76 [LoopVectorize] Revert the enabling of interleaved memory access in Loop Vectorizor, which was wrongly committed in r239514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239515 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:18:07 +00:00
Hao Liu
442f620296 [AArch64] Match interleaved memory accesses into ldN/stN instructions.
Add a pass AArch64InterleavedAccess to identify and match interleaved memory accesses. This pass transforms an interleaved load/store into ldN/stN intrinsic. As Loop Vectorizor disables optimization on interleaved accesses by default, this optimization is also disabled by default. To enable it by "-aarch64-interleaved-access-opt=true"

E.g. Transform an interleaved load (Factor = 2):
       %wide.vec = load <8 x i32>, <8 x i32>* %ptr
       %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>  ; Extract even elements
       %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>  ; Extract odd elements
     Into:
       %ld2 = { <4 x i32>, <4 x i32> } call aarch64.neon.ld2(%ptr)
       %v0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0
       %v1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1

E.g. Transform an interleaved store (Factor = 2):
       %i.vec = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7>  ; Interleaved vec
       store <8 x i32> %i.vec, <8 x i32>* %ptr
     Into:
       %v0 = shuffle %i.vec, undef, <0, 1, 2, 3>
       %v1 = shuffle %i.vec, undef, <4, 5, 6, 7>
       call void aarch64.neon.st2(%v0, %v1, %ptr)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:05:02 +00:00
Arnaud A. de Grandmaison
3b8d35fb8d [LiveVariables] Improve isLiveOut runtime performances. NFC.
On large goto table based interpreters, where phi nodes can have (very) large
fan-ins, isLiveOut exhibited poor performances: about 40% of the full
codegen time was spent in PHIElim, sorting MachineBasicBlock addresses.

This patch improve the performances for such cases, and does not show
compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or
any other benchmarks we have in-house.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:50:21 +00:00
Simon Pilgrim
44226ffc19 [X86][SSE] Vectorized i8 and i16 shift operators
This patch ensures that SHL/SRL/SRA shifts for i8 and i16 vectors avoid scalarization. It builds on the existing i8 SHL vectorized implementation of moving the shift bits up to the sign bit position and separating the 4, 2 & 1 bit shifts with several improvements:

1 - SSE41 targets can use (v)pblendvb directly with the sign bit instead of performing a comparison to feed into a VSELECT node.
2 - pre-SSE41 targets were masking + comparing with an 0x80 constant - we avoid this by using the fact that a set sign bit means a negative integer which can be compared against zero to then feed into VSELECT, avoiding the need for a constant mask (zero generation is much cheaper).
3 - SRA i8 needs to be unpacked to the upper byte of a i16 so that the i16 psraw instruction can be correctly used for sign extension - we have to do more work than for SHL/SRL but perf tests indicate that this is still beneficial.

The i16 implementation is similar but simpler than for i8 - we have to do 8, 4, 2 & 1 bit shifts but less shift masking is involved. SSE41 use of (v)pblendvb requires that the i16 shift amount is splatted to both bytes however.

Tested on SSE2, SSE41 and AVX machines.

Differential Revision: http://reviews.llvm.org/D9474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:46:37 +00:00
Arnaud A. de Grandmaison
a2cdb8ca59 [PHIElim] Use ranges and const-ify, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:45:05 +00:00
Nemanja Ivanovic
f7d6501d1d LLVM support for vector quad bit permute and gather instructions through builtins
This patch corresponds to review:
http://reviews.llvm.org/D10096

This is the back end portion of the patch related to D10095.
The patch adds the instructions and back end intrinsics for:
vbpermq
vgbbd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 06:21:25 +00:00
Reid Kleckner
7963762fce Revert "Move dllimport name mangling to IR mangler."
This reverts commit r239437.

This broke clang-cl self-hosts. We'd end up calling the __imp_ symbol
directly instead of using it to do an indirect function call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 01:31:48 +00:00
Pete Cooper
5a118340dd Remove MachineModuleInfo::UsedFunctions as it has no users.
It hasn't been used since r130964.

This also removes MachineModuleInfo::isUsedFunction and
MachineModuleInfo::AnalyzeModule, both of which were only
there to support UsedFunctions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239501 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 01:04:56 +00:00
Sanjay Patel
e0d6eef952 change assert that will never fire to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 23:27:33 +00:00
Pete Cooper
ea423677ca Stop returning a Use* from allocHungOffUses.
This always just set the User::OperandList which is now set
in that method instead of being returned.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:46 +00:00
Pete Cooper
33102d2faa Add User::growHungoffUses and use it to grow the hung off uses. NFC.
PhiNode, SwitchInst, LandingPad and IndirectBr all had virtually identical
logic for growing the hung off uses.
Move it to User so that they can all call a single shared implementation.

Their destructors were all empty after this change and were deleted.  They all
have virtual clone_impl methods which can be used as vtable anchors.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239492 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:41 +00:00
Pete Cooper
0fa7dc6b36 Delete User::dropHungOffUses and move it in to ~User which is the only caller. NFC.
Now that the subclasses which care about hung off uses let ~User clean it up,
there's no need for a separate method.  Just inline it to ~User and delete it.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239491 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:38 +00:00
Pete Cooper
0aae8ce09f Make User track whether a class has 'hung off uses' and delete them in its destructor.
Currently all of the logic for deleting hung off uses, which PHI/switch/etc use,
is in their classes.

This adds a bit to Value which tracks whether that user had hung off uses,
then User can be responsible for clearing them instead of the sub classes.

Note, the bit used here was taken from NumOperands which was 30-bits.
Given the reduction to 29 bits, and the average User being just over 100 bytes,
a single User with 29-bits of num operands would need 50GB of RAM for itself
so its reasonable to assume that 29-bits is enough for now.

This is a step towards hiding all the hung off uses logic in the User.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239490 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:34 +00:00
Pete Cooper
e0e42bb51f Move the special Phi logic for hung off uses in to User::allocHungOffUses. NFC.
PhiNode's need to allocate space for an array of Use[N] and then BasicBlock*[N].

They had their own allocHungOffUses to handle all of this.  This moves the logic
in to User::allocHungOffUses and PhiNode passes in a bool to say to allocate
the BB* space too.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239489 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 22:38:30 +00:00
Peter Collingbourne
6e5bbb57e4 ArgumentPromotion: Drop sret attribute on functions that are only called directly.
If the first argument to a function is a 'this' argument and the second
has the sret attribute, the ArgumentPromotion pass may promote the 'this'
argument to more than one argument, violating the IR constraint that 'sret'
may only be applied to the first or second argument.

Although this IR constraint is arguably unnecessary, it highlighted the fact
that ArgPromotion does not need to preserve this attribute. Dropping the
attribute reduces register pressure in the backend by avoiding the register
copy required by sret. Because sret implies noalias, we also replace the
former with the latter.

Differential Revision: http://reviews.llvm.org/D10353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239488 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 21:14:34 +00:00
Sanjay Patel
c826b54b52 [x86] Add a reassociation optimization to increase ILP via the MachineCombiner pass
This is a reimplementation of D9780 at the machine instruction level rather than the DAG.

Use the MachineCombiner pass to reassociate scalar single-precision AVX additions (just a
starting point; see the TODO comments) to increase ILP when it's safe to do so.

The code is closely based on the existing MachineCombiner optimization that is implemented
for AArch64.

This patch should not cause the kind of spilling tragedy that led to the reversion of r236031.

Differential Revision: http://reviews.llvm.org/D10321



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 20:32:21 +00:00
Sanjay Patel
bb79423d0f punctuation policing; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 19:52:58 +00:00
Reid Kleckner
3de99b70aa [WinEH] _except_handlerN uses 0 instead of 1 to indicate catch-all
Our usage of 1 was a holdover from __C_specific_handler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 18:14:07 +00:00
Teresa Johnson
b78ea510c1 Add new EliminateAvailableExternally module pass, which is performed in
O2 compiles just before GlobalDCE, unless we are preparing for LTO.

This pass eliminates available externally globals (turning them into
declarations), regardless of whether they are dead/unreferenced, since
we are guaranteed to have a copy available elsewhere at link time.
This enables additional opportunities for GlobalDCE.

If we are preparing for LTO (e.g. a -flto -c compile), the pass is not
included as we want to preserve available externally functions for possible
link time inlining. The FE indicates whether we are doing an -flto compile
via the new PrepareForLTO flag on the PassManagerBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:49:28 +00:00
Alexey Samsonov
881c8e0c9a [GVN] Set proper debug locations for some instructions created by GVN.
Determining proper debug locations for instructions created in
PHITransAddr is tricky. We use a simple approach here and simply copy
debug locations from instructions computing load address to
"corresponding" instructions re-creating the address computation
in predecessor basic blocks.

This may not always be correct, given all the rearrangement and
simplification going on, and debug locations may jump around a lot,
as the basic blocks we copy locations between may be very far from
each other.

Still, this would work good in most simple cases (e.g. when chain
of address computing instruction is short, or our mapping turns out
to be 1-to-1), and we desire to have *some* reasonable debug locations
associated with newly inserted instructions.

See http://reviews.llvm.org/D10351 review thread for more details.

Test Plan: regression test suite

Reviewers: spatel, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10351

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:37:38 +00:00
Sanjay Patel
708de57fee fix typo in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239478 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:08:12 +00:00
Colin LeMahieu
c196bfecd6 [Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239477 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 16:52:32 +00:00
Benjamin Kramer
d5254aba82 [Hexagon] Make global arrays 'static const'. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 14:43:59 +00:00
Igor Laevsky
544d686bc0 [StatepointLowering] Reuse stack slots across basic blocks
During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint.
We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block.

But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries.

Differential Revision: http://reviews.llvm.org/D10251



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 12:31:53 +00:00
Daniel Sanders
4d13f315d1 Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rafael

Reviewed By: rafael

Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10311


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239467 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 12:11:26 +00:00
Daniel Sanders
fff114c890 Replace string GNU Triples with llvm::Triple in create*MCRelocationInfo(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10307


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 10:54:40 +00:00
Daniel Sanders
03c060b6d4 Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and create*AsmBackend(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: echristo, rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239464 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 10:35:34 +00:00
Elena Demikhovsky
189930760d AVX-512: Fixed a bug in comparison of i1 vectors.
cmp eq should give kxnor instruction
cmp neq should give kxor 

https://llvm.org/bugs/show_bug.cgi?id=23631



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 06:49:28 +00:00
Alexei Starovoitov
e11157c668 fix crash
fix segfault by checking for UnknownArch, since
getArchTypePrefix() will return nullptr for UnknownArch.

This fixes regression caused by r238424.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 03:06:06 +00:00
Craig Topper
f095095d4a Remove unnecessary conversion from StringRef to std::string and back to StringRef. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239455 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 02:07:37 +00:00
Reid Kleckner
839f83e1e3 [WinEH] Call llvm.stackrestore in __except blocks
We have to do this manually, the runtime only sets up ebp. Fixes a crash
when returning after catching an exception.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239451 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 01:34:54 +00:00
Reid Kleckner
6d7e69b227 Remove safeseh debug print and remove extra braces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 01:13:44 +00:00
Reid Kleckner
c8e72e9126 [WinEH] Emit .safeseh directives for all 32-bit exception handlers
Use a "safeseh" string attribute to do this. You would think we chould
just accumulate the set of personalities like we do on dwarf, but this
fails to account for the LSDA-loading thunks we use for
__CxxFrameHandler3. Each of those needs to make it into .sxdata as well.
The string attribute seemed like the most straightforward approach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239448 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 01:02:30 +00:00
Reid Kleckner
a8c0a9b042 Fix -Wsign-compare warning in WinException.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239445 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 00:04:53 +00:00
Pete Cooper
be1349596d Fix warning of comparing different enums. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 23:33:35 +00:00
Pete Cooper
dbb0802eb6 Revert "Move MCSymbol Value in to the union of Offset and CommonSize."
This reverts commit 2e449ec5bcdf67b52b315b16c2128aaf25d5b73c.

This was svn r239440.  Its currently failing an ARM test so reverting while I work out
what to do next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239441 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:35:55 +00:00
Pete Cooper
c11f1d8ae8 Move MCSymbol Value in to the union of Offset and CommonSize.
It wasn't possible to have a variable Symbol with offset or 'isCommon' so
this just enables better packing of the MCSymbol class.

Reviewed by Rafael Espindola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239440 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:21:37 +00:00
Tobias Edler von Koch
cbe2100f7e [RegisterScavenger] Fix handling of predicated instructions
Summary:
The RegisterScavenger explicitly ignores <kill> flags on operands of
predicated instructions and therefore assumes that such registers remain
live. When it then scavenges such a register, it inserts a spill of this
(killed) register. This is invalid code and gets flagged up by the 
verifier.

Nowadays kill flags are set correctly on predicated instructions. This
patch makes the Scavenger respect them.

The bug has so far only been triggered by an internal pass, so I don't
have a test case unfortunately.

Fixes PR23119.

Reviewers: hfinkel, tobiasvk_caf

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239439 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:10:58 +00:00
Alexey Samsonov
8478c82b28 [BasicBlockUtils] Set debug locations for instructions created in SplitBlockPredecessors.
Test Plan: regression test suite

Reviewers: eugenis, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10343

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239438 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:10:29 +00:00
Peter Collingbourne
12f81b4639 Move dllimport name mangling to IR mangler.
This ensures that LTO clients see the correct external symbol name.

Differential Revision: http://reviews.llvm.org/D10318

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239437 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:09:53 +00:00
Jingyue Wu
95355e6498 [NVPTX] fix a crash bug in NVPTXFavorNonGenericAddrSpaces
Summary:
We used to assume V->RAUW only modifies the operand list of V's user.
However, if V and V's user are Constants, RAUW may replace and invalidate V's
user entirely.

This patch fixes the above issue by letting the caller replace the
operand instead of calling RAUW on Constants.

Test Plan: @nested_const_expr and @rauw in access-non-generic.ll

Reviewers: broune, jholewinski

Reviewed By: broune, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 21:50:32 +00:00
Peter Collingbourne
1d815cac84 LibDriver, llvm-lib: introduce.
llvm-lib is intended to be a lib.exe compatible utility that also
understands bitcode. The implementation lives in a library so that
lld can use it to implement /lib.

Differential Revision: http://reviews.llvm.org/D10297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239434 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 21:50:22 +00:00
Reid Kleckner
bdcbc426af [WinEH] Add 32-bit SEH state table emission prototype
This gets all the handler info through to the asm printer and we can
look at the .xdata tables now. I've convinced one small catch-all test
case to work, but other than that, it would be a stretch to say this is
functional.

The state numbering algorithm avoids doing any scope reconstruction as
we do for C++ to simplify the implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 21:42:19 +00:00
Chad Rosier
e2e26b486d [AArch64] Remove an overly conservative check when generating store pairs.
Store instructions do not modify register values and therefore it's safe
to form a store pair even if the source register has been read in between
the two store instructions.

Previously, the read of w1 (see below) prevented the formation of a stp.

        str      w0, [x2]
        ldr     w8, [x2, #8]
        add      w0, w8, w1
        str     w1, [x2, #4]
        ret

We now generate the following code.

        stp      w0, w1, [x2]
        ldr     w8, [x2, #8]
        add      w0, w8, w1
        ret

All correctness tests with -Ofast on A57 with Spec200x and EEMBC pass.
Performance results for SPEC2K were within noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239432 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 20:59:41 +00:00
Pete Cooper
a96fc7ab00 Use AlignOf traits to enable static_assert.
This is better than runtime asserts.  Thanks to David Blaikie for the help here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239431 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 20:58:03 +00:00
Benjamin Kramer
ea8e85d925 Replace loop with std::equal. NFC intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239430 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 20:41:21 +00:00
Pete Cooper
38f72d04ea Reduce duplication in MCSymbol Name handling. NFC>
Based on feedback to r239428 by David Blaikie, use const_cast to reduce
duplication of the const and non-const versions of getNameEntryPtr.

Also have that method return the pointer to the name directly instead
of users having to then get the name from the union.

Finally, add a FIXME that we should use a static_assert once available in
the new operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 20:41:08 +00:00
Pete Cooper
5c8a22f11b Make MCSymbol::Name be a union of uint64_t and a pointer.
This should hopefully fix the 32-bit bots which were allocating space for a pointer
but needed to be aligned to 64-bits.

Now we allocate enough space for a uint64_t and a pointer and cast to the appropriate storage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239428 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 19:56:05 +00:00
Akira Hatanaka
0e3246a86f Remove DisableTailCalls from TargetOptions and the code in resetTargetOptions
that was resetting it.

Remove the uses of DisableTailCalls in subclasses of TargetLowering and use
the value of function attribute "disable-tail-calls" instead. Also,
unconditionally add pass TailCallElim to the pipeline and check the function
attribute at the start of runOnFunction to disable the pass on a per-function
basis. 
 
This is part of the work to remove TargetMachine::resetTargetOptions, and since
DisableTailCalls was the last non-fast-math option that was being reset in that
function, we should be able to remove the function entirely after the work to
propagate IR-level fast-math flags to DAG nodes is completed.

Out-of-tree users should remove the uses of DisableTailCalls and make changes
to attach attribute "disable-tail-calls"="true" or "false" to the functions in
the IR.

rdar://problem/13752163

Differential Revision: http://reviews.llvm.org/D10099


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 19:07:19 +00:00
Pete Cooper
7178ff1974 Change from alignof to llvm::alignOf to appease Visual Studio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239424 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 18:50:18 +00:00
Pete Cooper
79e04c5844 Allocate space for MCSymbol::Name only if required.
Similarly to User which allocates a number of Use's prior to the this pointer,
allocate space for the Name* for MCSymbol only when we need a name.

Given that an MCSymbol is 48-bytes on 64-bit systems, this saves a decent % of space.

Given the verify_uselistorder test case with debug info and llc, 50k symbols have names
out of 700k so this optimises for the common case of temporary unnamed symbols.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 18:36:13 +00:00
Arnold Schwaighofer
92a42eead2 MergeFunctions: Don't replace a weak function use by another equivalent weak function
We don't know whether the weak functions definition is the definitive definition.

rdar://21303727

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 18:19:17 +00:00
David Blaikie
6eee2375d9 Revert "[DWARF] Fix a few corner cases in expression emission"
This reverts commit r239380 due to apparently GDB regressions:
http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/22562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239420 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 18:01:51 +00:00
Samuel Antao
8e8c4b5615 The constant initialization for globals in NVPTX is generated as an
array of bytes. The generation of this byte arrays was expecting 
the host to be little endian, which prevents big endian hosts to be 
used in the generation of the PTX code. This patch fixes the 
problem by changing the way the bytes are extracted so that it 
works for either little and big endian.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239412 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 16:29:34 +00:00
Eli Bendersky
a0c9e11a2b Add more wrappers for symbol APIs to the C API.
This represents some of the functionality we expose in the llvmlite Python
binding.

Patch by Antoine Pitrou

Differential Revision: http://reviews.llvm.org/D10222


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 15:57:30 +00:00
Rui Ueyama
eae4673c2f Remove object_error::success and use std::error_code() instead
make_error_code(object_error) is slow because object::object_category()
uses a ManagedStatic variable. But the real problem is that the function is
called too frequently. This patch uses std::error_code() instead of
object_error::success. In most cases, we return "success", so this patch
reduces number of function calls to that function.

http://reviews.llvm.org/D10333



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239409 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 15:20:42 +00:00
Toma Tabacu
c154887856 Recommit "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).
Specified the llvm namespace for the 2 calls to make_unique() which caused
compilation errors in Visual Studio 2013.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 13:33:26 +00:00
Elena Demikhovsky
22debdcab6 X86-MPX: Implemented encoding for MPX instructions.
Added encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239403 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 13:02:10 +00:00
Aaron Ballman
ff7ef6c5c9 Removing spurious semi colons; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 12:03:46 +00:00
Toma Tabacu
695a997ef2 Revert "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
It was breaking buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239397 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 10:43:49 +00:00
Toma Tabacu
dc2af2605f [mips] [IAS] Add support for BNE and BEQ with an immediate operand.
Summary:
For some branches, GAS accepts an immediate instead of the 2nd register operand.
We only implement this for BNE and BEQ for now. Other branch instructions can be added later, if needed.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D9666

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 10:34:31 +00:00
Daniel Sanders
4b0e9f114c [nvptx] Only support the 'm' inline assembly memory constraint. NFC.
Summary:
NVPTX doesn't seem to support any additional constraints. Therefore remove
the target hook.

No functional change intended.

Reviewers: jholewinski

Reviewed By: jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 10:34:05 +00:00
Daniel Sanders
07ce69ae7d [ADT] Assert that SmallVectorBase::grow_pod() successfully reallocates memory.
Summary:
If malloc/realloc fails then the SmallVector becomes unusable since begin() and
end() will return NULL. This is unlikely to occur but was the cause of recent
bugpoint test failures on my machine.

It is not clear whether not checking for malloc/realloc failure is a deliberate
decision and adding checks has the potential to impact compiler performance.
Therefore, this patch only adds the check to builds with assertions enabled for
the moment.

Reviewers: bkramer

Reviewed By: bkramer

Subscribers: bkramer, llvm-commits

Differential Revision: http://reviews.llvm.org/D9520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239392 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 09:47:46 +00:00
Denis Protivensky
6f9520411c MergeFunctions: Fix gcc warning in condition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 09:28:37 +00:00
Keno Fischer
b4863a99c9 [DWARF] Fix a few corner cases in expression emission
Summary: I noticed an object file with `DW_OP_reg4 DW_OP_breg4 0` as a DWARF expression,
which I traced to a missing break (and `++I`) in this code snippet.
While I was at it, I also added support for a few other corner cases
along the same lines that I could think of.

Test Plan: Hand-crafted test case to exercises these cases is included.

Reviewers: echristo, dblaikie, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 01:53:59 +00:00
Anna Zaks
cfd8f11d48 [asan] Prevent __attribute__((annotate)) triggering errors on Darwin
The following code triggers a fatal error in the compiler instrumentation
of ASan on Darwin because we place the attribute into llvm.metadata section,
which does not have the proper MachO section name.

void foo() __attribute__((annotate("custom")));
void foo() {;}

This commit reorders the checks so that we skip everything in llvm.metadata
first. It also removes the hard failure in case the section name does not
parse. That check will be done lower in the compilation pipeline anyway.

(Reviewed in http://reviews.llvm.org/D9093.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:58:08 +00:00
Matt Arsenault
d2f17c4e2b Implement computeKnownBits for min/max nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:41 +00:00
Matt Arsenault
0f59d850fa R600: Switch to using generic min / max nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:37 +00:00
Matt Arsenault
d99ce2f630 MC: Add target hook to control symbol quoting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:31:39 +00:00
Arnold Schwaighofer
d386615ed3 Fix unused variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:17:40 +00:00
Jingyue Wu
4e04297ac3 [NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces
Summary:
This cleans up most allocas NVPTXLowerKernelArgs emits for byval
parameters.

Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store.

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239368 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:05:56 +00:00
Arnold Schwaighofer
04ed4447ee MergeFunctions: Impose a total order on the replacement of functions
We don't want to replace function A by Function B in one module and Function B
by Function A in another module.

If these functions are marked with linkonce_odr we would end up with a function
stub calling B in one module and a function stub calling A in another module. If
the linker decides to pick these two we will have two stubs calling each other.

rdar://21265586

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:03:29 +00:00
Reid Kleckner
38a2b24c12 [WinEH] Cache declarations of frame intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 22:43:32 +00:00
Reid Kleckner
b65591326e Fix clang-cl self-host -Wc++11-narrowing bug
Use unsigned as the underlying storage type of the AMDGPU address space
enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:57:57 +00:00
Ranjeet Singh
1666977cd0 [AArch64] AsmParser should be case insensitive about accepting vector register names.
Differential Revision: http://reviews.llvm.org/D10320


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:32:16 +00:00
Keno Fischer
4332f869bf [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:09:58 +00:00
Benjamin Kramer
9ebaf8ce67 Prefer copy init over direct init. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:58:57 +00:00
Akira Hatanaka
fa6bc2e94d [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:50:43 +00:00
Pete Cooper
d354befbbb Use a PointerUnion in MCSymbol for Section and Fragment. NFC.
The Fragment and Section, and a bool for HasFragment were all used to create
a PointerUnion.  Just use a pointer union instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:41:57 +00:00
Pete Cooper
e2101ba7b5 Remove includes of MCMachOSymbolFlags.h after it was deleted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:25:57 +00:00
Pete Cooper
d3869ee8d2 Move all flags logic to MCSymbolMachO.
Also delete the now unused MCMachOSymbolFlags.h header as the only enum in there was moved to MCSymbolMachO.

Similarly to ELF and COFF, manipulating the flags is now done via helpers instead of spread
throughout the codebase.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239316 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:28 +00:00
Pete Cooper
cae8bc4504 Add MCSymbolMachO which will be used to hide the MCSymbolMachO flags.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:23 +00:00
Pete Cooper
e25e889c7c Move all of the MCSymbol COFF flags logic in to MCSymbolCOFF.
All flags setting/getting is now done in the class with helper methods instead
of users having to get the bits in the correct order.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:19 +00:00
Pete Cooper
f560b88d7c Add MCSymbolCOFF class and use it to get and set the COFF type field.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:12 +00:00
Pete Cooper
62f764a6c9 Change MCSymbol IsELF to an enum to support future MCSymbolCOFF and MCSymbolMachO.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:09 +00:00
Matthias Braun
b0d6c659b7 X86: Reject register operands with obvious type mismatches.
While we have some code to transform specification like {ax} into
{eax}/{rax} if the operand type isn't 16bit, we should reject cases
where there is no sane way to do this, like the i128 type in the
example.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:56:23 +00:00
Oliver Stannard
7c40b1a7bc Fix assertion failure in global-merge with unused ConstantExpr
The global-merge pass was crashing because it assumes that all ConstantExprs
(reached via the global variables that they use) have at least one user.

I haven't worked out a way to test this, as an unused ConstantExpr cannot be
represented by serialised IR, and global-merge can only be run in llc, which
does not run any passes which can make a ConstantExpr dead.

This (reduced to the point of silliness) C code triggers this bug when compiled
for arm-none-eabi at -O1:

  static a = 7;
  static volatile b[10] = {&a};

  c;
  main() {
    c = 0;
    for (; c < 10;)
      printf(b[c]);
  }

Differential Revision: http://reviews.llvm.org/D10314



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:55:31 +00:00
Colin LeMahieu
838271c858 [Hexagon] Adding functionality for searching for compound instruction pairs. Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:34:47 +00:00
Simon Pilgrim
298222a930 [DAGCombiner] Added CTLZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:19:00 +00:00
Javed Absar
d48ce2c34f ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 15:01:11 +00:00
Petar Jovanovic
f8aad6c1ef [Mips64][mcjit] Add R_MIPS_PC32 relocation
This patch adds R_MIPS_PC32 relocation for Mips64.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10235


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:10:23 +00:00
Igor Breger
17e24879cb AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:03:17 +00:00
Artur Pilipenko
1328b67dd1 Minor refactoring of GEP handling in isDereferenceablePointer
For GEP instructions isDereferenceablePointer checks that all indices are constant and within bounds. Replace this index calculation logic to a call to accumulateConstantOffset. Separated from the http://reviews.llvm.org/D9791

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D9874


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239299 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 11:58:13 +00:00
Silviu Baranga
a420a14276 [LAA] Fix estimation of number of memchecks
Summary:
We need to add a runtime memcheck for pair of accesses (x,y) where at least one of x and y
are writes.
 
Assuming we have w writes and r reads, currently this number is  estimated as being
w* (w+r-1). This estimation will count (write,write) pairs twice and will overestimate
the number of checks required.

This change adds a getNumberOfChecks method to RuntimePointerCheck, which
will count the number of runtime checks needed (similar in implementation to
needsAnyChecking) and uses it to produce the correct number of runtime checks.

Test Plan:
llvm test suite
spec2k
spec2k6

Performance results: no changes observed (not surprising since the formula for 1 writer is basically the same, which would covers most cases - at least with the current check limit).

Reviewers: anemet

Reviewed By: anemet

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D10217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 10:27:06 +00:00
Simon Pilgrim
d72b357107 [DAGCombiner] Added CTTZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 09:57:09 +00:00