Evan Cheng
d457e6e9a5
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
...
except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Evan Cheng
b9803a8fa6
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
...
load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362
Honour subreg machine operands during asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
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will not accept negative values for these. LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates. Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Bob Wilson
d51722a7e3
Fix a broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:06:42 +00:00
Evan Cheng
e7e0d62efd
Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Eric Christopher
ef1fad533e
Fix PR5315, original patch by Nicolas Capens!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:11:57 +00:00
Dan Gohman
3f131328ff
Update these tests for the new label names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 23:31:40 +00:00
Bob Wilson
5a225cc85a
Add -mtriple to llc commands, attempting to fix buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:51:31 +00:00
Bob Wilson
8a008cc49d
Attempt again to fix buildbot failures: make expected output less specific
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and compile with -mtriple to specify *-apple-darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:30:35 +00:00
Bob Wilson
3d90dbee69
Add PowerPC codegen for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 21:31:18 +00:00
Bob Wilson
1709dd73d6
Fix broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 20:04:11 +00:00
Bob Wilson
0d48d6106e
Add test for ARM indirectbr codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 19:25:34 +00:00
Evan Cheng
50608bac2f
RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
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and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 08:33:14 +00:00
Evan Cheng
ad95ff9fab
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:42:33 +00:00
Evan Cheng
b23b2015eb
fconsts / fconstd immediate should be proceeded with #.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:59:33 +00:00
Evan Cheng
777c6b7caa
Re-apply 85799. It turns out my code isn't buggy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:40:02 +00:00
Kenneth Uildriks
b908f8ad6a
Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 15:29:06 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Nate Begeman
e4a9f9c450
Declare sin & cos as readonly so they match the code in SelectionDAGBuild
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85853 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 02:19:31 +00:00
Anton Korobeynikov
7b360e7f29
Temporary xfail until PR5367 will be resolved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:37:36 +00:00
Anton Korobeynikov
ab453e0641
Revert r85049, it is causing PR5367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:24:48 +00:00
Evan Cheng
454ac8961b
Revert 85799 for now. It might be breaking llvm-gcc driver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 21:49:14 +00:00
Evan Cheng
72ed88feac
Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
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the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 08:09:49 +00:00
Evan Cheng
580e791ded
Remove an irrelevant and poorly reduced test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:11:54 +00:00
Evan Cheng
7baae87d8f
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:12:06 +00:00
Anton Korobeynikov
2e1da9fea4
64-bit FP loads & stores operate on both NEON and VFP pipelines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:06 +00:00
Evan Cheng
48d8afab73
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 21:12:51 +00:00
Evan Cheng
1107f03ef4
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 18:13:29 +00:00
Chris Lattner
43f44aa160
improve x86 codegen support for blockaddress. We now compile
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the testcase into:
_test1: ## @test1
## BB#0: ## %entry
leaq L_test1_bb6(%rip), %rax
jmpq *%rax
L_test1_bb: ## Address Taken
LBB1_1: ## %bb
movb $1, %al
ret
L_test1_bb6: ## Address Taken
LBB1_2: ## %bb6
movb $2, %al
ret
Note, it is very very strange that BlockAddressSDNode doesn't carry
around TargetFlags. Dan, please fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 03:25:03 +00:00
Evan Cheng
de17fb6e4d
Use cbz and cbnz instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 23:46:45 +00:00
Jim Grosbach
8cd0a8cb82
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:57:36 +00:00
Jim Grosbach
1820ec5e7a
Consolidate test files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:20:56 +00:00
Jim Grosbach
91c0aebe68
Change to use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:16:14 +00:00
Jim Grosbach
0e5c9beeed
Make tests more explicit about which instructions are expected.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:14:17 +00:00
Jim Grosbach
6b0b4b3eaf
Grammar tweak to comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:12:44 +00:00
Jim Grosbach
199a4b4c70
Update test to be more explicit about what instruction sequences are expected for each operation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:10:38 +00:00
Jim Grosbach
07d236ba88
Update test to be more explicit about what instruction sequences are expected for each operation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85689 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:52:58 +00:00
Jim Grosbach
bcf2f2c159
Expand 64-bit logical shift right inline
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:42:19 +00:00
Jim Grosbach
b4a976c304
Expand 64-bit arithmetic shift right inline
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85685 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 21:00:56 +00:00
Benjamin Kramer
e3246fc6ab
Force triple; darwin's ASM syntax differs from linux's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:54:06 +00:00
Jim Grosbach
c2b879fcfe
Expand 64 bit left shift inline rather than using the libcall. For now, this
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is unconditional. Making it still use the libcall when optimizing for size
would be a good adjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85675 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:38:01 +00:00
Benjamin Kramer
823bdbc770
Add missing colons for FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85674 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:22:24 +00:00
Jim Grosbach
4a26092248
Convert to FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 19:06:53 +00:00
Evan Cheng
9eda68988e
It's safe to remat t2LDRpci; Add PseudoSourceValue to load / store's to enable more machine licm. More changes coming.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85643 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 03:39:36 +00:00
Dan Gohman
c933acf096
Add a target triple so that this test behaves consistently across hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 00:15:28 +00:00
Dan Gohman
0437a06ea6
Fix the -mattr line for this test so that it passes on hosts that lack SSSE3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85637 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 23:18:27 +00:00
Dan Gohman
0115e164ba
Fix MachineLICM to use the correct virtual register class when
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unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 22:18:41 +00:00
Evan Cheng
3efabd316f
I forgot to commit this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 20:03:40 +00:00
Rafael Espindola
c1382b745f
This fixes functions like
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void f (int a1, int a2, int a3, int a4, int a5,...)
In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 14:33:14 +00:00
Bob Wilson
2c04dae715
Reimplement BranchFolding change to avoid tail merging for a 1 instruction
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common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85441 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 22:10:20 +00:00
Dan Gohman
589f1f5a43
Teach MachineLICM to unfold loads from constant memory from
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otherwise unhoistable instructions in order to allow the loads
to be hoisted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 03:21:57 +00:00
Evan Cheng
39382427f1
Use fconsts and fconstd to materialize small fp constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:44:26 +00:00
Dan Gohman
a104d1eab2
Mark dead physregdefs dead immediately. This helps MachineSink and
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MachineLICM and other things which run before LiveVariables is run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:13:53 +00:00
Dan Gohman
83f6120c9a
Allow constants of different types to share constant pool entries
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if they have compatible encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85359 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:12:16 +00:00
Rafael Espindola
2bda533e1c
Add missing testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 17:59:03 +00:00
Bob Wilson
37986053b4
Fix Thumb2 failures by converting them to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 06:31:02 +00:00
Bob Wilson
b9350315d2
Fix the rest of the ARM failures by converting them to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85208 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 06:16:45 +00:00
Bob Wilson
13e80bdb71
Fix some more failures by converting to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85207 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 05:50:28 +00:00
Bob Wilson
8bb080e71b
Convert to FileCheck, fixing failure due to tab change in the process.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 05:30:47 +00:00
David Goodwin
2e7be612d5
Break anti-dependence breaking out into its own class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 16:59:04 +00:00
Dan Gohman
a8225083ba
Make LSR's OptimizeShadowIV ignore induction variables with negative
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strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.
This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 15:32:57 +00:00
Evan Cheng
a5dc45e3c8
- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
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bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 04:56:07 +00:00
Chris Lattner
1d871c5e54
fix PR5295 where the .ll parser didn't reject a function after a global
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or global after a function with conflicting names. Update some testcases
that were accidentally depending on this behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 23:22:50 +00:00
Evan Cheng
21a45557c6
Add a couple of ARM cross-rc coalescing tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 08:01:41 +00:00
Evan Cheng
cc7a5b91de
Update tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 07:53:48 +00:00
Dan Gohman
7abbd04e90
APInt-ify the gep scaling code, so that it correctly handles the case where
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the scale overflows pointer-sized arithmetic. This fixes PR5281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 17:57:43 +00:00
Evan Cheng
b6c215b63f
Update tests for 84931.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84932 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 05:58:34 +00:00
David Goodwin
4c3715c2e5
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 23:19:17 +00:00
Bob Wilson
bac6ed4ba4
Revert 84843. Evan, this was breaking some of the if-conversion tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 16:52:21 +00:00
Evan Cheng
87689d3b70
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 06:48:32 +00:00
Evan Cheng
8000c6c535
Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:40:00 +00:00
Anton Korobeynikov
f32df4ce3e
Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.
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Yay for ASCII graphics!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:16:00 +00:00
Dan Gohman
6d31268a7d
Revert the main portion of r31856. It was causing BranchFolding
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to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.
This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:03:58 +00:00
Jim Grosbach
65b7f3af76
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
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immediate operands when they will fit into the using instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 20:44:34 +00:00
Anton Korobeynikov
a91f4c561e
Add DAG printing for RMW stuff debugging
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:18:28 +00:00
Anton Korobeynikov
83fceb9481
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:17:55 +00:00
Evan Cheng
2095659a85
Match more patterns to movt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 08:15:52 +00:00
Dan Gohman
c1ae8c9b8f
Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 01:44:44 +00:00
Anton Korobeynikov
a3da7c3ca8
Add reg-imm tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:11:44 +00:00
Anton Korobeynikov
2bcf60a9cc
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
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transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 21:37:45 +00:00
David Goodwin
480c529e02
Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 19:54:44 +00:00
Dan Gohman
1a49295eae
Make TranslateX86CC return COND_INVALID instead of aborting when it
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encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 16:22:37 +00:00
Dan Gohman
07adb85cb7
Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are
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tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:50:37 +00:00
Evan Cheng
0222a8cfb8
If the physical register being spilled does not have an interval, spill its sub-registers instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:31:09 +00:00
Jim Grosbach
6009751244
Enable allocation of R3 in Thumb1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:57:03 +00:00
Chris Lattner
7bf4bc5a1d
convert to filecheck syntax and make a lot more aggressive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:27:56 +00:00
Anton Korobeynikov
766fc1db16
Revert r84295, this unbreaks llvm-gcc bootstrap on x86-64/linux
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:21:09 +00:00
Chris Lattner
baa989ed6e
rename test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84515 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 18:18:07 +00:00
Torok Edwin
6602922878
Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS.
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LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 11:00:58 +00:00
Daniel Dunbar
068c56e0d7
Teach lit that the .c files in 'test/CodeGen/CellSPU/useful-harnesses' aren't tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 03:53:55 +00:00
Nate Begeman
a09008bf6d
Add support for matching shuffle patterns with palignr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 02:17:23 +00:00
Evan Cheng
d36076e4a3
Turn on post-alloc scheduling for x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-18 19:57:27 +00:00
Dan Gohman
3bdd8de280
Enhance CodePlacementOpt's unconditional intra-loop branch elimination logic
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to be more general and understand more varieties of loops.
Teach CodePlacementOpt to reorganize the basic blocks of a loop so that
they are contiguous. This also includes a fair amount of logic for preserving
fall-through edges while doing so. This fixes a BranchFolding-ism where blocks
which can't be made to use a fall-through edge and don't conveniently fit
anywhere nearby get tossed out to the end of the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17 00:32:43 +00:00
Mon P Wang
362b8f2786
Update tests to use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 22:09:05 +00:00
Mon P Wang
70bf40d02e
Add test case for r84279
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84280 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 22:07:19 +00:00
Dan Gohman
b00f236b03
Move zext and sext casts fed by loads into the same block as the
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load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84271 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 20:59:35 +00:00
Evan Cheng
d3dd50fec0
Enable post-alloc scheduling for all ARM variants except for Thumb1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84249 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 06:11:08 +00:00