Commit Graph

90172 Commits

Author SHA1 Message Date
Christian Konig
4cce3d02a0 R600/SI: remove SI_vs_load_buffer_index
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:04:04 +00:00
Christian Konig
ff408c0728 R600/SI: remove SGPR address space v2
v2: fix R600 regressions

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176624 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:59 +00:00
Christian Konig
90c64cbaa1 R600/SI: add proper formal parameter handling for SI
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176623 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:52 +00:00
Christian Konig
c3c169c884 R600/SI: remove shader type intrinsic
Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176622 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:46 +00:00
Christian Konig
204a2d32ba R600/SI: switch types of SGPRs to v*i8
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:38 +00:00
Christian Konig
5e8833646d R600/SI: fix unused variable warning
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176620 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:30 +00:00
Nick Lewycky
d9686a98b8 Switch from a version 4.2/4.4 switch to a four-byte version string to be put
into the actual gcov file.

Instead of using the bottom 4 bytes as the function identifier, use a counter.
This makes the identifier numbers stable across multiple runs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 08:28:49 +00:00
Nadav Rotem
4d895455fe No need to go through int64 and APInt when generating a new constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 06:34:49 +00:00
Jim Grosbach
34fd0d2b93 SDAG: Handle scalarizing an extend of a <1 x iN> vector.
Just scalarize the element and rebuild a vector of the result type
from that.

rdar://13281568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 05:47:54 +00:00
Nick Lewycky
218042a023 Remove GCDAProfiling.c. This copy is old, the copy in compiler-rt is newer and
is the one that should be used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 02:03:08 +00:00
Manman Ren
3de61b4c01 Debug Info: store the files and directories for each compile unit.
We now emit a line table for each compile unit. To reduce the prologue size
of each line table, the files and directories used by each compile unit are
stored in std::map<unsigned, std::vector< > > instead of std::vector< >.

The prologue for a lto'ed image can be as big as 93K. Duplicating 93K for each
compile unit causes a huge increase of debug info. With this patch, each
prologue will only emit the files required by the compile unit.

rdar://problem/13342023


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176605 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:42:00 +00:00
Nadav Rotem
55d8f6d490 ArrayRef has a OneElt constructor. Beautify the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:38:04 +00:00
Nadav Rotem
82e905aae4 Switch from std::vector to ArrayRef. Speedup FoldBitCast by 5x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176602 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:30:40 +00:00
Andrew Trick
119003f2a2 SimplifyCFG fix for volatile load/store.
Fixes rdar:13349374.

Volatile loads and stores need to be preserved even if the language
standard says they are undefined. "volatile" in this context means "get
out of the way compiler, let my platform handle it".

Additionally, this is the only way I know of with llvm to write to the
first page (when hardware allows) without dropping to assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176599 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:03:35 +00:00
Michael Liao
fe9dbe0066 Fix two remaining issue after fixing PR15355 when CMOV is not available
- Phi nodes should be replaced/updated after lowering CMOV into branch
  because 'mainMBB' updating operand in Phi node is changed.
- Add EFLAGS in livein before lowering the 2nd CMOV. It's necessary as
  we will reuse the EFLAGS generated before the 1st lowered CMOV, which
  won't clobber EFLAGS. However, we need explicitly specify that.
- '-attr=-cmov' test case are added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 01:01:29 +00:00
Akira Hatanaka
b7656a9cc4 [mips] Custom-legalize BR_JT.
In N64-static, GOT address is needed to compute the branch address.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 21:32:03 +00:00
Andrew Trick
76c25dc2bf Generalize my previous fix for -print-options.
Always print options that differ from their implicit default. At least
for simple option types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176572 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 19:04:56 +00:00
Michael Liao
2faa0f37c2 Remove tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176570 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 18:24:34 +00:00
Andrew Trick
122136b119 Give -loop-vectorize an explicit default.
This way, clang -mllvm -print-options shows that the driver is overriding it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176569 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 18:22:22 +00:00
Shuxin Yang
985dac6579 Memory Dependence Analysis (not mem-dep test) take advantage of "invariant.load" metadata.
The "invariant.load" metadata indicates the memory unit being accessed is immutable.
A load annotated with this metadata can be moved across any store.

As I am not sure if it is legal to move such loads across barrier/fence, this
change dose not allow such transformation.

rdar://11311484

Thank Arnold for code review.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176562 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 17:48:48 +00:00
Jim Grosbach
186d8a3d67 InstCombine: Don't shrink allocas when combining with a bitcast.
When considering folding a bitcast of an alloca into the alloca itself,
make sure we don't shrink the amount of memory being allocated, or
things rapidly go sideways.

rdar://13324424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176547 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 05:44:53 +00:00
Akira Hatanaka
508d11b19c [mips] Add a line which checks function name. Rename file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176543 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 01:58:03 +00:00
Michael Liao
c537f79dcd Fix PR15355
- Clear 'mayStore' flag when loading from the atomic variable before the
  spin loop
- Clear kill flag from one use to multiple use in registers forming the
  address to that atomic variable
- don't use a physical register as live-in register in BB (neither entry
  nor landing pad.) by copying it into virtual register

(patch by Cameron Zwarich)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176538 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 00:17:04 +00:00
Jakub Staszak
603e874c64 Use dyn_cast instead of isa && cast. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176537 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 00:16:16 +00:00
Jakub Staszak
62c102360a Remove duplicated forward declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 00:04:32 +00:00
Akira Hatanaka
5ffd24c49f [mips] Remove android calling convention.
This calling convention was added just to handle functions which return vector
of floats. The fix committed in r165585 solves the problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176530 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 23:22:30 +00:00
Akira Hatanaka
1e3e869899 [mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 gets
returned in registers $2 and $4.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176527 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:54:59 +00:00
Akira Hatanaka
7433b2e114 [mips] Fix MipsTargetLowering::LowerCallResult and LowerReturn to correctly
handle fp128 returns.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176523 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:41:55 +00:00
Akira Hatanaka
cb2eafdfa3 [mips] Fix MipsTargetLowering::LowerCall to pass fp128 arguments in floating
point registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176521 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:20:28 +00:00
Akira Hatanaka
5fdee6d2b5 [mips] Correct handling of fp128 (long double) formals and read long double
parameters from floating point registers if target is mips64 hard float.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:13:04 +00:00
Jakub Staszak
f84606732c Fix a few typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:05:16 +00:00
Jakub Staszak
fe0c244633 Add some constantness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176518 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 22:01:15 +00:00
Jakub Staszak
aa4e2aea9e std::distance() == 0 means that iterators are equal. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176516 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 21:53:57 +00:00
Meador Inge
cf70590c38 Add more functions to the TLI.
This patch adds many more functions to the target library information.
All of the functions being added were discovered while doing the migration
of the simplify-libcalls attribute annotation functionality to the
functionattrs pass.  As a part of that work the attribute annotation logic
will query TLI to determine if a function should be annotated or not.

Signed-off-by: Meador Inge <meadori@codesourcery.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176514 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 21:47:40 +00:00
Jyotsna Verma
0d44328ce8 reverting patch 176508.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176513 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 20:29:23 +00:00
Jyotsna Verma
c34f17140f Hexagon: Add support for lowering block address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176508 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 19:37:46 +00:00
Vincent Lejeune
62b0a9b1e6 R600: Do not predicate vector op
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176507 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 19:12:06 +00:00
Jyotsna Verma
18daead3ff Hexagon: Expand addc, adde, subc and sube.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176505 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 19:04:47 +00:00
Arnold Schwaighofer
6936ebd700 Use the right number of slashes in comment string
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176504 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 19:04:12 +00:00
Eli Bendersky
1ab326310c Fixes a test by replacing .align by .p2align and setting triples explicitly.
Patch by David Sehr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176502 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:56:14 +00:00
Benjamin Kramer
285f6f1a24 Update cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176501 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:54:05 +00:00
Jyotsna Verma
9feabc23b3 Hexagon: Use MO operand flags to mark constant extended instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176500 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:51:42 +00:00
Jyotsna Verma
ee0ef13eba Hexagon: Add encoding bits to the TFR64 instructions.
Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176499 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:42:28 +00:00
Vincent Lejeune
62f38ca141 R600: initial scheduler code
This is a skeleton for a pre-RA MachineInstr scheduler strategy. Currently
it only tries to expose more parallelism for ALU instructions (this also
makes the distribution of GPR channels more uniform and increases the
chances of ALU instructions to be packed together in a single VLIW group).
Also it tries to reduce clause switching by grouping instruction of the
same kind (ALU/FETCH/CF) together.

Vincent Lejeune:
 - Support for VLIW4 Slot assignement
 - Recomputation of ScheduleDAG to get more parallelism opportunities

Tom Stellard:
 - Fix assertion failure when trying to determine an instruction's slot
   based on its destination register's class
 - Fix some compiler warnings

Vincent Lejeune: [v2]
 - Remove recomputation of ScheduleDAG (will be provided in a later patch)
 - Improve estimation of an ALU clause size so that heuristic does not emit cf
 instructions at the wrong position.
 - Make schedule heuristic smarter using SUnit Depth
 - Take constant read limitations into account

Vincent Lejeune: [v3]
 - Fix some uninitialized values in ConstPair
 - Add asserts to ensure an ALU slot is always populated

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176498 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 18:41:32 +00:00
Arnold Schwaighofer
1c9bdf1e5e Clarify comment for function getObjectSize
Clarify that we mean the object starting at the pointer to the end of the
underlying object and not the size of the whole allocated object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176491 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 16:53:24 +00:00
David Sehr
81ee0f7368 Add a test that .align directives on capable processors use long NOPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176490 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 16:46:54 +00:00
Vincent Lejeune
d4c3e56692 R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.
Maintaining CONST_COPY Instructions until Pre Emit may prevent some ifcvt case
and taking them in account for scheduling is difficult for no real benefit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176488 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:55 +00:00
Vincent Lejeune
cae6801b7d R600: Turn BUILD_VECTOR into Reg_Sequence
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176487 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:49 +00:00
Vincent Lejeune
64ca84d9b2 R600: CONST_ADDRESS node is not marked as mayLoad anymore
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

mayLoad complexify scheduling and does not bring any usefull info
as the location is not writeable at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176486 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:42 +00:00
Vincent Lejeune
f49cf1c320 R600: Use MUL_IEEE for trig/fdiv intrinsic
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176485 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 15:04:37 +00:00