130659 Commits

Author SHA1 Message Date
Peter Collingbourne
5011913625 CodeGen: Use PLT relocations for relative references to unnamed_addr functions.
The relative vtable ABI (PR26723) needs PLT relocations to refer to virtual
functions defined in other DSOs. The unnamed_addr attribute means that the
function's address is not significant, so we're allowed to substitute it
with the address of a PLT entry.

Also includes a bonus feature: addends for COFF image-relative references.

Differential Revision: http://reviews.llvm.org/D17938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267211 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 20:40:10 +00:00
Philip Reames
a436337c79 [unordered] Extend load/store type canonicalization to handle unordered operations
Extend the type canonicalization logic to work for unordered atomic loads and stores.  Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before.  Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered.  If you see problems, feel free to revert this change, but please make sure you collect a test case.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267210 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 20:33:48 +00:00
Matt Arsenault
625291533e DAGCombiner: Relax alignment restriction when changing load type
If the target allows the alignment, this should still be OK.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267209 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 20:21:36 +00:00
Quentin Colombet
57d47e7fb8 [AArch64] Fix optimizeCondBranch logic.
The opcode for the optimized branch does not depend on the size
of the activate bits in the AND masks, but the AND opcode itself.
Indeed, we need to use a X or W variant based on the AND variant
not based on whether the mask fits into the related variant.
Otherwise, we may end up using the W variant of the optimized branch
for 64-bit register inputs!

This fixes the last make check verifier issues for AArch64: PR27479.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267206 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 20:09:58 +00:00
Justin Bogner
9d0b7e9b17 PM: Port SinkingPass to the new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267199 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:54:10 +00:00
Justin Bogner
e6cf9dc267 PM: Reorder the functions used for SinkingPass. NFC
This will make the port to the new PM easier to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267198 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:54:04 +00:00
Jun Bum Lim
950aa30304 [DeadStoreElimination] Shorten beginning of memset overwritten by later stores
Summary: This change will shorten memset if the beginning of memset is overwritten by later stores.

Reviewers: hfinkel, eeckstein, dberlin, mcrosier

Subscribers: mgrang, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267197 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:51:29 +00:00
Justin Bogner
04d2814f0b PM: Port DCE to the new pass manager
Also add a very basic test, since apparently there aren't any tests
for DCE whatsoever to add the new pass version to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267196 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:40:41 +00:00
Matthias Braun
bc2216cab2 MachineScheduler: Move code to initialize a Candidate out of tryCandidate(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267191 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:10:15 +00:00
Adam Nemet
702039b963 [LoopUtils] Extend findStringMetadataForLoop to return the value for metadata
E.g. for:

  !1 = {"llvm.distribute", i32 1}

it now returns the MDOperand for 1.

I will use this in LoopDistribution to check the value of the metadata.

Note that the change is backward-compatible with its current use in
LoopVersioningLICM.  An Optional implicitly converts to a bool depending
whether it contains a value or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267190 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:10:05 +00:00
Matthias Braun
14c1739a3e MachineScheduler: Limit the size of the ready list.
Avoid quadratic complexity in unusually large basic blocks by limiting
the size of the ready lists.

Differential Revision: http://reviews.llvm.org/D19349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267189 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 19:09:17 +00:00
Chad Rosier
c6ee1a00f8 [EarlyCSE/CVP] Add stats for CVPs and make sure to account for any Changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267187 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:47:21 +00:00
Quentin Colombet
b5898a2cfe [AArch64] When creating MRS instruction, make sure the destination register is
declared as a definition.

This fixes the machine verifier error for CodeGen/AArch64/nzcv-save.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267185 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:46:17 +00:00
Adam Nemet
bc86912f3c [LoopVersioningLICM] Add test coverage for llvm.loop.licm_versioning.disable
In the next change, I am generalizing the function
findStringMetadataForLoop and I want to make sure I don't break this.
Looks like there was no coverage for this so far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267182 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:34:50 +00:00
Quentin Colombet
a9389fc718 [AArch64][AdvSIMDScalar] Update the kill flags correctly.
We used to simply set the kill flags to true when transforming a scalar
instruction to a vector one.
SrcScalar1 = copy SrcVector1
... = opScalar SrcScalar1
=>
SrcScalar1 = copy SrcVector1
... = opVector SrcVector1<kill>

This is obviously wrong. The proper update consists in:
1. Propagate the kill status from the copy to the new opVector
2. Reset the kill status on the copy, since the live-range of
   SrcVector1 got extended.

This fixes some of the machine verifier errors for AArch64 with make check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267180 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:09:14 +00:00
Saleem Abdulrasool
f9b535e7c7 test: split test into two runs
Rather than checking both stdout and stderr simultaneously, split it into two
tests.  This apparently breaks on Windows where MSVCRT does not buffer output
correctly.  NFC.

Thanks to chapuni for bringing the issue to my attention!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267179 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:06:51 +00:00
Krzysztof Parzyszek
37cfc23682 [Hexagon] Use common Pat classes for selecting code for intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267178 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 18:05:55 +00:00
Chad Rosier
6d282e5efc [SimplifyCFG] Add final missing implications to isImpliedTrueByMatchingCmp.
Summary: eq imply [u|s]ge and [u|s]le are true.

Remove redundant logic by implementing isImpliedFalseByMatchingCmp(Pred1, Pred2)
as isImpliedTrueByMatchingCmp(Pred1, getInversePredicate(Pred2)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267177 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:57:34 +00:00
Michael Kuperstein
0e44a1ed64 Point link to CODE_OWNERS.txt to klaus instead of viewvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267176 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:41:12 +00:00
Sanjoy Das
c8ce43d192 Have isKnownNotFullPoison be smarter around control flow
Summary:
(... while still not using a PostDomTree)

The way we use isKnownNotFullPoison from SCEV today, the new CFG walking
logic will not trigger for any realistic cases -- it will kick in only
for situations where we could have merged the contiguous basic blocks
anyway[0], since the poison generating instruction dominates all of its
non-PHI uses (which are the only uses we consider right now).

However, having this change in place will allow a later bugfix to break
fewer llvm-lit tests.

[0]: i.e. cases where block A branches to block B and B is A's only
successor and A is B's only predecessor.

Reviewers: broune, bjarke.roune

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19212

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267175 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:41:06 +00:00
Krzysztof Parzyszek
d57e2db4cf [Hexagon] Properly close live range in HexagonBlockRanges ---add testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267174 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:30:13 +00:00
Krzysztof Parzyszek
d12b34532a [Hexagon] Properly close live range in HexagonBlockRanges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267173 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:27:22 +00:00
Justin Bogner
491fbf630f PM: Remove some redundant name() methods
These passes all get names from PassInfoMixin already, we don't need
to override them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267172 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:25:43 +00:00
Chad Rosier
14f36d715b [SimplifyCFG] Add missing implications to isImpliedTrueByMatchingCmp.
Summary: [u|s]gt and [u|s]lt imply [u|s]ge and [u|s]le are true, respectively.
I've simplified the existing tests and added additional tests to cover the new
cases mentioned above.  I've also added tests for all the cases where the
first compare doesn't imply anything about the second compare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267171 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:14:12 +00:00
Chad Rosier
41b3dd1ad5 [SimplifyCFG] Simplify code review by temporarily removing this test file.
A followup commit will replace these tests with simplified and more inclusive
tests.  The diff is unreadable if this were to be done in a single commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267170 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:14:08 +00:00
Konstantin Zhuravlyov
1a459df239 [AMDGPU] Insert nop pass: take care of outstanding feedback
- Switch few loops to range-based for loops
- Fix nop insertion at the end of BB
- Fix formatting
- Check for endpgm

Differential Revision: http://reviews.llvm.org/D19380


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267167 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 17:04:51 +00:00
Zoran Jovanovic
762ad97089 [mips][microMIPS] Revert commit r266861.
Commit r266861 was the reason for failing tests in LLVM test suite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267166 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 16:53:15 +00:00
Krzysztof Parzyszek
db55335b2e [Hexagon] Teach mux expansion how to deal with undef predicates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267165 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 16:47:01 +00:00
Krzysztof Parzyszek
58d0f74c14 [Hexagon] Add definitions for trap/pause instructions
Also add tests for other instructions from HexagonSystemInst.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267162 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 16:25:00 +00:00
Tom Stellard
bfad27b7b8 PostRAHazardRecocgnizer: Fix unused-private-field warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267160 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 15:11:08 +00:00
Geoff Berry
1defd690ca [MemorySSA] Fix bug in CachingMemorySSAWalker::invalidateInfo
Summary:
CachingMemorySSAWalker::invalidateInfo was using IsCall to determine
which cache map needed to be cleared of entries referring to the invalidated
MemoryAccess, but there could also be entries referring to it in the
other cache map (value entries, not key entries).  This change just
clears both tables to be conservatively correct.

Also add a verifyRemoved() function, called when expensive
checks (i.e. XDEBUG) are enabled to verify that the invalidated
MemoryAccess object is not referenced in any of the caches.

Reviewers: dberlin, george.burgess.iv

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267157 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 14:44:10 +00:00
Tom Stellard
fbbc621bb4 CodeGen: Add a stand-alone hazard recognizer pass
Summary:
This new pass allows targets to use the hazard recognizer without having
to also run one of the schedulers.  This is useful when compiling with
optimizations disabled for targets that still need noop hazards
to be handled correctly.

Reviewers: hfinkel, atrick

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18594

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267156 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 14:43:50 +00:00
David Majnemer
a796450d3d [EarlyCSE] Don't add the overflow flags to the hash
We take the intersection of overflow flags while CSE'ing.
This permits us to consider two instructions with different overflow
behavior to be replaceable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267153 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 14:12:50 +00:00
Nirav Dave
3211e2dbdd Emit code16 in assembly in 16-bit mode
Summary:
When generating assembly using -m16 we must explicitly mark it as
16-bit. Emit .code16 at beginning of file. Fixes wrong results when
using -fno-integrated-as.

Reviewers: dwmw2

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267152 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 13:36:11 +00:00
Simon Dardis
ad461d6067 [mips] Fix select patterns for MIPS64
When targetting MIPS64R6 some of the patterns for select were guarded by a
broken predicate. The predicate was supposed to test if a constant value
could fit in a 16 bit zero-extended field. Instead the value was tested to
fit in a 16 bit sign-extended field. For negative constants of native word
width this resulted in wrong code generation.

Reviewers: vkalintiris, dsanders

Differential Review: http://reviews.llvm.org/D19378


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267151 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 13:19:22 +00:00
Teresa Johnson
47534d9ca6 Document source_filename in LangRef.
Summary: Add documentation for new LLVM IR source_filename identifier.

Reviewers: joker.eph, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267150 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 13:09:17 +00:00
Vasileios Kalintiris
e86221b7cc [mips] Fix a small typo that would leave BLTZC out of getAnalyzableBrOpc().'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267149 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 13:05:51 +00:00
Daniel Sanders
cd2984fe3c Revert r267049, r26706[16789], r267071 - Refactor raw pdb dumper into library
r267049 broke multiple buildbots (e.g. clang-cmake-mips, and clang-x86_64-linux-selfhost-modules) which the follow-ups have not yet resolved and this is preventing subsequent committers from being notified about additional failures on the affected buildbots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267148 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 12:04:42 +00:00
Nikolay Haustov
c42b2f3bd2 AMDGPU/SI: Add test missed in rL266865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267144 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 11:39:43 +00:00
Silviu Baranga
883a09c5a6 [InstCombine] Preserve fast math flags when combining PHIs
Summary:
When optimizing PHIs which have inputs floating point binary
operators, we preserve all IR flags except the fast math
flags.

This change removes the logic which tracked some of the IR flags
(no wrap, exact) and replaces it by doing an and on the IR flags of
all inputs to the PHI - which will also handle the fast math
flags.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267139 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 11:21:36 +00:00
Hrvoje Varga
fed867f0f8 [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: http://reviews.llvm.org/D19354


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267137 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 11:18:40 +00:00
Zoran Jovanovic
c1499f8232 [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
Differential Revision: http://reviews.llvm.org/D15026


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267130 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 10:15:12 +00:00
Eric Liu
2321e6017b Fix -Wunused-variable in non-asserts build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267128 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 09:50:31 +00:00
Daniel Sanders
c4f4f71fb7 Revert r267098 - [MachineCombiner] Support for floating-point FMA on ARM64
It introduced buildbot failures on clang-cmake-mips, clang-ppc64le-linux, among others.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267127 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 09:37:26 +00:00
Ashutosh Nema
91d7ac06b6 [X86]: Changing cost for “TRUNCATE v16i32 to v16i8” in SSE4.1 mode.
Summary:
rL256194 transforms truncations between vectors of integers into PACKUS/PACKSS
operations during DAG combine. This generates better code for truncate, so cost
of truncate needs to be changed but looks like it got changed only in SSE2 table
Whereas this change is also applicable for SSE4.1, so the cost of truncate needs
to be changed for that as well. Cost of “TRUNCATE v16i32 to v16i8” & “TRUNCATE 
v16i16 to v16i8” should be same in SSE4.1 & SSE2 table. Removing their cost from
SSE4.1, so it will fall back to SSE2.

Reviewers: Simon Pilgrim


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267123 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 08:34:05 +00:00
Chris Dewhurst
4572b689c6 [Sparc] This provides support for itineraries on Sparc.
Specifically, itineraries for LEON processors has been added, along with several LEON processor Subtargets. Although currently all these targets are pretty much identical, support for features that will differ among these processors will be added in the very near future.

The different Instruction Itinerary Classes (IICs) added are sufficient to differentiate between the instruction timings used by LEON and, quite probably, by generic Sparc processors too, but the focus of the exercise has been for LEON processors, as the requirement of my project. If the IICs are not sufficient for other Sparc processor types and you want to add a new itinerary for one of those, it should be relatively trivial to adapt this.

As none of the LEON processors has Quad Floats, or is a Version 9 processor, none of those instructions have itinerary classes defined and revert to the default "NoItinerary" instruction itinerary.

Phabricator Review: http://reviews.llvm.org/D19359

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267121 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 08:17:17 +00:00
Chris Dewhurst
82da5a1b3d The following code would not work before this patch, due to the inability to take the address of a global object:
void func1() {

...
}

int main(int argc, char** argv) {

void (*pFunc)();
pFunc = &func1
pFunc();
...
}

Phabricator review: http://reviews.llvm.org/D19368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267120 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 08:13:47 +00:00
Vedant Kumar
8866d94a61 Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:

  http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267115 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 06:51:37 +00:00
Zlatko Buljan
6a025fe5e2 [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Differential Revision: http://reviews.llvm.org/D18687


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267114 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 06:44:34 +00:00
David Majnemer
582e856107 [GVN] Respect fast-math-flags on fcmps
We assumed that flags were only present on binary operators.  This is
not true, they may also be present on calls and fcmps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267113 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-22 06:37:51 +00:00