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27 Commits

Author SHA1 Message Date
Dan Gohman
a72cf1129d [WebAssembly] Fix the opcode values for i64.eq and i64.ne. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291424 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-09 06:21:28 +00:00
Dan Gohman
54f9742d29 [WebAssembly] Fix the opcode value for i64.rotr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290281 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-21 23:09:42 +00:00
Dan Gohman
01b89435ec [WebAssembly] Implement more WebAssembly binary encoding. 
This changes locals from being declared by the emitLocal hook in
WebAssemblyTargetStreamer, rather than with an instruction. After exploring
the infastructure in LLVM more, this seems to make more sense since
declaring locals doesn't use an encoded opcode.

This also adds more 0xd opcodes, type encodings, and miscellaneous
binary encoding bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285040 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-10-24 23:27:49 +00:00
Dan Gohman
8dd4db3f49 [WebAssembly] Update opcode values according to recent spec changes. 
This corresponds to the "0xd" opcode renumbering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285014 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-10-24 20:21:49 +00:00
Dan Gohman
6a6f29c0d8 [WebAssembly] Add binary-encoding opcode values to instruction descriptions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283389 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-10-05 21:24:08 +00:00
Craig Topper
bd49c65d03 [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267264 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-23 02:49:25 +00:00
Dan Gohman
35d7235fd8 [WebAssembly] Implement the rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264076 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-03-22 18:01:49 +00:00
Dan Gohman
c13556c771 [WebAssembly] Implement the eqz instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263976 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-03-21 19:54:41 +00:00
Dan Gohman
379844452a [WebAssembly] Update the select instructions' operand orders to match the spec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259893 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-02-05 17:14:59 +00:00
Dan Gohman
10ad208c62 [WebAssembly] Set several MCInstrDesc flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254271 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-29 22:59:19 +00:00
Dan Gohman
7fd6f1a4bf [WebAssembly] Fold setne and seteq comparisons into selects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254104 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-25 22:13:48 +00:00
Dan Gohman
fe3415b2af [WebAssembly] Use a physical register to describe ARGUMENT liveness. 
Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254084 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-25 19:36:19 +00:00
Dan Gohman
75f55d559a [WebAssembly] Add some spaces to the assembly output to vertically align operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253468 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-18 16:25:38 +00:00
Dan Gohman
284e00c04e [WebAssembly] Use tabs instead of spaces in assembly output. 
This seems to be the most popular convention among the other backends.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253172 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-15 15:34:19 +00:00
Dan Gohman
e6d3aa4a49 [WebAssembly] Fix copypasta. 
Noticed by dschff in http://reviews.llvm.org/rL252203


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252208 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-05 20:59:49 +00:00
Dan Gohman
651ccf4012 [WebAssembly] Add AsmString strings for most instructions. 
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252203 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-05 20:42:30 +00:00
Derek Schuff
f284162906 [WebAssembly] Rename ior operator to or to match the spec 
Summary: The spec uses "or" for inclusive-or and "xor" for exclusive-or

Reviewers: sunfish

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: http://reviews.llvm.org/D14362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252174 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-05 17:08:11 +00:00
Derek Schuff
4f71e3c355 Align whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252003 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-03 22:40:43 +00:00
Derek Schuff
05d7d32e12 [WebAssembly] Support wasm select operator 
Summary:
Add support for wasm's select operator, and lower LLVM's select DAG node
to it.

Reviewers: sunfish

Subscribers: dschuff, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D14295

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252002 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-03 22:40:40 +00:00
JF Bastien
55a57a7674 WebAssembly: fix more syntax 
br_if shouldn't start with a dot.
div and rem went from prefix u/s to suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250972 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-10-22 02:32:50 +00:00
JF Bastien
065515c76c WebAssembly: fix the syntax for comparisons 
Summary: It has also slightly changed.

Reviewers: binji

Subscribers: jfb, dschuff, llvm-commits, sunfish

Differential Revision: http://reviews.llvm.org/D13837

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250591 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-10-17 00:12:29 +00:00
Dan Gohman
24b507c2c1 [WebAssembly] Rename several functions and types according to the new spec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248644 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-26 01:09:44 +00:00
JF Bastien
13b1346197 WebAssembly: NFC rename shr/sar 
Renamed from: https://github.com/WebAssembly/design/pull/332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247028 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:21:21 +00:00
Dan Gohman
c26771d7ab [WebAssembly] Implement the is_zero_undef forms of cttz and ctlz 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245851 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-08-24 16:39:37 +00:00
JF Bastien
06a1f0e6d8 WebAssembly: implement comparison. 
Some of the FP comparisons (ueq, one, ult, ule, ugt, uge) are currently broken, I'll fix them in a follow-up.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244665 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-08-11 21:02:46 +00:00
JF Bastien
e812ce5cbe WebAssembly: add basic int/fp instruction codegen. 
Summary: This patch has the most basic instruction codegen for 32 and 64 bit int/fp.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11193

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242201 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-07-14 21:13:29 +00:00
JF Bastien
7bfd515593 WebAssembly: basic instructions todo, and basic register info. 
Summary:
This code is based on AArch64 for modern backend good practice, and NVPTX for
virtual ISA concerns.

Reviewers: sunfish

Subscribers: aemerson, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11070

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241923 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-07-10 18:23:10 +00:00