The grow_memory instruction now returns the previous memory size. Add the
return type to the LLVM intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292322 91177308-0d34-0410-b5e6-96231b3b80d8
The p2align operand of a load/store is encoded before the offset
operand; reorder the MachineInstr operands accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285044 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
If the register has a negative value then unsigned overflow will occur;
this case is sometimes even created intentionally by LSR. For now
disable GA+reg folding. Fixes PR29127
Differential Revision: https://reviews.llvm.org/D24053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280285 91177308-0d34-0410-b5e6-96231b3b80d8
LLVM converts adds into ors when it can prove that the operands don't share
any non-zero bits. Teach address folding to recognize or instructions with
constant operands with this property that can be folded into addresses as
if they were adds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261562 91177308-0d34-0410-b5e6-96231b3b80d8
Always expect tglobaladdr and texternalsym to be wrapped in
WebAssemblywrapper nodes. Also, split out a regPlusGA from regPlusImm so
that it can special-case global addresses, as they can be folded in more
cases.
Unfortunately this doesn't enable any new optimizations yet due to
SelectionDAG limitations. I'll be submitting changes to the SelectionDAG
infrastructure, along with tests, in a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257394 91177308-0d34-0410-b5e6-96231b3b80d8
This allows the AsmMatcherEmitter to properly tokenize the AsmStrings for
load and store instructions. This is a step towards asm parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256166 91177308-0d34-0410-b5e6-96231b3b80d8
Add instruction patterns for matching load and store instructions with constant
offsets in addresses. The code is fairly redundant due to the need to replicate
everything between imm, tglobaldadr, and texternalsym, but this appears to be
common tablegen practice. The main alternative appears to be to introduce
matching functions with C++ code, but sticking with purely generated matchers
seems better for now.
Also note that this doesn't yet support offsets from getelementptr, which will
be the most common case; that will depend on a change in target-independent code
in order to set the NoUnsignedWrap flag, which I'll submit separately. Until
then, the testcase uses ptrtoint+add+inttoptr with a nuw on the add.
Also implement isLegalAddressingMode with an approximation of this.
Differential Revision: http://reviews.llvm.org/D15538
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255681 91177308-0d34-0410-b5e6-96231b3b80d8
Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254084 91177308-0d34-0410-b5e6-96231b3b80d8
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252203 91177308-0d34-0410-b5e6-96231b3b80d8
The page_size operator has been removed from the spec, and the resize_memory
operator has been changed to grow_memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252202 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now.
Reviewers: sunfish
Subscribers: jfb, llvm-commits, dschuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246500 91177308-0d34-0410-b5e6-96231b3b80d8
