Commit Graph

150817 Commits

Author SHA1 Message Date
Peter Collingbourne 5a653c222d Fix a misleading indentation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306130 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 17:17:47 +00:00
Peter Collingbourne 5974d48eea Make the size specification for cache_size_bytes case insensitive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306129 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 17:13:51 +00:00
Peter Collingbourne 5cc49a2645 Add a ThinLTO cache policy for controlling the maximum cache size in bytes.
This is useful when an upper limit on the cache size needs to be
controlled independently of the amount of the amount of free space.

One use case is a machine with a large number of cache directories
(e.g. a buildbot slave hosting a large number of independent build
jobs). By imposing an upper size limit on each cache directory,
users can more easily estimate the server's capacity.

Differential Revision: https://reviews.llvm.org/D34547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306126 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 17:05:03 +00:00
Krzysztof Parzyszek 1e5c31d7ad [Hexagon] Handle decreasing of stack alignment in frame lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306124 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:53:59 +00:00
Zachary Turner 36e5ba3f32 Add a BinarySubstreamRef, and a method to read one.
This is essentially just a BinaryStreamRef packaged with an
offset and the logic for reading one is no different than the
logic for reading a BinaryStreamRef, except that we save the
current offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306122 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:38:40 +00:00
Simon Pilgrim d9be98a70d Remove trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306121 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:35:32 +00:00
Tim Northover 7d0b44e156 GlobalISel: remove G_SEQUENCE instruction.
It was trying to do too many things. The basic lumping together of values for
legalization purposes is now handled by G_MERGE_VALUES. More complex things
involving gaps and odd sizes are handled by G_INSERT sequences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306120 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:15:55 +00:00
Tim Northover 5e24d2fee2 GlobalISel: convert buildSequence to use non-deprecated instructions.
G_SEQUENCE is going away soon so as a first step the MachineIRBuilder needs to
be taught how to emulate it with alternatives. We use G_MERGE_VALUES where
possible, and a sequence of G_INSERTs if not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306119 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:15:37 +00:00
Jun Bum Lim 910c8cc532 [InlineCost] Do not take INT_MAX when Cost is negative
Summary: visitSwitchInst should not take INT_MAX when Cost is negative. Instead of INT_MAX , we also use a valid upperbound cost when overflow occurs in Cost.

Reviewers: hans, echristo, dmgreen

Reviewed By: dmgreen

Subscribers: mcrosier, javed.absar, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D34436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306118 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 16:12:37 +00:00
Ulrich Weigand dd1f27e281 [SystemZ] Remove unnecessary serialization before volatile loads
This reverts the use of TargetLowering::prepareVolatileOrAtomicLoad
introduced by r196905.  Nothing in the semantics of the "volatile"
keyword or the definition of the z/Architecture actually requires
that volatile loads are preceded by a serialization operation, and
no other compiler on the platform actually implements this.

Since we've now seen a use case where this additional serialization
causes noticable performance degradation, this patch removes it.

The patch still leaves in the serialization before atomic loads,
which is now implemented directly in lowerATOMIC_LOAD.  (This also
seems overkill, but that can be addressed separately.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 15:56:14 +00:00
Sanjay Patel 45dca99e22 [x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306114 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 15:29:49 +00:00
Sanjay Patel c5596640da [x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306113 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 15:22:27 +00:00
Tom Stellard 111d1b387d AMDGPU/GlobalISel: Mark 32-bit G_AND as legal
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306112 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 15:17:17 +00:00
Sanjay Patel 1963676fa1 [x86] remove overridden target settings in test; NFC
r306109 was supposed to make this change, but I committed the wrong version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306110 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 15:06:30 +00:00
Sanjay Patel 65b48742f4 [x86] rename test file and auto-generate complete checks; NFC
The command-line params override the target setting in the file itself, so delete that.
Also, remove the cpu and arch because those don't matter and neither does the OS specification in the triple.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306109 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 14:58:21 +00:00
Simon Pilgrim 47b190de86 [X86][AVX] Extended vector average tests
Added AVX1 tests and merged AVX1/AVX2/AVX512 checks where possible


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306107 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 14:38:00 +00:00
Jonas Paulsson a550fda1e6 [SystemZ] Fix trap issue and enable expensive checks.
The isBarrier/isTerminator flags have been removed from the SystemZ trap
instructions, so that tests do not fail with EXPENSIVE_CHECKS. This was just
an issue at -O0 and did not affect code output on benchmarks.

(Like Eli pointed out: "targets are split over whether they consider their
"trap" a terminator; x86, AArch64, and NVPTX don't, but ARM, MIPS, PPC, and
SystemZ do. We should probably try to be consistent here.". This is still the
case, although SystemZ has switched sides).

SystemZ now returns true in isMachineVerifierClean() :-)

These Generic tests have been modified so that they can be run with or without
EXPENSIVE_CHECKS: CodeGen/Generic/llc-start-stop.ll and
CodeGen/Generic/print-machineinstrs.ll

Review: Ulrich Weigand, Simon Pilgrim, Eli Friedman
https://bugs.llvm.org/show_bug.cgi?id=33047
https://reviews.llvm.org/D34143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306106 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 14:30:46 +00:00
Anna Thomas 5b66dfbd50 [RuntimeLoopUnrolling] Rename exit block and move assert earlier. NFC
The single exit block allowed in runtime unrolling is guaranteed to be
the Latch's successor, so rename it as LatchExitBlock.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306105 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 14:28:01 +00:00
Simon Pilgrim 6ae9f209aa [X86][SSE] Dropped -mcpu from vector average tests
Use triple and attribute only for consistency 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306104 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 14:16:50 +00:00
Ekaterina Vaartis 5cb7c56962 [docs] As of binutils 2.21.51.0.2, ld.bfd supports plugins too, represent this in docs
PR#32760



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306102 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:54:10 +00:00
Simon Pilgrim d263a71f37 Fix double->float truncation warning on MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306101 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:53:55 +00:00
Anna Thomas 2cfdb4aa6c [InstCombine] Recognize and simplify three way comparison idioms
Summary:
Many languages have a three way comparison idiom where comparing two values
produces not a boolean, but a tri-state value. Typical values (e.g. as used in
the lcmp/fcmp bytecodes from Java) are -1 for less than, 0 for equality, and +1
for greater than.

We actually do a great job already of converting three way comparisons into
binary comparisons when the result produced has one a single use. Unfortunately,
such values can have more than one use, and in that case, our existing
optimizations break down.

The patch adds a peephole which converts a three-way compare + test idiom into a
binary comparison on the original inputs. It focused on replacing the test on
the result of the three way compare and does nothing about removing the three
way compare itself. That's left to other optimizations (which do actually kick
in commonly.)
We currently recognize one idiom on signed integer compare. In the future, we
plan to recognize and simplify other comparison idioms on
other signed/unsigned datatypes such as floats, vectors etc.

This is a resurrection of Philip Reames' original patch:
https://reviews.llvm.org/D19452

Reviewers: majnemer, apilipenko, reames, sanjoy, mkazantsev

Reviewed by: mkazantsev

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306100 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:41:45 +00:00
Petar Jovanovic 2d829cd8cb Revert r306095: [mips] Fix reg positions in the aui/daui instructions
ELF/mips-plt-r6.s in lld-test is failing. Reverting the change.

Original commit message:

  [mips] Fix register positions in the aui/daui instructions

  Swapped the position of the rt and rs register in the aut/daui
  instructions for mips32r6 and mips64r6. With this change, the format of
  the generated instructions complies with specifications and GCC.
  Patch by Milos Stojanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306099 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:33:46 +00:00
Pavel Labath 547bbfbdbd Fix build breakage caused by r306096
It seems some targets don't have std::strtof and friends. Hopefully,
dropping the std:: will be fine, as that's what the compiler recommends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306098 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:13:06 +00:00
Simon Pilgrim d5df6f8a70 [X86][SSE] Dropped -mcpu from scalar math tests
Use triple and attribute only for consistency 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306097 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 13:07:20 +00:00
Pavel Labath 44499d7a41 [ADT] Add llvm::to_float
Summary:
The function matches the interface of llvm::to_integer, but as we are
calling out to a C library function, I let it take a Twine argument, so
we can avoid a string copy at least in some cases.

I add a test and replace a couple of existing uses of strtod with this
function.

Reviewers: zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306096 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 12:55:02 +00:00
Petar Jovanovic 42345361c6 [mips] Fix register positions in the aui/daui instructions
Swapped the position of the rt and rs register in the aut/daui instructions
for mips32r6 and mips64r6. With this change, the format of the generated
instructions complies with specifications and GCC.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D33988


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306095 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 12:47:18 +00:00
Simon Pilgrim f066646d1f [X86][SSE] Dropped -mcpu from insertps tests
Use triple and attribute only for consistency 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306092 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 11:00:49 +00:00
Stefan Maksimovic bc1000f7b0 [mips][msa] Splat.d endianness check
Before this change, it was always the first element of a vector that got splatted since the lower 6 bits of vshf.d $wd were always zero for little endian.
Additionally, masking has been performed for vshf via which splat.d is created.

Vshf has a property where if its first operand's elements have either bit 6 or 7 set, destination element is set to zero.
Initially masked with 63 to avoid this property, which would result in generation of and.v + vshf.d in all cases.
Masking with one results in generating a single splati.d instruction when possible.

Differential Revision: https://reviews.llvm.org/D32216


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306090 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 09:09:31 +00:00
Craig Topper a98fd55665 [JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4)
Currently JumpThreading can use LazyValueInfo to analyze an 'and' or 'or' of compare if the compare is fed by a livein of a basic block. This can be used to to prove the condition can't be met for some predecessor and the jump from that predecessor can be moved to the false path of the condition.

But if the compare is something that InstCombine turns into an add and a single compare, it can't be analyzed because the livein is now an input to the add and not the compare.

This patch adds a new method to LVI to get a ConstantRange on an edge. Then we teach jump threading to detect the add livein feeding a compare and to get the ConstantRange and propagate it.

Differential Revision: https://reviews.llvm.org/D33262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306085 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 05:41:35 +00:00
Craig Topper d26da70a96 [JumpThreading] Use some temporary variables to reduce the number of times we call the same methods. NFC
A future patch will add even more uses of these variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306084 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 05:41:32 +00:00
Rafael Espindola ef42908fbc COFF: Produce an error on invalid pcrel relocs.
X86_64 COFF only has support for 32 bit pcrel relocations. Produce an
error on all others.

Note that gnu as has extended the relocation values to support
this. It is not clear if we should support the gnu extension.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306082 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 04:07:44 +00:00
Chandler Carruth 9dc2b94a11 [LoopSimplify] Factor the logic to form dedicated exits into a utility.
I want to use the same logic as LoopSimplify to form dedicated exits in
another pass (SimpleLoopUnswitch) so I wanted to factor it out here.

I also noticed that there is a pretty significantly more efficient way
to implement this than the way the code in LoopSimplify worked. We don't
need to actually retain the set of unique exit blocks, we can just
rewrite them as we find them and use only a set to deduplicate.

This did require changing one part of LoopSimplify to not re-use the
unique set of exits, but it only used it to check that there was
a single unique exit. That part of the code is about to walk the exiting
blocks anyways, so it seemed better to rewrite it to use those exiting
blocks to compute this property on-demand.

I also had to ditch a statistic, but it doesn't seem terribly valuable.

Differential Revision: https://reviews.llvm.org/D34049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306081 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 04:03:04 +00:00
Rafael Espindola 455f8b7cda Make the test a bit more strict. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306080 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 03:48:01 +00:00
Rafael Espindola d4771b8a21 COFF: handle "undef - ." expressions.
This is another thing that the ELF implementation can do but is
missing from COFF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306078 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 02:15:56 +00:00
Craig Topper 9c13e87ea8 [LVI] Teach LVI to reason about ORs of icmps similar to how it reasons about ANDs of icmps
Summary: LVI can reason about an AND of icmps on the true dest of a branch. I believe we can do similar for the false dest of ORs. This allows us to get the same answer for the demorganed versions of some of the AND test cases as you can see.

Reviewers: anna, reames

Reviewed By: reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34431

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306076 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 01:08:16 +00:00
Farhana Aleen c9d5a52ac1 Fixed a (product) build error that was due to an unused variable
Details: There was a use but it was in the assert which was not
         exercised during product build.

Reviewers: Andrew Kaylor

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 23:56:31 +00:00
Sanjay Patel ac12e1602f [x86] add/sub (X==0) --> sbb(cmp X, 1)
This is very similar to the transform in:
https://reviews.llvm.org/rL306040
...but in this case, we use cmp X, 1 to set the carry bit as needed.

Again, we can show that all of these are logically equivalent (although
InstCombine currently canonicalizes to a form not seen here), and if
we believe IACA, then this is the smallest/fastest code. Eg, with SNB:

| Num Of |              Ports pressure in cycles               |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |    |
---------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |    | cmp edi, 0x1
|   2    |           | 1.0 |           |           |     | 1.0 | CP | sbb eax, eax


The larger motivation is to clean up all select-of-constants combining/lowering 
because we're missing some common cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306072 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 23:47:15 +00:00
Andrew Kaylor c539eea7c6 Restrict the definition of loop preheader to avoid EH blocks
Differential Revision: https://reviews.llvm.org/D34487

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306070 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 23:27:16 +00:00
whitequark e4b1890fda Define behavior of "stack-probe-size" attribute when inlining.
Also document the attribute, since "probe-stack" already is.

Reviewed By: majnemer

Differential Revision: https://reviews.llvm.org/D34528

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 23:22:36 +00:00
Farhana Aleen e83d2eccef Supported lowerInterleavedStore() in X86InterleavedAccess.
Reviewers: RKSimon, DavidKreitzer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306068 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 22:59:04 +00:00
Eric Christopher e1ae008085 Remove the LoadCombine pass. It was never enabled and is unsupported.
Based on discussions with the author on mailing lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306067 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 22:58:12 +00:00
Sanjay Patel d6dbca43aa [x86] add more tests for select --> sbb transform; NFC
These are siblings of the tests added with r306032.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306064 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 22:17:05 +00:00
Rafael Espindola f2891bee47 Change creation of relative relocations on COFF.
For whatever reason, when processing

  .globl foo
foo:
  .data
bar:
  .long foo-bar

llvm-mc creates a relocation with the section:

0x0 IMAGE_REL_I386_REL32 .text

This is different than when the relocation is relative from the
beginning. For example, a file with

call foo

produces

0x0 IMAGE_REL_I386_REL32 foo

I would like to refactor the logic for converting "foo - ." into a
relative relocation so that it is shared with ELF. This is the first
step and just changes the coff implementation to match what ELF (and
COFF in the case of calls) does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306063 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:57:04 +00:00
Lang Hames a5245c1109 [ORC] Expose a typedef in RTDyldObjectLinkingLayer.
This should fix the failure on the polly bots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306062 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:54:26 +00:00
Kamil Rytarowski 14b319c4ea Fix modular build
Exclude header Support/Solaris/sys/regset.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306061 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:28:48 +00:00
Jacob Gravelle 3f3e2c4f63 [WebAssembly] WebAssemblyFastISel getelementptr variable index support
Summary:
Previously -fast-isel getelementptr would constant-fold non-constant i8
load/stores.

Reviewers: sunfish

Subscribers: jfb, dschuff, sbc100, llvm-commits

Differential Revision: https://reviews.llvm.org/D34044

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:26:08 +00:00
Krzysztof Parzyszek b03a7e10d5 [Hexagon] Properly update kill flags in HexagonNewValueJump
The feeder instruction will be moved to right before the compare, so
the updating code should not be looking for kills past the compare.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:11:44 +00:00
Lang Hames 08ef6db991 [ORC] Switch the object layer API from addObjectSet to addObject (singular), and
move the ObjectCache from the IRCompileLayer to SimpleCompiler.

This is the first in a series of patches aimed at cleaning up and improving the
robustness and performance of the ORC APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306058 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:06:54 +00:00
Reid Kleckner 130b76bf33 [MC] Allow assembling .secidx and .secrel32 for undefined symbols
There's nothing incorrect about emitting such relocations against
symbols defined in other objects. The code in EmitCOFFSec* was missing
the visitUsedExpr part of MCStreamer::EmitValueImpl, so these symbols
were not being registered with the object file assembler.

This will be used to make reduced test cases for LLD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306057 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 21:02:14 +00:00