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Commit Graph

84114 Commits

Author SHA1 Message Date
Filipe Cabecinhas
5f6abbdbfd Revert "Don't assert if materializing before seeing any function bodies"
This reverts r251667 since it broke the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-30 00:00:58 +00:00
Alexey Samsonov
ff7c978f81 [LLVMSymbolize] Move printing the description of a global into a separate function. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 23:49:19 +00:00
Filipe Cabecinhas
b0ed17be63 Don't assert if materializing before seeing any function bodies
This assert was reachable from user input. A minimized test case (no
FUNCTION_BLOCK_ID record) is attached.

Bug found with afl-fuzz

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251667 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 23:37:28 +00:00
Alexey Samsonov
32e078b09c [LLVMSymbolize] Move ModuleInfo into a separate class (SymbolizableModule).
Summary:
This is mostly NFC. It is a first step in cleaning up LLVMSymbolize
library. It removes "ModuleInfo" class which bundles together ObjectFile
and its debug info context in favor of:
  * abstract SymbolizableModule in public headers;
  * SymbolizableObjectFile subclass in implementation.

Additionally, SymbolizableObjectFile is now created via factory, so we
can properly detect object parsing error at this stage instead of keeping
the broken half-parsed object. As a next step, we would be able to
propagate the error all the way back to the library user.

Further improvements might include:
  * factoring out the logic of finding appropriate file with debug info
    for a given object file, and caching all parsed object files into a
    separate class [A].
  * factoring out DILineInfo rendering [B].
This would make what is now a heavyweight "LLVMSymbolizer" a relatively
straightforward class, that calls into [A] to turn filepath into a
SymbolizableModule, delegates actual symbolization to concrete SymbolizableModule
implementation, and lets [C] render the result.

Reviewers: dblaikie, echristo, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14099

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251662 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 22:21:37 +00:00
Simon Pilgrim
d63f887b3e [X86][SSE] Shuffle blends with zero
This patch generalizes the zeroing of vector elements with the BLEND instructions. Currently a zero vector will only blend if the shuffled elements are correctly inline, this patch recognises when a vector input is zero (or zeroable) and modifies a local copy of the shuffle mask to support a blend. As a zeroable vector input may not be all zeroes, the zeroable vector is regenerated if necessary.

Differential Revision: http://reviews.llvm.org/D14050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 22:11:28 +00:00
Lang Hames
154d0643db [Orc] Teach IndirectStubsManager to manage an expandable pool of stubs, rather
than a pre-allocated slab of stubs. Also add a convenience method for creating a
single stub, rather than a whole block a time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 22:04:22 +00:00
Dehao Chen
a22d78ef3b clang-format lib/Transforms/Utils/AddDiscriminators.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 21:25:33 +00:00
Chandler Carruth
6f27cebd4c [FunctionAttrs] Provide a single SCC node set to all of the
transformations in FunctionAttrs rather than building a new one each
time.

This isn't trivial because there are different heuristics from different
passes for exactly what set they want. The primary difference is whether
an *overridable* function completely disables the synthesis of
attributes. I've modeled this by directly testing for overridable, and
using the common set that excludes external and opt-none functions.

This does cause some changes by disabling more optimizations in the face
of opt-none. Specifically, we were still optimizing *calls* to opt-none
functions based on their attributes, just not the bodies. It seems
better to be conservative on both fronts given the intended semanticas
here (best effort to not assume or disturb anything). I've not tried to
test this change as it seems complex, brittle, and not important to the
implicit contract of opt-none. Instead, it seems more like a choice that
should be dictated by the simplified implementation and the change to be
acceptable differences within the space of opt-none.

A big benefit here is that these transformations no longer rely on the
legacy pass manager's SCC types, they just work on generic sets of
function pointers. This will make it easy to re-use their logic in the
new pass manager.

I've also made the transforms static functions instead of members where
trivial while I was touching the signatures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 18:29:15 +00:00
Jonas Paulsson
ea81d62d37 [SystemZ] Make the CCRegs regclass non-allocatable.
This was discovered to be necessary while running memchr-01.ll with
-verify-machinstrs, because it is not allowed to have a phys reg live
accross block boundaries while on SSA form, if the register is
allocatable (expect in entry block and landing pads).

In this test case, stringRRE pseudos are expanded after isel by adding
a loop block which produces a live out CC register. To make the test
pass, it was also necessary to not say that StringRRELoop pseudo uses
R0L, this is only true for the StringRRE opcode.

-verify-machineinstrs added to memchr-01.ll test.

New test case int-cmp-51.ll to test that MachineCSE can eliminate
an identical compare (which it couldn't do before).

Reviewed by Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 16:13:55 +00:00
Marek Olsak
40e7b16d54 AMDGPU/SI: handle undef for llvm.SI.packf16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251632 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 15:29:09 +00:00
Marek Olsak
595eb2bbd1 AMDGPU/SI: use S_OR for fneg (fabs f32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251631 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 15:29:05 +00:00
Marek Olsak
bbc32e3efd AMDGPU/SI: use S_AND for i1 trunc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 15:05:03 +00:00
Zoran Jovanovic
1a6d92e562 [mips] wrong opcode for ll/sc instructions on mipsr6 when -integrated-as is used
Summary:
This commit resolves wrong opcodes for ll and sc instructions for r6 architecutres, which were generated in method MipsTargetLowering::emitAtomicBinary.

Author: Jelena.Losic

Reviewers: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D13593


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251629 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 14:40:19 +00:00
Artyom Skrobov
775c498599 Recognize that ARM1176JZ[F]-S support TrustZone
Summary:
ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic
(the old name for SMC, as defined in ARMv6KZ) wasn't supported.

Reviewers: jmolloy, rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D14154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 13:56:19 +00:00
Adhemerval Zanella
741f26cf8e [sanitizer] [msan] Unify aarch64 mapping
This patch unify the 39-bit and 42-bit mapping for aarch64 to use only
one instrumentation algorithm.  This removes compiler flag 
SANITIZER_AARCH64_VMA requirement for MSAN on aarch64.

The mapping to use now is for 39 and 42-bits:

    0x00000000000ULL-0x01000000000ULL  MappingDesc::INVALID
    0x01000000000ULL-0x02000000000ULL  MappingDesc::SHADOW
    0x02000000000ULL-0x03000000000ULL  MappingDesc::ORIGIN
    0x03000000000ULL-0x04000000000ULL  MappingDesc::SHADOW
    0x04000000000ULL-0x05000000000ULL  MappingDesc::ORIGIN
    0x05000000000ULL-0x06000000000ULL  MappingDesc::APP
    0x06000000000ULL-0x07000000000ULL  MappingDesc::INVALID
    0x07000000000ULL-0x08000000000ULL  MappingDesc::APP

And only for 42-bits:

    0x08000000000ULL-0x09000000000ULL  MappingDesc::INVALID
    0x09000000000ULL-0x0A000000000ULL  MappingDesc::SHADOW
    0x0A000000000ULL-0x0B000000000ULL  MappingDesc::ORIGIN
    0x0B000000000ULL-0x0F000000000ULL  MappingDesc::INVALID
    0x0F000000000ULL-0x10000000000ULL  MappingDesc::APP
    0x10000000000ULL-0x11000000000ULL  MappingDesc::INVALID
    0x11000000000ULL-0x12000000000ULL  MappingDesc::APP
    0x12000000000ULL-0x17000000000ULL  MappingDesc::INVALID
    0x17000000000ULL-0x18000000000ULL  MappingDesc::SHADOW
    0x18000000000ULL-0x19000000000ULL  MappingDesc::ORIGIN
    0x19000000000ULL-0x20000000000ULL  MappingDesc::INVALID
    0x20000000000ULL-0x21000000000ULL  MappingDesc::APP
    0x21000000000ULL-0x26000000000ULL  MappingDesc::INVALID
    0x26000000000ULL-0x27000000000ULL  MappingDesc::SHADOW
    0x27000000000ULL-0x28000000000ULL  MappingDesc::ORIGIN
    0x28000000000ULL-0x29000000000ULL  MappingDesc::SHADOW
    0x29000000000ULL-0x2A000000000ULL  MappingDesc::ORIGIN
    0x2A000000000ULL-0x2B000000000ULL  MappingDesc::APP
    0x2B000000000ULL-0x2C000000000ULL  MappingDesc::INVALID
    0x2C000000000ULL-0x2D000000000ULL  MappingDesc::SHADOW
    0x2D000000000ULL-0x2E000000000ULL  MappingDesc::ORIGIN
    0x2E000000000ULL-0x2F000000000ULL  MappingDesc::APP
    0x2F000000000ULL-0x39000000000ULL  MappingDesc::INVALID
    0x39000000000ULL-0x3A000000000ULL  MappingDesc::SHADOW
    0x3A000000000ULL-0x3B000000000ULL  MappingDesc::ORIGIN
    0x3B000000000ULL-0x3C000000000ULL  MappingDesc::APP
    0x3C000000000ULL-0x3D000000000ULL  MappingDesc::INVALID
    0x3D000000000ULL-0x3E000000000ULL  MappingDesc::SHADOW
    0x3E000000000ULL-0x3F000000000ULL  MappingDesc::ORIGIN
    0x3F000000000ULL-0x40000000000ULL  MappingDesc::APP

And although complex it provides a better memory utilization that
previous one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251624 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 13:02:30 +00:00
Daniel Jasper
4da93a6599 Fix use-after-free. Thanks ASAN for giving me a detailed report :-).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251623 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 12:49:37 +00:00
Vasileios Kalintiris
8bbd2ffc7c [mips] Check the register class before replacing materializations of zero with $zero in microMIPS.
Summary:
The microMIPS register class GPRMM16 does not contain the $zero register.
However, MipsSEDAGToDAGISel::replaceUsesWithZeroReg() would replace uses
of the $dst register:

  [d]addiu, $dst, $zero, 0

with the $zero register, without checking for membership in the register
class of the target machine operand.

Reviewers: dsanders

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251622 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 10:17:16 +00:00
Jonas Paulsson
0b88d3e7ee [MachineVerifier] Analyze MachineMemOperands for mem-to-mem moves.
Since the verifier will give false reports if it incorrectly thinks MI is
loading or storing using an FI, it is necessary to scan memoperands and
find out how the FI is used in the instruction. This should be relatively
rare.

Needed to make CodeGen/SystemZ/spill-01.ll pass, which now runs with this flag.

Reviewed by Quentin Colombet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251620 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 08:28:35 +00:00
Cong Hou
e29e7e235a Revert the revision 251592 as it fails a test on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251617 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 05:35:22 +00:00
Matthias Braun
7b38ebfa47 Revert "ScheduleDAGInstrs: Remove IsPostRA flag"
It broke 3 arm testcases.

This reverts commit r251608.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251615 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 05:06:41 +00:00
Philip Reames
ebc1946bf4 Fix an unused variable warning which broke the clang-cmake-mips builder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251614 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 04:21:49 +00:00
JF Bastien
0c4ea613c4 [WebAssembly] Update opcode name format for conversions
Summary:
Conversion opcode name format should be f64.convert_u/i64 not f64_convert_u

Author: s3ththompson
Reviewers: jfb
Subscribers: sunfish, jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D14160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 04:10:52 +00:00
Xinliang David Li
bdd6759557 [PGO] Do not emit runtime hook user function for Linux
Clang driver now injects -u<hook_var> flag in the linker 
command line, in which case user function is not needed 
any more.

Differential Revision: http://reviews.llvm.org/D14033


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251612 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 04:08:31 +00:00
Matthias Braun
d5e91b2f9c MachineScheduler: Fix typo in debug message
Maybe I just missed the humor there ;-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:57:28 +00:00
Matthias Braun
986cc46049 ScheduleDAGInstrs: Remove IsPostRA flag
This was a layering violation in ScheduleDAGInstrs (and
MachineSchedulerBase) they both shouldn't know directly whether they are
used by the PostMachineScheduler or the MachineScheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251608 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:57:24 +00:00
Matthias Braun
6f23ba240a MachineScheduler: Use ranged for and slightly simplify the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:57:17 +00:00
Philip Reames
45ef74f29c [LVI/CVP] Teach LVI about range metadata
Somewhat shockingly for an analysis pass which is computing constant ranges, LVI did not understand the ranges provided by range metadata.

As part of this change, I included a change to CVP primarily because doing so made it much easier to write small self contained test cases. CVP was previously only handling the non-local operand case, but given that LVI can sometimes figure out information about instructions standalone, I don't see any reason to restrict this.  There could possibly be a compile time impact from this, but I suspect it should be minimal.  If anyone has an example which substaintially regresses, please let me know.  I could restrict the block local handling to ICmps feeding Terminator instructions if needed.  

Note that this patch continues a somewhat bad practice in LVI. In many cases, we know facts about values, and separate context sensitive facts about values. LVI makes no effort to distinguish and will frequently cache the same value fact repeatedly for different contexts. I would like to change this, but that's a large enough change that I want it to go in separately with clear documentation of what's changing. Other examples of this include the non-null handling, and arguments.

As a meta comment: the entire motivation of this change was being able to write smaller (aka reasonable sized) test cases for a future patch teaching LVI about select instructions.

Differential Revision: http://reviews.llvm.org/D13543



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251606 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:57:17 +00:00
Lang Hames
22bbdbd767 [Orc] Add support for RuntimeDyld::setProcessAllSections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251604 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:52:58 +00:00
Philip Reames
49a006cd8d [InstSimplify] sgt on i1s also encodes implication
Follow on to http://reviews.llvm.org/D13074, implementing something pointed out by Sanjoy. His truth table from his comment on that bug summarizes things well:
LHS | RHS | LHS >=s RHS | LHS implies RHS
0 | 0 | 1 (0 >= 0) | 1
0 | 1 | 1 (0 >= -1) | 1
1 | 0 | 0 (-1 >= 0) | 0
1 | 1 | 1 (-1 >= -1) | 1

The key point is that an "i1 1" is the value "-1", not "1".

Differential Revision: http://reviews.llvm.org/D13756



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251597 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:19:10 +00:00
Philip Reames
c9f72585e8 [SimplifyCFG] Constant fold a branch implied by it's incoming edge
The most common use case is when eliminating redundant range checks in an example like the following:
c = a[i+1] + a[i];

Note that all the smarts of the transform (the implication engine) is already in ValueTracking and is tested directly through InstructionSimplify.

Differential Revision: http://reviews.llvm.org/D13040



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251596 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 03:11:49 +00:00
Davide Italiano
12c4ab6c83 [SimplifyLibCalls] Factor out common unsafe-math checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 02:58:44 +00:00
Benjamin Kramer
348dec3280 Remove CRLF line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251594 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 02:33:05 +00:00
Cong Hou
72daf62570 Add a flag vectorizer-maximize-bandwidth in loop vectorizer to enable using larger vectorization factor.
To be able to maximize the bandwidth during vectorization, this patch provides a new flag vectorizer-maximize-bandwidth. When it is turned on, the vectorizer will determine the vectorization factor (VF) using the smallest instead of widest type in the loop. To avoid increasing register pressure too much, estimates of the register usage for different VFs are calculated so that we only choose a VF when its register usage doesn't exceed the number of available registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251592 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 01:28:44 +00:00
Hal Finkel
b93a3a1757 [PowerPC] Recurse through constants when looking for TLS globals
We cannot form ctr-based loops around function calls, including calls to
__tls_get_addr used for PIC TLS variables. References to such TLS variables,
however, might be buried within constant expressions, and so we need to search
the entire constant expression to be sure that no references to such TLS
variables exist.

Fixes PR25256, reported by Eric Schweitz. This is a slightly-modified version
of the patch suggested by Eric in the bug report, and a test case I created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 23:43:00 +00:00
Hal Finkel
75c3afbe05 [PowerPC] Don't return unsupported register classes for asm constraints
As a follow-up to r251566, do the same for the other optionally-supported
register classes (mostly for vector registers). Don't return an unavailable
register class (which would cause an assert later), but fail cleanly when
provided an unsupported inline asm constraint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 23:03:45 +00:00
Tim Northover
332db19551 ARM: add watchOS default version support function.
It's useful for Clang's Driver faff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:57:14 +00:00
Tim Northover
ed754ee4a7 ARM: add support for WatchOS's compact unwind information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:56:36 +00:00
Tim Northover
7b7ff9e152 ARM: teach backend about WatchOS and TvOS libcalls.
The most substantial changes are again for watchOS: libcalls are hard-float if
needed and sincos has a different calling convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251571 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:51:16 +00:00
Tim Northover
26541ec6e9 ARM: add backend support for the ABI used in WatchOS
At the LLVM level this ABI is essentially a minimal modification of AAPCS to
support 16-byte alignment for vector types and the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251570 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:46:43 +00:00
Tim Northover
856a038026 ARM: support .watchos_version_min and .tvos_version_min.
These MachO file directives are used by linkers and other tools to provide
compatibility information, much like the existing .ios_version_min and
.macosx_version_min.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251569 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:36:05 +00:00
Diego Novillo
bcb1df36b7 SamplePGO - Add flag to check sampling coverage.
This adds the flag -mllvm -sample-profile-check-coverage=N to the
SampleProfile pass. N is the percent of input sample records that the
user expects to apply.  If the pass does not use N% (or more) of the
sample records in the input, it emits a warning.

This is useful to detect some forms of stale profiles. If the code has
drifted enough from the original profile, there will be records that do
not match the IR anymore.

This will not detect cases where a sample profile record for line L is
referring to some other instructions that also used to be at line L.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251568 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:30:25 +00:00
Hal Finkel
16624bec2f [PowerPC] Cleanly reject asm crbit constraint with -crbits
When crbits are disabled, cleanly reject the constraint (return the register
class only to cause an assert later).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:25:52 +00:00
Hal Finkel
5b601e1cf0 Revert "r251451 - [AliasSetTracker] Use mod/ref information for UnknownInstr"
It looks like this broke the stage 2 builder:
  http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto/6989/

Original commit message:

AliasSetTracker does not need to convert the access mode to ModRefAccess if the
new visited UnknownInst has only 'REF' modrefinfo to existing pointers in the
sets.

Patch by Andrew Zhogin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251562 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:13:41 +00:00
Lang Hames
4198d74ec8 [Orc] Remove the 'takeOwnershipOfBuffers' kludge.
Keno Fischer fixed the underlying issue that necessitated this in r236341.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251560 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 22:10:27 +00:00
Sanjoy Das
adc5ad1c9d [SCEV] Compute max backedge count for loops with "shift ivs"
This teaches SCEV to compute //max// backedge taken counts for loops
like

    for (int i = k; i != 0; i >>>= 1)
      whatever();

SCEV yet cannot represent the exact backedge count for these loops, and
this patch does not change that.  This is really geared towards teaching
SCEV that loops like the above are *not* infinite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 21:27:14 +00:00
Sanjoy Das
ee37e50003 [JumpThreading] Use dominating conditions to prove implications
Summary:
If P branches to Q conditional on C and Q branches to R conditional on
C' and C => C' then the branch conditional on C' can be folded to an
unconditional branch.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251557 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 21:27:08 +00:00
Xinliang David Li
1e668490c0 [PGO] RawProf Reader code cleanup
Add a couple of helper methods to make the primary
raw profile reader interface's implementation more
readable. It also hides more format details. This
patch has no functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251546 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 19:34:04 +00:00
Cong Hou
76481a8326 [X86] A small fix in X86/X86TargetTransformInfo.cpp: check a value type is simple before calling getSimpleVT().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251538 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 18:15:46 +00:00
Igor Laevsky
5b6459c883 [AliasAnalysis] Take into account readnone attribute for the function arguments
Differential Revision: http://reviews.llvm.org/D13992



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 17:54:48 +00:00
JF Bastien
a2446f8d17 WebAssembly: disable some loop-idiom recognition
memset/memcpy aren't fully supported yet. We should invert this test
once they are supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251534 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-28 17:50:23 +00:00