Commit Graph

124270 Commits

Author SHA1 Message Date
Simon Pilgrim
626353404e [Utils] Updated shuffle fuzz script to generate more modern (valid) IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253821 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 16:04:32 +00:00
Krzysztof Parzyszek
d8d11cb07e Avoid dependency between TableGen and CodeGen
Duplicate a few common definitions between DFAPacketizer.cpp and
DFAPacketizerEmitter.cpp to avoid including files from CodeGen
in TableGen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 15:20:19 +00:00
Elena Demikhovsky
0e636e35e3 AVX-512: Optimized INSERT_SUBVECTOR for i1 vector types
ISERT_SUBVECTOR for i1 vectors may be done with shifts, when we insert into the lower part, or into the upper part, on into all-zero vector.
CONCAT_VECTORS uses ISERT_SUBVECTOR.

Differential Revision: http://reviews.llvm.org/D14815



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 13:57:38 +00:00
Xinliang David Li
416b0b1dd8 [PGO] move names of runtime sections definitions to InstrProfData.inc
In profile runtime implementation for Darwin, Linux and FreeBSD, the
names of sections holding profile control/counter/naming data need
to be known by the runtime in order to locate the start/end of the
data. Moving the name definitions to the common file to specify the
connection.






git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 05:42:31 +00:00
NAKAMURA Takumi
add2047b2c Temporary fix broken build.ninja after r253790.
FIXME: This can be reverted several hours later.

r253790 introduced cyclic deps around llvm-tblgen and it was affecting after reverting.

  ninja: error: dependency cycle: include/llvm/IR/Attributes.inc -> include/llvm/IR/Attributes.inc.tmp -> bin/llvm-tblgen -> utils/TableGen/CMakeFiles/obj.llvm-tblgen.dir/DFAPacketizerEmitter.cpp.o -> include/llvm/IR/Attributes.inc

It may be a ninja's bug.

FYI, renaming DFAPacketizerEmitter.cpp would be useless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253810 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 02:32:49 +00:00
Xinliang David Li
77b5e38161 [PGO] move raw magic and version def to InstrProfData.inc
These are shared definitions too. (NFC)





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 02:05:50 +00:00
Davide Italiano
e5dedf932d [llvm-rtdyld] Refactor to reduce indentation.
Suggested by: David Blaikie.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253808 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 01:58:33 +00:00
Xinliang David Li
085776b0a3 [PGO] InstrProf Template file documentation change
Add more complete description of the content and structure
of the template file. Made the comment in C style to be
shared by C runtime. Also enhance the file structure so
that it can included as standalone header for common 
definitions.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 01:51:31 +00:00
Xinliang David Li
6aa45fb3ac [PGO] Move Value Profile Kind to InstrProfData.inc
ValueProfKind value affects runtime data structure and
definition is shared between compiler-rt and LLVM.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 01:39:07 +00:00
Xinliang David Li
9b627286bc [PGO] Define value profiling updater API signature in InstrProfData.inc (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253805 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 00:22:07 +00:00
Rafael Espindola
a2197f8f51 Have a single way for creating unique value names.
We had two code paths. One would create names like "foo.1" and the other
names like "foo1".

For globals it is important to use "foo.1" to help C++ name demangling.
For locals there is no strong reason to go one way or the other so I
kept the most common mangling (foo1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 00:16:24 +00:00
Xinliang David Li
0e13c07553 [PGO] Move Raw Header def into template file InstrProfData.inc
To enable code sharing with compiler-rt (NFC)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 00:06:39 +00:00
Sanjay Patel
3688ae8632 fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-22 00:03:16 +00:00
Sanjoy Das
108f8f32b8 [SCEVExpander] Use C++isms; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 23:20:10 +00:00
Krzysztof Parzyszek
b08711cc55 Now fix errors in NDEBUG build.
Hope this won't break any hardware next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 22:46:52 +00:00
Krzysztof Parzyszek
b61ef9d5f3 Fix warnings in NDEBUG build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 22:19:50 +00:00
Teresa Johnson
f1f60632b0 [ThinLTO] Handle bitcode without function summary sections gracefully
Summary:
Several fixes to the handling of bitcode files without function summary
sections so that they are skipped during ThinLTO processing in llvm-lto
and the gold plugin when appropriate instead of aborting.

1 Don't assert when trying to add a FunctionInfo that doesn't have
  a summary attached.
2 Skip FunctionInfo structures that don't have attached function summary
  sections when trying to create the combined function summary.
3 In both llvm-lto and gold-plugin, check whether a bitcode file has
  a function summary section before trying to parse the index, and skip
  the bitcode file if it does not.
4 Fix hasFunctionSummaryInMemBuffer in BitcodeReader, which had a bug
  where we returned to early while looking for the summary section.

Also added llvm-lto and gold-plugin based tests for cases where we
don't have function summaries in the bitcode file. I verified that
either the first couple fixes described above are enough to avoid the
crashes, or fixes 1,3,4. But have combined them all here for added
robustness.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D14903

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 21:55:48 +00:00
Simon Pilgrim
ef8457f79e [MachineInstrBuilder] Support for adding a ConstantPoolIndex MO with an additional offset.
MachineInstrBuilder::addDisp can already add an immediate or global address MO with an adjusted offset, this patch adds support for constant pool indices as well.

All remaining MO types still assert - there are a number of other types that could support adjusted offsets but I have no test cases at this time.

Required to fix a regression in D13988 found by Mikael Holmén during stress testing (test case attached).

Differential Revision: http://reviews.llvm.org/D14867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 21:42:26 +00:00
Krzysztof Parzyszek
bf390b05bc Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
  - added "-debug-only dfa-emitter" support to llvm-tblgen

  - defined CVI_PIPE* resources for the V60 vector coprocessor

  - allow specification of multiple required resources
    - supports ANDs of ORs
    - e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
           (SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)

  - added support for combo resources
    - allows specifying ORs of ANDs
    - e.g. [CVI_XLSHF, CVI_MPY01] means:
           (CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)

  - increased DFA input size from 32-bit to 64-bit
    - allows for a maximum of 4 AND'ed terms of 16 resources

  - supported expressions now include:

    expression     => term [AND term] [AND term] [AND term]
    term           => resource [OR resource]*
    resource       => one_resource | combo_resource
    combo_resource => (one_resource [AND one_resource]*)

Author: Dan Palermo <dpalermo@codeaurora.org>

kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.

Reapply the previous patch, this time without circular dependencies.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 20:00:45 +00:00
Craig Topper
9ea618ed34 Use modulo operator instead of multiplying result of a divide and subtracting from the original dividend. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 17:44:42 +00:00
Krzysztof Parzyszek
a00b4f6e5d Revert r253790: it breaks all builds for some reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 17:38:33 +00:00
Krzysztof Parzyszek
c7fdae2400 Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
  - added "-debug-only dfa-emitter" support to llvm-tblgen

  - defined CVI_PIPE* resources for the V60 vector coprocessor

  - allow specification of multiple required resources
    - supports ANDs of ORs
    - e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
           (SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)

  - added support for combo resources
    - allows specifying ORs of ANDs
    - e.g. [CVI_XLSHF, CVI_MPY01] means:
           (CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)

  - increased DFA input size from 32-bit to 64-bit
    - allows for a maximum of 4 AND'ed terms of 16 resources

  - supported expressions now include:

    expression     => term [AND term] [AND term] [AND term]
    term           => resource [OR resource]*
    resource       => one_resource | combo_resource
    combo_resource => (one_resource [AND one_resource]*)

Author: Dan Palermo <dpalermo@codeaurora.org>

kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 17:23:52 +00:00
Sanjay Patel
0b4392ac91 use ternary ops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253787 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 16:51:19 +00:00
Sanjay Patel
56739f0051 remove unnecessary temp variables; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 16:37:09 +00:00
Sanjay Patel
8c4c988c9e fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 16:16:29 +00:00
Sanjay Patel
549121305a move a single test case to where most other instcombine shuffle bug test cases exist
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253784 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 16:12:58 +00:00
Simon Pilgrim
9ef65a89c3 [X86][SSE] Added SSE2 PSUBUS tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:57:22 +00:00
Simon Pilgrim
9ad4673878 [X86][SSE] Regenerate TRUNC-SEXT tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253782 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:32:29 +00:00
Simon Pilgrim
efd23fe50c [X86][SSE] Regenerate MINMAX tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253781 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:29:42 +00:00
Simon Pilgrim
096191ff6a [X86][SSE] Regenerate PSUBUS tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:25:50 +00:00
Jonas Paulsson
546611e398 [DAGCombiner] Bugfix for lost chain depenedency.
When MergeConsecutiveStores() combines two loads and two stores into
wider loads and stores, the chain users of both of the original loads
must be transfered to the new load, because it may be that a chain
user only depends on one of the loads.

New test case: test/CodeGen/SystemZ/dag-combine-01.ll

Reviewed by James Y Knight.

Bugzilla: https://llvm.org/bugs/show_bug.cgi?id=25310#c6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:25:07 +00:00
Simon Pilgrim
26398a7d87 [X86][AVX] Regenerate AVX splat tests
Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:23:14 +00:00
Simon Pilgrim
182b10a3d4 [X86][AVX512] Added AVX512 VMOVLHPS/VMOVHLPS shuffle decode comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 13:04:42 +00:00
Simon Pilgrim
1f6252f0b2 [X86][SSE] Legal XMM Register Class ordering for SSE1
It turns out we have a number of places that just grab the first type attached to a register class for various reasons. This is fine unless for some reason that type isn't legal on the current target, such as for SSE1 which doesn't support v16i8/v8i16/v4i32/v2i64 - all of which were included before 4f32 in the class.

Given that this is such a rare situation I've just re-ordered the types and placed the float types first.

Fix for PR16133

Differential Revision: http://reviews.llvm.org/D14787

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 12:38:34 +00:00
Sanjoy Das
0977d4d4df [docs] Minor fixes to the operand bundle section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253771 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 09:12:07 +00:00
Yaron Keren
0358673908 Unbreak build on OpenBSD by not adding -Wl,-z,defs to linker flags.
This is similar to the fix for FreeBSD in r226862. Without this patch,
the build aborts when linkling libLTO.so, complaining about undefined
references to assert2, cxa_atexit, etc.

Patch by Stefan Kempf!

http://reviews.llvm.org/D14236



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253769 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 06:33:54 +00:00
Weiming Zhao
0bf5b5cfb8 [SimplifyLibCalls] Removed some TODOs which are already implemented. NFC.
Summary:
D14302 implements tan(atan(x)) -> x
D14045 implements pow(exp(x), y) -> exp(x*y)

Patch by Mandeep Singh Grang <mgrang@codeaurora.org>

Reviewers: majnemer, davide

Differential Revision: http://reviews.llvm.org/D14882

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 06:10:20 +00:00
Davide Italiano
82d936682d [llvm-rtdyld] Fail early if we can't load dynamic libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253767 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 05:58:19 +00:00
Davide Italiano
9fed20c129 [llvm-rtdyld] Turn assertion into errors, it seems more appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253766 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 05:49:07 +00:00
Davide Italiano
87daa918a1 [llvm-rtdyld] Improve error handling, use Error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253765 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 05:44:41 +00:00
Teresa Johnson
798892661c Move new assert to correct location
This assert was meant to execute at the end of parseMetadata, but
we return early and never reach the end of the function. Caught
by a compile-time warning since the function doesn't return a value
from that location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253762 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 03:51:23 +00:00
Kostya Serebryany
45ac8bc6fc [libFuzzer] don't crash when reporting a leak in test_single_input mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 03:46:43 +00:00
Davide Italiano
ea83f226ac [llvm-rtdyld] Use report_fatal_error().
This is a first step towards saner/uniform error reporting in llvm-rtdyld.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 02:15:51 +00:00
Matthias Braun
ffed66f6ea ARMLoadStoreOptimizer: Cleanup isMemoryOp(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253757 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 02:09:49 +00:00
Teresa Johnson
9f474a019f llvm-link option and test for recent metadata mapping bug
Summary:
Add a -preserve-modules option to llvm-link that simulates LTO
clients that don't destroy modules as they are linked. This enables
reproduction of a recent bug introduced by a metadata linking change
that was only caught when the modules weren't destroyed before
writing bitcode (LTO on Windows).

See http://llvm.org/viewvc/llvm-project?view=revision&revision=253170
for more details on the original bug and the fix.

Confirmed the new test added here reproduces the failure using the new
option when I suppress the fix.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14818

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-21 00:35:38 +00:00
Vinicius Tinti
eb9a1dc069 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253737 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 23:20:12 +00:00
Davide Italiano
c25aec1117 [llvm-rtdyld] Message() is used only once. Inline. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 23:12:15 +00:00
Rong Xu
ba29cc35f8 Add some constantness to GetSuccessorNumber().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 23:02:06 +00:00
NAKAMURA Takumi
2bdcd86819 Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:55:34 +00:00
Eric Christopher
3b206a4729 Power8 and later support fusing addis/addi and addis/ld instruction
pairs that use the same register to execute as a single instruction.
No Functional Change

Patch by Kyle Butt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253724 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-20 22:38:20 +00:00