Commit Graph

81738 Commits

Author SHA1 Message Date
Dan Gohman
6c189ecbe6 Use the new Use-aware dominates method to apply the objc runtime
library return value optimization for phi uses. Even when the
phi itself is not dominated, the specific use may be dominated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 01:08:28 +00:00
Bill Wendling
aab3c0cb07 Code-gen may inject code into the IR before it emits the ASM. The linker
obviously cannot know that this code is present, let alone used. So prevent the
internalize pass from internalizing those global values which code-gen may
insert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154645 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 01:06:27 +00:00
Dan Gohman
511568dd1f Don't move objc_autorelease calls past autorelease pool boundaries when
optimizing autorelease calls on phi nodes with null operands.
This fixes rdar://11207070.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154642 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 00:59:57 +00:00
Dan Gohman
0120f7913f Def here is an Instruction, so !isa<Instruction>(Def) is always false,
as Eli noticed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154641 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 00:50:57 +00:00
Dan Gohman
558ece284c Add forms of dominates and isReachableFromEntry that accept a Use
directly instead of a user Instruction. This allows them to test
whether a def dominates a particular operand if the user instruction
is a PHI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154631 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 23:31:46 +00:00
Kevin Enderby
2a7d3a9373 Fix a few more places in the ARM disassembler so that branches get
symbolic operands added when using the C disassembler API.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 23:13:34 +00:00
Ted Kremenek
6bc572ce0e Update CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 22:15:23 +00:00
Evandro Menezes
cc8002a129 Hexagon: fix CMake error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:44:58 +00:00
Sirish Pande
2f69e4cf32 Disable Hexagon test temporarily.
There is an assert at line 558 in ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA).
This assert needs to addressed for post RA scheduler. Until that assert is addressed,
any passes that uses post ra scheduler will fail. So, I am temporarily disabling the
hexagon tests until that fix is in.

The assert is as follows:
    assert(!MI->isTerminator() && !MI->isLabel() &&
               "Cannot schedule terminators or labels!");

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154617 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:06:54 +00:00
Sirish Pande
d1a87a6806 HexagonPacketizer patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:06:38 +00:00
Preston Gurd
c68dda815e This patch improves the MCJIT runtime dynamic loader by adding new handling
of zero-initialized sections, virtual sections and common symbols
and preventing the loading of sections which are not required for
execution such as debug information.

Patch by Andy Kaylor!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154610 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 20:13:57 +00:00
Evan Cheng
f0bcecc0d5 Generalize r153635 to deal with TokenFactor chains; also clean up the logic and fix the tests. rdar://11069732, rdar://11236106
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 19:14:21 +00:00
Evandro Menezes
e5041e6fa8 Hexagon: enable assembler output through the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 17:55:53 +00:00
Anshuman Dasgupta
4b4795563c Add DFA generator for VLIW targets to ReleaseNotes.html and CREDITS.TXT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154590 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 15:17:35 +00:00
Benjamin Kramer
503a86b731 Remove README entry obsoleted by register masks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 12:47:29 +00:00
Jean-Daniel Dupas
0ce12d5a07 Remove a remaining reference to the obsolete C backend in configure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154587 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 12:02:39 +00:00
Craig Topper
bf596c9c61 Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 07:23:00 +00:00
Jim Grosbach
b54efe809f ARM 'adr' fixups don't need the interworking addend tweaking.
They reference the PC directly, so things work properly that way.

rdar://11231229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 01:19:35 +00:00
Akira Hatanaka
ed08489a71 Revert changes that were accidentally committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154563 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 23:19:55 +00:00
Akira Hatanaka
55e0e43e4f Fix string that is being checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 23:11:33 +00:00
Akira Hatanaka
1cc6333161 Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,
otherwise expand FNEG during legalization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:59:08 +00:00
Akira Hatanaka
c12a6e6b53 Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.
Invalid operation is signaled if the operand of these instructions is NaN.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:49:04 +00:00
Kevin Enderby
b318cc16c9 Fixed a case of ARM disassembly getting an assert on a bad encoding
of a VST instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:40:17 +00:00
Akira Hatanaka
056c51e598 Fix bugs in lowering of FCOPYSIGN nodes.
- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.

Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:13:04 +00:00
Jim Grosbach
2ce182c90c Remove incorrect comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154533 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 21:09:54 +00:00
Jim Grosbach
11fc6467e6 Tidy up. Remove hard tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154532 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 21:02:33 +00:00
Jim Grosbach
bf1aab1507 Tidy up. Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154531 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 21:02:30 +00:00
Benjamin Kramer
b4b9db2f92 Fix pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 20:20:37 +00:00
Chad Rosier
c9f27ee842 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154522 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 19:21:58 +00:00
Andrew Trick
ec14cd7ddc TableGen's regpressure: emit per-registerclass weight limits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154518 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 18:16:28 +00:00
Jim Grosbach
1835547ec1 ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
While there is an encoding for it in VUZP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11222366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154511 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 17:40:18 +00:00
Andrew Trick
5c1761d486 TableGen'd regpressure: register unit set pruning.
The pruning is more complete if it is not done incrementally. The code
is also a tad less convluted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154510 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 17:35:26 +00:00
Jim Grosbach
6073b30b05 ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
While there is an encoding for it in VZIP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11221911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 16:53:25 +00:00
Sylvestre Ledru
6fc30c26b7 Fix the build under Debian GNU/Hurd.
Thanks to Pino Toscano for the patch



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154500 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 15:35:36 +00:00
Benjamin Kramer
611afc0620 Cache the hash value of the operands in the MDNode.
FoldingSet is implemented as a chained hash table. When there is a hash
collision during insertion, which is common as we fill the table until a
load factor of 2.0 is hit, we walk the chained elements, comparing every
operand with the new element's operands. This can be very expensive if the
MDNode has many operands.

We sacrifice a word of space in MDNode to cache the full hash value, reducing
compares on collision to a minimum. MDNode grows from 28 to 32 bytes + operands
on x86. On x86_64 the new bits fit nicely into existing padding, not growing
the struct at all.

The actual speedup depends a lot on the test case and is typically between
1% and 2% for C++ code with clang -c -O0 -g.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154497 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 14:06:54 +00:00
Benjamin Kramer
f7c3e5f051 FoldingSet: Push the hash through FoldingSetTraits::Equals, so clients can use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154496 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 14:06:47 +00:00
Benjamin Kramer
7484920cf5 Compute hashes directly with hash_combine instead of taking a detour through FoldingSetNodeID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154495 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 14:06:39 +00:00
Nadav Rotem
91794872ce remove unused argument
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154494 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 11:05:21 +00:00
Duncan Sands
d6b7b8f49b Add a C binding to the Target and TargetMachine classes to allow for emitting
binary and assembly. Patch by Carlo Kok.  Emitting was inspired by but not based
on the D llvm bindings. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154493 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 10:25:24 +00:00
Chandler Carruth
d6fc26217e Add two statistics to help track how we are computing the inline cost.
Yea, 'NumCallerCallersAnalyzed' isn't a great name, suggestions welcome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154492 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 10:15:10 +00:00
Nadav Rotem
2e506198c8 Reapply 154397. Original message:
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 08:26:11 +00:00
Duncan Sands
21293ac192 Comment typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 08:13:47 +00:00
Evan Cheng
14b4c03580 Add more fused mul+add/sub patterns. rdar://10139676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 06:59:47 +00:00
Nadav Rotem
e611378a6e Reapply 154396 after fixing a test.
Original message:
Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.
blendV uses a register for the selection while Vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154483 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 06:40:27 +00:00
Evan Cheng
bee78fe5fc Clean up ARM fused multiply + add/sub support some more: rename some isel
predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?

rdar://10139676


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 05:33:07 +00:00
Craig Topper
7eb46d834c Fix an overly indented line. Remove an 'else' after an 'if' that returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 04:55:51 +00:00
Craig Topper
c42e640dc8 Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154478 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 04:34:11 +00:00
Andrew Trick
680363b5fd Tablegen'd regpressure: emit the weighted pressure limit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154477 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 04:31:33 +00:00
Andrew Trick
aa744e2c44 Table-generated register pressure fixes.
Handle mixing allocatable and unallocatable register gracefully.
Simplify the pruning of register unit sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 03:19:15 +00:00
Craig Topper
23de31b13b Optimize code a bit by calling push_back only once in some loops. Reduces compiled code size a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154473 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 03:06:35 +00:00