Commit Graph

98747 Commits

Author SHA1 Message Date
Kostya Serebryany
74041145bc [libFuzzer] experimental support for 'equivalance fuzzing'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292646 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 20:57:07 +00:00
Dan Gohman
0d4e33d211 [WebAssembly] Don't create bitcast-wrappers for varargs.
WebAssembly varargs functions use a significantly different ABI than
non-varargs functions, and the current code in
WebAssemblyFixFunctionBitcasts doesn't handle that difference. For now,
just avoid creating wrapper functions in the presence of varargs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292645 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 20:50:29 +00:00
Mehdi Amini
85b2e0b34b [ThinLTO] Fix lazy-loading of MDString instruction attachments
CFI is using intrinsics that takes MDString as arguments, and this
was broken during lazy-loading of metadata.

Differential Revision: https://reviews.llvm.org/D28916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292641 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 20:29:16 +00:00
Chris Bieneman
70ebae973c [DWARF] [ObjectYAML] Adding APIs for unittesting
Summary: This patch adds some new APIs to enable using the YAML DWARF representation in unit tests. The most basic new API is DWARFYAML::EmitDebugSections which converts a YAML string into a series of owned MemoryBuffer objects stored in a StringMap. The string map can then be used to construct a DWARFContext for parsing in place of an ObjectFile.

Reviewers: dblaikie, clayborg

Subscribers: mgorny, fhahn, jgosnell, aprantl, llvm-commits

Differential Revision: https://reviews.llvm.org/D28828

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292634 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 19:03:14 +00:00
Haicheng Wu
84ce155044 Recommit "[InlineCost] Use TTI to check if GEP is free." #3
This is the third attemp to recommit r292526.

The original summary:

Currently, a GEP is considered free only if its indices are all constant.
TTI::getGEPCost() can give target-specific more accurate analysis. TTI is
already used for the cost of many other instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292633 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 18:51:22 +00:00
Matthias Braun
cfdef7caf1 ARM: tLDR_postidx should be marked mayLoad
This fixes -verify-machineinstrs complaints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292629 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 18:30:28 +00:00
Simon Pilgrim
116ba1a31a [InstCombine][X86] Add MULDQ/MULUDQ undef handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292627 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 18:20:30 +00:00
Matthias Braun
37d2d7a126 AArch64LoadStoreOptimizer: Update kill flags when merging stores
Kill flags need to be updated correctly when moving stores up/down to
form store pair instructions.
Those invalid flags have been ignored before but as of r290014 they are
recognized when using -mllvm -verify-machineinstrs.

Also simplifies test/CodeGen/AArch64/ldst-opt-dbg-limit.mir, renames it
to ldst-opt.mir test and adds a new tests for this change.

Differential Revision: https://reviews.llvm.org/D28875

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292625 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 18:04:27 +00:00
Petar Jovanovic
eb2c5a958d [mips] Fix debug information for __thread variable
This patch fixes debug information for __thread variable on Mips
using .dtprelword and .dtpreldword directives.

Patch by Aleksandar Beserminji.

Differential Revision: http://reviews.llvm.org/D28770


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292624 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 17:53:30 +00:00
Eugene Zelenko
68c521d030 [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292623 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 17:52:16 +00:00
Wei Mi
0e0a42437b [RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
The recommit fixes a bug related with live interval update after the partial
redundent copy is moved.

The original patch is to solve the performance problem described in PR27827.
Register coalescing sometimes cannot remove a copy because of interference.
But if we can find a reverse copy in one of the predecessor block of the copy,
the copy is partially redundent and we may remove the copy partially by moving
it to the predecessor block without the reverse copy.

Differential Revision: https://reviews.llvm.org/D28585


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292621 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 17:38:54 +00:00
Haicheng Wu
d1af97c6c0 Revert "Recommit "[InlineCost] Use TTI to check if GEP is free." #2"
This reverts commit r292616 because the test case still has problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292618 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 16:52:22 +00:00
Haicheng Wu
bdcefb6024 Recommit "[InlineCost] Use TTI to check if GEP is free." #2
This is the second attemp to recommit r292526.

The original summary:

Currently, a GEP is considered free only if its indices are all constant.
TTI::getGEPCost() can give target-specific more accurate analysis. TTI is
already used for the cost of many other instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292616 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 16:36:34 +00:00
Simon Pilgrim
888319b41c Remove trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292613 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 15:15:59 +00:00
Simon Pilgrim
28ad0fea24 [CostModel][X86] Removed unused cost. NFCI.
SHL v8i32 is already handled in the SSE41 cost table

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292612 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 15:14:38 +00:00
Sjoerd Meijer
360cd34a82 [Thumb] Add support for tMUL in the compare instruction peephole optimizer.
We also want to optimise tests like this: return a*b == 0.  The MULS
instruction is flag setting, so we don't need the CMP instruction but can
instead branch on the result of the MULS. The generated instructions sequence
for this example was: MULS, MOVS, MOVS, CMP. The MOVS instruction load the
boolean values resulting from the select instruction, but these MOVS
instructions are flag setting and were thus preventing this optimisation. Now
we first reorder and move the MULS to before the CMP and generate sequence
MOVS, MOVS, MULS, CMP so that the optimisation could trigger. Reordering of the
MULS and MOVS is safe to do because the subsequent MOVS instructions just set
the CPSR register and don't use it, i.e. the CPSR is dead.

Differential Revision: https://reviews.llvm.org/D27990


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292608 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 13:10:12 +00:00
Benjamin Kramer
b7b123cc24 Pacify -Wreorder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292599 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 10:37:53 +00:00
Mehdi Amini
1d95ccd099 Add an assertion to PlaceholderQueue destructor, ensuring it has been flushed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292597 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 10:18:32 +00:00
Sam Kolton
1b647e664a [AMDGPU] Add subtarget features for SDWA/DPP
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28900

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292596 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 10:01:25 +00:00
Simon Pilgrim
87735961e4 [InstCombine][SSE] Add DemandedElts support for PACKSS/PACKUS instructions
Simplify a packss/packus truncation based on the elements of the mask that are actually demanded.

Differential Revision: https://reviews.llvm.org/D28777

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292591 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 09:28:21 +00:00
Chandler Carruth
017c62c41d [PM] Port LoopSink to the new pass manager.
Like several other loop passes (the vectorizer, etc) this pass doesn't
really fit the model of a loop pass. The critical distinction is that it
isn't intended to be pipelined together with other loop passes. I plan
to add some documentation to the loop pass manager to make this more
clear on that side.

LoopSink is also different because it doesn't really need a lot of the
infrastructure of our loop passes. For example, if there aren't loop
invariant instructions causing a preheader to exist, there is no need to
form a preheader. It also doesn't need LCSSA because this pass is
only involved in sinking invariant instructions from a preheader into
the loop, not reasoning about live-outs.

This allows some nice simplifications to the pass in the new PM where we
can directly walk the loops once without restructuring them.

Differential Revision: https://reviews.llvm.org/D28921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292589 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 08:42:19 +00:00
Chandler Carruth
7dc10faea0 [LoopSink] Trivial comment cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292588 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 08:42:14 +00:00
Diana Picus
0f6ded417f [ARM] Use helpers for adding pred / CC operands. NFC
Hunt down some of the places where we use bare addReg(0) or addImm(AL).addReg(0)
and replace with add(condCodeOp()) and add(predOps()). This should make it
easier to understand what those operands represent (without having to look at
the definition of the instruction that we're adding to).

Differential Revision: https://reviews.llvm.org/D27984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292587 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 08:15:24 +00:00
Daniel Berlin
a0431ff170 NewGVN: Fix PR 31682, an overactive assert.
Part of the assert has been left active for further debugging.
The other part has been turned into a stat for tracking for the
moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292583 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 06:38:41 +00:00
Matthias Braun
358aca9ca6 Revert "LiveRegUnits: Add accumulateBackward() function"
This seems to be breaking some bots.

This reverts commit r292543.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292574 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 03:58:42 +00:00
Saleem Abdulrasool
f2a3664b8a Revert "Demangle: only demangle mangled symbols"
This reverts SVN r286795.  This was incorrect the demangler is expected
to be able to demangle types as well as functions.  This makes the
behaviour of itaniumDemangle similar to __cxa_demangle once more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292573 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 03:54:04 +00:00
Haicheng Wu
035363ac91 Revert "Recommit "[InlineCost] Use TTI to check if GEP is free.""
This reverts commit r292570.  The test still has problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292572 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 03:40:41 +00:00
Haicheng Wu
9f9ec3cd24 Recommit "[InlineCost] Use TTI to check if GEP is free."
This recommits r292526 which is reverted in r292529 after fixing the test case.

The original summary:

Currently, a GEP is considered free only if its indices are all constant.
TTI::getGEPCost() can give target-specific more accurate analysis. TTI is
already used for the cost of many other instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292570 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 03:09:11 +00:00
Chandler Carruth
5067929193 [LoopInfo] Add helper methods to compute two useful orderings of the
loops in a function.

These are relatively confusing to talk about and compute correctly so it
seems really good to write down their implementation in one place. I've
replaced one place we needed this in the loop PM infrastructure and
I have another place in a pending patch that wants it.

We can't quite use this for the core loop PM walk because there we're
sometimes working on a sub-forest.

I'll add the expected unittests before committing this but wanted to
make sure folks were happy with these names / comments.

Credit goes to Richard Smith for the idea for naming the order where siblings
are in reverse program order but the tree traversal remains preorder.

Differential Revision: https://reviews.llvm.org/D28932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292569 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 02:41:20 +00:00
Ahmed Bougacha
51348febc6 [AArch64][GlobalISel] Widen scalar int->fp conversions.
It's incorrect to ignore the higher bits of the integer source.
Teach the legalizer how to widen it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292563 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 01:37:24 +00:00
Stanislav Mekhanoshin
f304f044ed [AMDGPU] Prevent spills before exec mask is restored
Inline spiller can decide to move a spill as early as possible in the basic block.
It will skip phis and label, but we also need to make sure it skips instructions
in the basic block prologue which restore exec mask.

Added isPositionLike callback in TargetInstrInfo to detect instructions which
shall be skipped in addition to common phis, labels etc.

Differential Revision: https://reviews.llvm.org/D27997

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292554 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:44:31 +00:00
Justin Bogner
91e5a47341 GlobalISel: Add a note about how we're being a bit loose with memory operands
The logic in r292461 is conservatively correct, but we should revisit
this later. Add a TODO so we don't forget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292553 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:30:17 +00:00
Ahmed Bougacha
cbd2ff78c0 [MIRParser] Allow generic register specification on operand.
This completes r292321 by adding support for generic registers, e.g.:

  %2:_(s32) = G_ADD %0, %1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292550 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:29:59 +00:00
Justin Bogner
09f3ac9e7b GlobalISel: Only set FailedISel on dropped dbg intrinsics when using fallback
It's easier to test the non-fallback path if we just drop these
intrinsics for now, like we did before we added the fallback path.
We'll obviously need to fix this properly, but the fixme for that is
already here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292547 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:24:30 +00:00
Anna Thomas
aaeaea1399 [AliasAnalysis] Fences do not modify constant memory location
Summary:
Fence instructions are currently marked as `ModRef` for all memory locations.

We can improve this for constant memory locations (such as constant globals),
since fence instructions cannot modify these locations.

This helps us to forward constant loads across fences (added test case in GVN).
There were no changes in behaviour for similar test cases in early-cse and licm.

Reviewers: dberlin, sanjoy, reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28914

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292546 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:21:33 +00:00
Justin Bogner
5527bcefd9 GlobalISel: Pass the MachineFunction in to reportSelectionError directly
Rather than trying to find MF based on the possibly-null MI we've
passed in here, just pass it in directly. It's already available at
all callers anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292544 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:16:19 +00:00
Matthias Braun
8e75c50b78 LiveRegUnits: Add accumulateBackward() function
This function can be used to accumulate the set of all read and modified
register in a sequence of instructions.

Use this code in AArch64A57FPLoadBalancing::scavengeRegister() to prove
the concept.

- The AArch64A57LoadBalancing code is using a backwards analysis now
  which is irrespective of kill flags. This is the main motivation for
  this change.

Differential Revision: http://reviews.llvm.org/D22082

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292543 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:16:17 +00:00
Matthias Braun
f91130f149 CodeGen: Add/Factor out LiveRegUnits class; NFCI
This is a set of register units intended to track register liveness, it
is similar in spirit to LivePhysRegs.
You can also think of this as the liveness tracking parts of the
RegisterScavenger factored out into an own class.

This was proposed in http://llvm.org/PR27609

Differential Revision: http://reviews.llvm.org/D21916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292542 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 00:16:14 +00:00
Tim Northover
dfbb55fc0c AArch64: fall back to DAG ISel for inline assembly.
We can't currently handle "calls" to inlineasm strings so it's better to let
the DAG handle it than generate rubbish.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292540 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:59:35 +00:00
Zachary Turner
4b9c663e5c Fix a few more build errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292538 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:44:14 +00:00
Zachary Turner
a84f886621 Fix incorrectly formed assert statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292537 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:41:11 +00:00
Zachary Turner
1efbd52b3e [pdb] Add HashTable data structure.
This was being parsed / serialized ad-hoc inside the code
for a specific PDB stream.  But this data structure is used
in multiple ways / places within the PDB format.  To be able
to re-use it we need to raise this code out and make it more
generic.  In doing so, a number of bugs are fixed in the
original implementation, and support is added for growing
the hash table and deleting items from the hash table,
which had either been omitted or incorrect implemented in
the initial version.

Differential Revision: https://reviews.llvm.org/D28715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292535 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:31:24 +00:00
Dehao Chen
3d22724c85 clang-format SampleProfile.cpp (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292533 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:20:31 +00:00
Peter Collingbourne
dc38a32106 LTO: Flush the resolution file after writing to it.
Without this the file could be truncated if the linker crashes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292532 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:10:14 +00:00
Davide Italiano
2037eb7f15 [SCCP] Teach the pass how to handle div with overdefined operands.
This can prove that:

extern int f;
int g() {
    int x = 0;
    for (int i = 0; i < 365; ++i) {
        x /= f;
    }
    return x;
}

always returns zero. Thanks to Sanjoy for confirming this
transformation actually made sense (bugs are mine).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292531 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 23:07:51 +00:00
Haicheng Wu
7fee81b86c Revert "[InlineCost] Use TTI to check if GEP is free."
This reverts commit r292526.  The test case has problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292529 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 22:51:03 +00:00
Simon Pilgrim
64f91a5757 [SelectionDAG] Improve knownbits handling of UMIN/UMAX (PR31293)
This patch improves the knownbits logic for unsigned integer min/max opcodes.

For UMIN we know that the result will have the maximum of the inputs' known leading zero bits in the result, similarly for UMAX the maximum of the inputs' leading one bits.

This is particularly useful for simplifying clamping patterns,. e.g. as SSE doesn't have a uitofp instruction we want to use sitofp instead where possible and for that we need to confirm that the top bit is not set.

Differential Revision: https://reviews.llvm.org/D28853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292528 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 22:41:22 +00:00
Haicheng Wu
363cf03aa6 [InlineCost] Use TTI to check if GEP is free.
Currently, a GEP is considered free only if its indices are all constant.
TTI::getGEPCost() can give target-specific more accurate analysis. TTI is
already used for the cost of many other instructions.

Differential Revision: https://reviews.llvm.org/D28693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292526 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 22:28:34 +00:00
Stanislav Mekhanoshin
b8fa7c40ea [AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse
This instruction is missing from LiveIntervals.
I'm not aware of any problems because of this though.

Differential Revision: https://reviews.llvm.org/D28879

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292521 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 21:26:22 +00:00
Kostya Serebryany
1829afedf8 [libFuzzer] ensure that entries in PersistentAutoDictionary are not empty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292520 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-19 21:14:47 +00:00