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199 Commits

Author SHA1 Message Date
Chad Rosier
530f7cefd3 Factor out an EmitCmp function that can be used by both SelectCmp and 
SelectBranch.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143072 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-26 22:47:55 +00:00
Chad Rosier
3a7572ff61 Add a few FIXME comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 22:54:23 +00:00
Bill Wendling
5bb779976a Switch over to using ARMConstantPoolConstant for global variables, functions, 
and block addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140936 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-01 08:00:54 +00:00
Jim Grosbach
4ebbf7b8a8 ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. 
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-30 00:50:06 +00:00
Jim Grosbach
b04546ff5b Tidy up a few 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:30:37 +00:00
Eli Friedman
4136d23c48 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:33:24 +00:00
Chad Rosier
dd1e7517b5 Fixup for functions that return a bool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138918 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 23:49:05 +00:00
Jim Grosbach
d04f6a581c [SU]XT[BH] are only available on ARMv6 and up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 20:53:08 +00:00
Jim Grosbach
c5a8c861c9 ARM extend instructions simplification. 
Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not
have an 'r' and an 'r_rot' version, but just a single version with a rotate
that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136225 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 16:47:19 +00:00
Evan Cheng
ee04a6d3a4 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:34:39 +00:00
Chris Lattner
db125cfaf5 land David Blaikie's patch to de-constify Type, with a few tweaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 04:54:35 +00:00
Evan Cheng
d5b03f252c Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 21:14:33 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-28 19:10:37 +00:00
Eric Christopher
471e422480 Add a parameter to CCState so that it can access the MachineFunction. 
No functional change.

Part of PR6965


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-08 23:55:35 +00:00
Eli Friedman
d6412c940e Add ARM fast-isel support for materializing the address of a global in cases where the global uses an indirect symbol. 
rdar://9431157



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-03 01:13:19 +00:00
Cameron Zwarich
c152aa6c86 Fix ARM fast isel to correctly flag memory operands to stores. This fixes 
-verify-machineinstrs failures on several tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132268 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-28 20:34:49 +00:00
Eli Friedman
a4d487fc1e Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 18:02:04 +00:00
Eli Friedman
76927d7303 Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 23:49:02 +00:00
Eli Friedman
783c66414a Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 19:09:45 +00:00
Jim Grosbach
0c72076190 Kill some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-16 22:24:07 +00:00
Eric Christopher
52f6c03a45 Apparently the check for direct calls is unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130716 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 20:16:33 +00:00
Eli Friedman
c573e2c7ea Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 22:48:03 +00:00
Eric Christopher
d94bc549fc Add FastEmitInst_ii for the arm fast isel generator. It doesn't use it, but 
if it ever did it needs the def machinery.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 22:07:50 +00:00
Eric Christopher
632ae892e6 Some cleanup and optimize fallthrough more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:56:31 +00:00
Eli Friedman
9ebf57ae13 Re-committing r130454, which does not in fact break anything. 
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:22:56 +00:00
Eric Christopher
bcf26aee86 Add trunc->branch support, this won't help with clang's i8->i1 truncations 
for bools, but is a start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 20:02:39 +00:00
Eric Christopher
6344a5f146 Update comments and checks to match reality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 00:07:20 +00:00
Eric Christopher
299bbb23a4 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130463 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 00:03:10 +00:00
Eli Friedman
6e6014cfb3 Revert r130454; apparently this doesn't actually work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:55:14 +00:00
Eli Friedman
2f7fcd7198 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. 
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:03:25 +00:00
Eric Christopher
7a20a37bac Be more layout aware here and swap the successor and branch condition 
if it means we get a fallthrough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130404 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 16:52:09 +00:00
Stuart Hastings
c5eecbc4ec Correct result when a branch condition is live across a block 
boundary.  <rdar://problem/8933028>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-16 03:31:26 +00:00
Jay Foad
562b84b3ae Don't include Operator.h from InstrTypes.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-11 09:35:34 +00:00
Eric Christopher
0435661582 Just use BL all the time. It's safer that way. 
Fixes rdar://9184526


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128869 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 00:39:26 +00:00
Cameron Zwarich
c0e6d780cd Add a ARM-specific SD node for VBSL so that forms with a constant first operand 
can be recognized. This fixes <rdar://problem/9183078>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128584 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-30 23:01:21 +00:00
Eric Christopher
7244d7cbce Migrate the fix in r128041 to ARM's fastisel support as well. 
Fixes rdar://9169640 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-22 19:39:17 +00:00
Eric Christopher
af3dce5149 Sometimes isPredicable lies to us and tells us we don't need the operands. 
Go ahead and add them on when we might want to use them and let
later passes remove them.

Fixes rdar://9118569


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-12 01:09:29 +00:00
Eric Christopher
872f4a2247 Only use blx for external function calls on thumb, these could be fixed 
up by the dynamic linker, but it's better to use the correct instruction
to begin with.

Fixes rdar://9011034


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126176 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 01:37:10 +00:00
Eric Christopher
4a2b316762 Use the incoming VT not the VT of where we're trying to store to determine 
if we can store a value. Also, the exclusion is or, not and.

Fixes rdar://8920247.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124357 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-27 05:44:56 +00:00
Jeffrey Yasskin
955ed73d12 Remove unused variables found by gcc-4.6's -Wunused-but-set-variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 00:51:23 +00:00
Evan Cheng
5de5d4b6d0 Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 
movw    r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
        movt    r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
LPC0_0:
        add     r0, pc, r0

It's not yet enabled by default as some tests are failing. I suspect bugs in
down stream tools.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-17 08:03:18 +00:00
Chris Lattner
54c6d6f42d fix some -Wself-assign warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122893 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-05 18:41:05 +00:00
Eric Christopher
c19aadb8b0 Arm and thumb call instructions are also in different orders. 
Fixes rdar://8782223


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122313 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-21 03:50:43 +00:00
Eric Christopher
836c6245ad Don't handle -arm-long-calls in fast isel for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121919 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 23:47:29 +00:00
Eric Christopher
564857f776 Refactor load/store handling again. Simplify and make some room for 
reg+reg handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 01:40:24 +00:00
Eric Christopher
06a86da323 Noticed this on inspection, fix and update some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 19:14:07 +00:00
Eric Christopher
7bb5996e47 Update fastisel for the changes in r120272. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120324 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 21:56:23 +00:00
Wesley Peck
bf17cfa3f9 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 03:31:01 +00:00
Eric Christopher
827656dab4 Rewrite address handling to use a structure with all the possible address 
mode variables. Handle frame indexes in load/store and allocas again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 22:38:27 +00:00
Eric Christopher
13df1a0bac STRH only needs the additional operand, not t2STRH. Also invert conditional 
to match the one from the load emitter above.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 22:01:38 +00:00