Commit Graph

6162 Commits

Author SHA1 Message Date
Chris Lattner
7b4e478768 remove two unused instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:44:13 +00:00
Evan Cheng
da08d2c39a Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24 08:36:10 +00:00
Jim Laskey
89d67faf30 Add and sort "sections" in debug lines. This always stepping through
code in sections other than ".text", including weak sections like ctors and
dtors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-23 12:51:53 +00:00
Evan Cheng
74cb064a35 Eliminate unneeded parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-22 00:02:55 +00:00
Evan Cheng
22f71315df variable_ops instructions such as call can have any number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 23:37:07 +00:00
Andrew Lenharth
df97cc67a6 Add memory operand and int regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 15:42:36 +00:00
Andrew Lenharth
1725599574 inline asm, at least for floats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 13:37:27 +00:00
Andrew Lenharth
d1aab35d1a fix argument problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 01:00:43 +00:00
Chris Lattner
ef95710583 Correct returns of 64-bit values, though they seemed to work before...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d Make these predicates correct in 64-bit mode too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d remove unused flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165 add some logical ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486 remove some unused patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027 Add some more immediate patterns. This allows us to compile:
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
set, so disable the pattern in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a Add some 64-bit logical ops.
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:34:10 +00:00
Evan Cheng
e3db4daa16 __i386__, __i386, etc. are not defined for x86-64. Use __x86_64__.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:11:12 +00:00
Chris Lattner
dd58343857 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10 Add some patterns for globals, so we can now compile this:
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007 Remove some now-unneeded casts from instruction patterns. With the casts
removed, tblgen produces identical output to with them in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7 Add some patterns for ppc64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce Remove some ugly now-redundant casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c Fix some mismatched type constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e Minor clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08 initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f A new entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000 Later models likely to have Yonah like attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22 Remove ctor with each piece specifyable (which causes overload ambiguities),
add a new init method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions,
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059 Add a note that Nate noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661 1. Support standard dwarf format (was bootstrapping in Apple format.)
2. Add vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7 Vector extract / insert index operand should have ptr type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc Type of vector extract / insert index operand should be iPTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302 X86 call instructions can take variable number of operands. Parameters of
vector types are passed via XMM registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201 Add argument registers to the end of call operand list (partial fix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5 Place dwarf headers at earliest possible point. Well behaved when skipping
functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c I am sure I had commited this workaround before. Perhaps soon I should sort it all out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 20:34:47 +00:00