Commit Graph

82164 Commits

Author SHA1 Message Date
Bill Wendling
7c4ce30ea6 Change the PassManager from a reference to a pointer.
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 08:27:43 +00:00
Craig Topper
c80e7d2ea4 Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 07:10:32 +00:00
Eli Bendersky
d98c9e918c RuntimeDyld code cleanup:
- There's no point having a different type for the local and global symbol
  tables.
- Renamed SymbolTable to GlobalSymbolTable to clarify the intention
- Improved const correctness where relevant



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 06:58:59 +00:00
Craig Topper
e499cdf10c Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify Bulldozer feature list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 06:54:48 +00:00
Craig Topper
ff72e74d34 Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 06:34:01 +00:00
Eli Bendersky
f8b30f9d16 Removed examples of stack frame inspection which no longer work for old JIT.
Added an example of MCJIT-based debugging.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155895 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 06:15:40 +00:00
Craig Topper
e106d2e2ac Make XOP imply AVX as its needed to legalize the registers types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 05:41:41 +00:00
Craig Topper
c49c6e154a Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES and HasCLMUL predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155890 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 05:35:02 +00:00
Craig Topper
da1a984159 Make CLMUL and AES imply SSE2 since its needed to legalize the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 05:28:32 +00:00
Craig Topper
ed39ac5026 Enable AVX and FMA4 for AMD Bulldozer processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 05:18:13 +00:00
Nick Lewycky
4056a73638 An instruction in a loop is not guaranteed to be executed just because the loop
has no exit blocks. Fixes PR12706!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 04:03:01 +00:00
Lang Hames
973f72a29a Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. Fixes
<rdar://problem/11291436>.

This is a second attempt at a fix for this, the first was r155468. Thanks
to Chandler, Bob and others for the feedback that helped me improve this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01 00:20:38 +00:00
Jakub Staszak
39379c5df3 Add some constantness. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 23:41:30 +00:00
Manman Ren
16a76519a5 X86: optimization for -(x != 0)
This patch will optimize -(x != 0) on X86
FROM 
cmpl	$0x01,%edi
sbbl	%eax,%eax
notl	%eax
TO
negl %edi
sbbl %eax %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 22:51:25 +00:00
Jim Grosbach
7a3afa91ad ARM: Diagnostics for out of range fixups.
Replace some assert() calls w/ actual diagnostics. In a perfect world,
there'd be range checks on these values long before things ever reached
this code. For now, though, issuing a better-late-than-never diagnostic
is still a big improvement over assert().

rdar://11347287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 22:30:43 +00:00
Jakob Stoklund Olesen
887d095fb6 Fix address calculation error from r155744.
This was exposed by SingleSource/UnitTests/Vector/constpool.c.

The computed size of a basic block isn't always a multiple of its known
alignment, and that can introduce extra alignment padding after the
block.

<rdar://problem/11347135>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155845 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 20:19:00 +00:00
Sebastian Pop
e4f1b370bf fix typo
Thanks to "Gabor Greif" <ggreif@gmail.com> for reporting this problem.

The configure flag should be --with-default-sysroot as documented, and
not --with-sysroot.  The reason we don't want to define --with-sysroot
is that GCC has a configure flag by that name and it has a different
semantics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155844 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 20:06:58 +00:00
Manman Ren
1701105022 test/CodeGen/X86/select.ll: remove spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 18:54:27 +00:00
Chad Rosier
238ae31aa3 Tidy up. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 17:47:15 +00:00
Derek Schuff
ddc693bd22 Fix fastcc structure return with fast-isel on x86-32
On x86-32, structure return via sret lets the callee pop the hidden
pointer argument off the stack, which the caller then re-pushes.
However if the calling convention is fastcc, then a register is used
instead, and the caller should not adjust the stack. This is
implemented with a check of IsTailCallConvention
X86TargetLowering::LowerCall but is now checked properly in
X86FastISel::DoSelectCall.

(this time, actually commit what was reviewed!)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 16:57:15 +00:00
Bob Wilson
ff73d8fef9 Don't introduce illegal types when creating vmull operations. <rdar://11324364>
ARM BUILD_VECTORs created after type legalization cannot use i8 or i16
operands, since those types are not legal.  Instead use i32 operands, which
will be implicitly truncated by the BUILD_VECTOR to match the element type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 16:53:34 +00:00
Eli Bendersky
37bc5a2000 It doesn't make sense to move symbol relocations to section relocations when
relocations are resolved.  It's much more reasonable to do this decision when
relocations are just being added - we have all the information at that point.

Also a bit of renaming and extra comments to clarify extensions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155819 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 12:15:58 +00:00
Duncan Sands
5ff30e70f8 Just mark the sign bit as known zero, rather than any other irrelevant bits
known zero in the LHS.  Fixes PR12541.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 11:56:58 +00:00
Bill Wendling
bfbab99b58 Second attempt at PR12573:
Allow the "SplitCriticalEdge" function to split the edge to a landing pad. If
the pass is *sure* that it thinks it knows what it's doing, then it may go ahead
and specify that the landing pad can have its critical edge split. The loop
unswitch pass is one of these passes. It will split the critical edges of all
edges coming from a loop to a landing pad not within the loop. Doing so will
retain important loop analysis information, such as loop simplify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 10:44:54 +00:00
Bill Wendling
38da2a8cc1 Use an ArrayRef instead of explicit vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155816 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 10:25:51 +00:00
Eli Bendersky
6d15e87177 Code cleanup in RuntimeDyld:
- Add comments
- Change field names to be more reasonable
- Fix indentation and naming to conform to coding conventions
- Remove unnecessary includes / replace them by forward declatations



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 10:06:27 +00:00
Bill Wendling
6aa33274ed Remove hack from r154987. The problem persists even with it, so it's not even a good hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 09:23:48 +00:00
Craig Topper
7d1e3dcf71 No need to normalize index before calling Extract128BitVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155811 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 05:17:10 +00:00
Pete Cooper
6942f706aa Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT emitter. Needs some major refactoring as these two code emitters are almost identical
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155810 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 03:56:44 +00:00
Rafael Espindola
9719cf329b Make sure HoistInsertPosition finds a position that is dominated by all
inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-30 03:53:06 +00:00
Jakub Staszak
6610b1db55 Remove unneeded casts. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:52:53 +00:00
Craig Topper
7988981990 Remove superfluous 'inline'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:27:47 +00:00
Craig Topper
d77d2feb7a Simplify code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:22:05 +00:00
Kalle Raiskila
a04fe83378 Update the documentation of CellSPU, in case it gets removed in 3.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 20:00:55 +00:00
Benjamin Kramer
2b8d0501b1 RegisterPressure: ArrayRefize some functions for better readability. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 18:52:56 +00:00
Eli Bendersky
5fe019835c Fix some formatting, grammar and style issues and add a couple of missing comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 12:40:47 +00:00
Eli Bendersky
30183bf042 Remove redundant line (the memory manager is set above to the same object
if !ForceInterpreteri). It has no effect (apart from a memory leak...)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155792 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 11:14:59 +00:00
Benjamin Kramer
3703baacf5 SmallVector: Don't rely on having an assignment operator around in push_back for POD-like types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155791 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 10:53:29 +00:00
Eli Bendersky
bbd8e5d79a Fix comments from copy-paste to a more relevant meaning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155790 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 10:26:26 +00:00
Craig Topper
db0bbdea47 Add constants for first and last integer vector types to be consistent with floating point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 07:25:46 +00:00
Craig Topper
c7f7a9ba79 Remove tab characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 07:07:36 +00:00
Craig Topper
9efb030911 Mark the default cases of MVT::getVectorElementType and MVT:getVectorNumElements as unreachable to reduce code size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155785 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-29 07:06:58 +00:00
Jakob Stoklund Olesen
ff11c01853 Don't update spill weights when joining intervals.
We don't compute spill weights until after coalescing anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155766 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 19:19:11 +00:00
Jakob Stoklund Olesen
f4aee4c50e Spring cleaning - Delete dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 19:19:07 +00:00
Benjamin Kramer
18883037a9 If the __is_trivially_copyable type trait is available use it as the baseline for isPodLike.
This way we can enable the POD-like class optimization for a lot more classes,
saving ~120k of code in clang/i386/Release+Asserts when selfhosting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 16:22:31 +00:00
Benjamin Kramer
1dd346ad05 Use the most basic superclass of SmallVector in ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155760 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 16:22:26 +00:00
Jakob Stoklund Olesen
9b10dae0bf Fix a problem with blocks that need to be split twice.
The code could search past the end of the basic block when there was
already a constant pool entry after the block.

Test case with giant basic block in SingleSource/UnitTests/Vector/constpool.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 06:21:38 +00:00
Andrew Trick
2674a4acdb Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.
This time, also fix the caller of AddGlue to properly handle
incomplete chains. AddGlue had failure modes, but shamefully hid them
from its caller. It's luck ran out.

Fixes rdar://11314175: BuildSchedUnits assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-28 01:03:23 +00:00
Jim Grosbach
a9cc08f24f ARM: Thumb add(sp plus register) asm constraints.
Make sure when parsing the Thumb1 sp+register ADD instruction that
the source and destination operands match. In thumb2, just use the
wide encoding if they don't. In Thumb1, issue a diagnostic.

rdar://11219154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155748 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 23:51:36 +00:00
Jim Grosbach
bb32f1d545 ARM: Tweak tADDrSP definition for consistent operand order.
Make the operand order of the instruction match that of the asm syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 23:51:33 +00:00