156880 Commits

Author SHA1 Message Date
Igor Laevsky
7de5f26dcd [llvm-opt-fuzzer] NFC. Add sanity tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318293 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 12:36:57 +00:00
Momchil Velikov
29a99e3278 [ARM] Split Arm jump table branch into i12 and rs suffixed versions
This is a refactoring/cleanup of Arm `addrmode2` operand class. The patch
removes it completely.

Differential Revision: https://reviews.llvm.org/D39832



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318291 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 12:02:55 +00:00
Jonas Devlieghere
4dac35da72 [DebugInfo] Fix potential CU mismatch for SubprogramScopeDIEs.
In constructAbstractSubprogramScopeDIE there can be a potential mismatch
between `this` and the CU of ContextDIE when a scope is shared between
two DISubprograms belonging to a different CU. In that case, `this` is
the CU that was specified in the IR, but the CU of ContextDIE is that of
the first subprogram that was emitted. This patch fixes the mismatch by
looking up the CU of ContextDIE, and switching to use that.

This fixes PR35212 (https://bugs.llvm.org/show_bug.cgi?id=35212)

Patch by Philip Craig!

Differential revision: https://reviews.llvm.org/D39981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318289 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 10:57:05 +00:00
Ilya Biryukov
571bd4540f Workaround CodeGen/WebAssembly/cfg-stackify.ll failure after r318202
By disabling the introduced optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318288 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 10:50:43 +00:00
Mikael Holmen
c14b5c3b1e [Lint] Don't warn about passing alloca'd value to tail call if using byval
Summary:
This fixes PR35241.

When using byval, the data is effectively copied as part of the call
anyway, so the pointer returned by the alloca will not be leaked to the
callee and thus there is no reason to issue a warning.

Reviewers: rnk

Reviewed By: rnk

Subscribers: Ka-Ka, llvm-commits

Differential Revision: https://reviews.llvm.org/D40009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318279 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:46:48 +00:00
Craig Topper
8aebe5139f [X86] Redefine the 128-bit version of VPGATHERQD and VGATHERQPS to use a VK2 mask instead of a VK4 mask.
This allows us to remove extra extend creation during lowering and more accurately reflects the semantics of the instruction.

While there add an extra output VT to X86 masked gather node to better match the isel pattern predicate. Currently we're exploiting the fact that the isel table doesn't count how many output results a node actually has if the result type of any can be inferred from the first result and the type constraints defined in tablegen. I think we might ultimately want to lower all MGATHER/MSCATTER to an X86ISD node with the extra mask result and stop relying on this hole in the isel checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318278 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:46:43 +00:00
NAKAMURA Takumi
adf7d53473 GISelWorkList.h: Fix -fmodules build in rL318210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318275 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:34:35 +00:00
NAKAMURA Takumi
45ed11f7a6 Fix llvm/test/Transforms/LoopRotate/pr35210.ll in rL318237, it uses debug options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318273 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:46:58 +00:00
Fangrui Song
0b5d88f3e0 NFC Remove default argument of DataLayout::getPointerABIAlignment
Differential Revision: https://reviews.llvm.org/D40005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:17:32 +00:00
Craig Topper
c2f0e01cab [X86] Add getHostCPUName support for the Gemini Lake model number which also uses Goldmont.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318271 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:02:43 +00:00
Craig Topper
c2076189ef [X86] Add getHostCPUName support for cannonlake.
This adds an explicit model number check and fallback path to the unknown family 6 detection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318270 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:02:42 +00:00
Craig Topper
0612ed0350 [InstCombine] Simplify binops that are only used by a select and are fed by a select with the same condition.
Summary:
This patch optimizes a binop sandwiched between 2 selects with the same condition. Since we know its only used by the select we can propagate the appropriate input value from the earlier select.

As I'm writing this I realize I may need to avoid doing this for division in case the select was protecting a divide by zero?

Reviewers: spatel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318267 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 05:23:02 +00:00
Hiroshi Inoue
cd69cc5db2 [PowerPC] fix up in redundant compare elimination
This patch fixes a potential problem in my previous commit (https://reviews.llvm.org/rL312514) by introducing an additional check.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 04:23:26 +00:00
Vedant Kumar
4aef6b8206 [docs] Document a way to simplify names in bugpoint output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318257 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 02:58:45 +00:00
Matt Arsenault
3f38dad8a7 AMDGPU: Add separate definitions for DS insts without m0 use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318246 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 01:34:06 +00:00
Craig Topper
f004f4147f [X86] Correct the spelling of pentiumpro in X86TargetParser.def
Thanks to Erich Keane for spotting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318243 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 01:01:50 +00:00
Matt Arsenault
bc9fb908bc AMDGPU: Don't use MUBUF vaddr if address may overflow
Effectively revert r263964. Before we would not
allow this if vaddr was not known to be positive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318240 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:45:43 +00:00
Hans Wennborg
2c21c88a19 Revert r318193 "[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops."
It crashes building sqlite; see reply on the llvm-commits thread.

> [SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.
>
>         Patch tries to improve vectorization of the following code:
>
>         void add1(int * __restrict dst, const int * __restrict src) {
>           *dst++ = *src++;
>           *dst++ = *src++ + 1;
>           *dst++ = *src++ + 2;
>           *dst++ = *src++ + 3;
>         }
>         Allows to vectorize even if the very first operation is not a binary add, but just a load.
>
>         Fixed issues related to previous commit.
>
>         Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev
>
>         Reviewed By: ABataev, RKSimon
>
>         Subscribers: llvm-commits, RKSimon
>
>         Differential Revision: https://reviews.llvm.org/D28907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318239 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:38:13 +00:00
Mitch Phillips
592aa29380 [cfi-verify] Validate there are no register clobbers between CFI-check and instruction execution.
Summary:
This patch adds another failure mode for `validateCFIProtection(..)`, wherein any register that affects the indirect control flow instruction is clobbered to between the CFI-check and the instruction's execution.

Also includes a modification to make MCInstrDesc::hasDefOfPhysReg public.

Reviewers: vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, pcc, kcc

Differential Revision: https://reviews.llvm.org/D39820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:35:26 +00:00
Craig Topper
7e9abd2530 [LoopRotate] processLoop should return true even if it just simplified the loop latch without making any other changes
Simplifying a loop latch changes the IR and we need to make sure the pass manager knows to invalidate analysis passes if that happened.

PR35210 discovered a case where we failed to invalidate the post dominator tree after this simplification because we no changes other than simplifying the loop latch.

Fixes PR35210.

Differential Revision: https://reviews.llvm.org/D40035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318237 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:22:42 +00:00
Evgeniy Stepanov
eace9e3d8d [asan] Prevent rematerialization of &__asan_shadow.
Summary:
In the mode when ASan shadow base is computed as the address of an
external global (__asan_shadow, currently on android/arm32 only),
regalloc prefers to rematerialize this value to save register spills.
Even in -Os. On arm32 it is rather expensive (2 loads + 1 constant
pool entry).

This changes adds an inline asm in the function prologue to suppress
this behavior. It reduces AsanTest binary size by 7%.

Reviewers: pcc, vitalybuka

Subscribers: aemerson, kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318235 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:11:51 +00:00
Vedant Kumar
6183484a21 [PGO] Bump the indexed profile format version
Differential Revision: https://reviews.llvm.org/D39447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:56:48 +00:00
Petr Hosek
cace43159e [CMake][runtimes] Don't process common options in runtimes build
This is no longer needed for any of the runtimes build and it breaks
in case we don't have the working compiler yet, e.g. when building
a compiler that uses compiler-rt and libc++ as a default runtime,
because these common options check whether these are available.

Differential Revision: https://reviews.llvm.org/D39932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318227 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:56:05 +00:00
Craig Topper
c8d2a1deb9 [X86] Fix the parameter order in the default implementation of X86_VENDOR macro in X86TargetParser.def
The default implementation doesn't do anything so the order doesn't matter, but good for cleanliness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318226 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:54:28 +00:00
Petr Hosek
6dc7825247 [CMake][runtimes] Set compiler as working even for default target
Even when building builtins and runtimes for the default target
we shouldn't assume that the just built compiler is already useable.
When the compiler uses compiler-rt and libc++ as the default runtime
and C++ library, it won't be usable until we finish building runtimes.

Differential Revision: https://reviews.llvm.org/D39715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:47:20 +00:00
Matt Arsenault
b56431e4c8 AMDGPU: Handle or in multi-use shl ptr combine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:46:42 +00:00
Hans Wennborg
4e63091c66 Fix switch-lower-peel-top-case.ll isel pass is not registered error
The test was doing -stop-after=isel, but that pass is actually the
AMDGPUDAGToDAGISel pass, which might not be built when targeting x86_64.
This changes the test to -stop-after=expand-isel-pseudos instead.

Follow-up to r318202.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318220 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:30:28 +00:00
Davide Italiano
eaa439c25a [EntryExitInstrumenter] Placate GCC, the semicolon is redundant. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:13:38 +00:00
Tim Renouf
5ba2ceb8b2 [AMDGPU] updated PAL metadata record keys
Summary: The ABI changed before specification was finalized.

Reviewers: kzhuravl, dstuttard

Subscribers: wdng, nhaehnle, yaxunl, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D39807

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318213 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:05:36 +00:00
Sanjay Patel
f0a5fc94f0 [Reassociate] use dyn_cast instead of isa+cast; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318212 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:03:56 +00:00
Mitch Phillips
9300d72534 [cfi-verify] Add DOT graph printing for GraphResult objects.
Allows users to view GraphResult objects in a DOT directed-graph format. This feature can be turned on through the --print-graphs flag.

Also enabled pretty-printing of instructions in output. Together these features make analysis of unprotected CF instructions much easier by providing a visual control flow graph.

Reviewers: pcc

Subscribers: llvm-commits, kcc, vlad.tsyrklevich

Differential Revision: https://reviews.llvm.org/D39819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318211 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 22:43:13 +00:00
Aditya Nandakumar
0053d0421c [GISel]: Rework legalization algorithm for better elimination of
artifacts along with DCE

Legalization Artifacts are all those insts that are there to make the
type system happy. Currently, the target needs to say all combinations
of extends and truncs are legal and there's no way of verifying that
post legalization, we only have *truly* legal instructions. This patch
changes roughly the legalization algorithm to process all illegal insts
at one go, and then process all truncs/extends that were added to
satisfy the type constraints separately trying to combine trivial cases
until they converge. This has the added benefit that, the target
legalizerinfo can only say which truncs and extends are okay and the
artifact combiner would combine away other exts and truncs.

Updated legalization algorithm to roughly the following pseudo code.

WorkList Insts, Artifacts;
collect_all_insts_and_artifacts(Insts, Artifacts);

do {
  for (Inst in Insts)
         legalizeInstrStep(Inst, Insts, Artifacts);
  for (Artifact in Artifacts)
         tryCombineArtifact(Artifact, Insts, Artifacts);
} while(!Insts.empty());

Also, wrote a simple wrapper equivalent to SetVector, except for
erasing, it avoids moving all elements over by one and instead just
nulls them out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318210 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 22:42:19 +00:00
Hans Wennborg
e144f87e90 CMake: Turn LLVM_ENABLE_LIBXML2 into a tri-state option
In addition to the current ON and OFF options, this adds the FORCE_ON
option, which causes a configuration error if libxml2 cannot be used.

Differential revision: https://reviews.llvm.org/D40050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318209 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 22:32:49 +00:00
Simon Dardis
02405750ef Reland "[mips][mt][6/7] Add support for mftr, mttr instructions."
This adjusts the tests to hopfully pacify the
llvm-clang-x86_64-expensive-checks-win buildbot.

Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318207 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 22:26:42 +00:00
Rong Xu
56703803f6 [CodeGen] Fix the test case added in r318202
Add the -mtriple option to filter some platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318206 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 22:08:37 +00:00
Reid Kleckner
a9292a17b1 Make salvageDebugInfo of casts work for dbg.declare and dbg.addr
Summary:
Instcombine (and probably other passes) sometimes want to change the
type of an alloca. To do this, they generally create a new alloca with
the desired type, create a bitcast to make the new pointer type match
the old pointer type, replace all uses with the cast, and then simplify
the casts. We already knew how to salvage dbg.value instructions when
removing casts, but we can extend it to cover dbg.addr and dbg.declare.

Fixes a debug info quality issue uncovered in Chromium in
http://crbug.com/784609

Reviewers: aprantl, vsk

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40042

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318203 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 21:49:06 +00:00
Rong Xu
68761036ca [CodeGen] Peel off the dominant case in switch statement in lowering
This patch peels off the top case in switch statement into a branch if the
probability exceeds a threshold. This will help the branch prediction and
avoids the extra compares when lowering into chain of branches.

Differential Revision: http://reviews.llvm.org/D39262


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318202 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 21:44:09 +00:00
Richard Smith
bd3b99d542 Fix unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318201 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 21:26:46 +00:00
Hans Wennborg
5765d84997 Rename CountingFunctionInserter and use for both mcount and cygprofile calls, before and after inlining
Clang implements the -finstrument-functions flag inherited from GCC, which
inserts calls to __cyg_profile_func_{enter,exit} on function entry and exit.

This is useful for getting a trace of how the functions in a program are
executed. Normally, the calls remain even if a function is inlined into another
function, but it is useful to be able to turn this off for users who are
interested in a lower-level trace, i.e. one that reflects what functions are
called post-inlining. (We use this to generate link order files for Chromium.)

LLVM already has a pass for inserting similar instrumentation calls to
mcount(), which it does after inlining. This patch renames and extends that
pass to handle calls both to mcount and the cygprofile functions, before and/or
after inlining as controlled by function attributes.

Differential Revision: https://reviews.llvm.org/D39287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318195 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 21:09:45 +00:00
Dinar Temirbulatov
9c5d8478b1 [SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.
Patch tries to improve vectorization of the following code:
    
        void add1(int * __restrict dst, const int * __restrict src) {
          *dst++ = *src++;
          *dst++ = *src++ + 1;
          *dst++ = *src++ + 2;
          *dst++ = *src++ + 3;
        }
        Allows to vectorize even if the very first operation is not a binary add, but just a load.
    
        Fixed issues related to previous commit.
    
        Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev
    
        Reviewed By: ABataev, RKSimon
    
        Subscribers: llvm-commits, RKSimon
    
        Differential Revision: https://reviews.llvm.org/D28907


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318193 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 20:55:08 +00:00
Jake Ehrlich
9157549de8 [llvm-objcopy] Improve command line option help messages
I was being inconsistent with the way I was capitalizing help messages
for command line options. Additionally --remove-section wasn't using
value_desc even though it benefited from it.

Differential Revision: https://reviews.llvm.org/D39978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318190 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 20:36:04 +00:00
Matt Arsenault
96ce9ffb7d AMDGPU: Error on stack size overflow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318189 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 20:33:14 +00:00
Ulrich Weigand
2bcdf1ebc9 [SystemZ] Do not crash when selecting an OR of two constants
In rare cases, common code will attempt to select an OR of two
constants.  This confuses the logic in splitLargeImmediate,
causing an internal error during isel.  Fixed by simply leaving
this case to common code to handle.

This fixes PR34859.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318187 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 20:00:34 +00:00
Evandro Menezes
40a2f42a15 [AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of loads and stores of registers pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318186 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:59:43 +00:00
Martin Storsjo
ba2da13128 [llvm-strings] Add support for the -a/--all options
They don't actually change nay behaviour, as llvm-strings currently
checks the whole object without looking at individual sections anyway.

This allows using llvm-strings in a context that explicitly passes
the -a option.

Differential Revision: https://reviews.llvm.org/D40020

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:58:36 +00:00
Martin Storsjo
35b1f99e94 [ARM, AArch64] Fix an assert message, Darwin isn't the only target supporting TLS. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318184 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:57:59 +00:00
Hiroshi Yamauchi
7f62a83c8d Simplify irreducible loop metadata test code.
Summary:
Shorten the irreducible loop metadata test code by removing insignificant
instructions.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40043

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318182 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:48:59 +00:00
Easwaran Raman
52a5b26bf5 [CodeGenPrepare] Disable div bypass when working set size is huge.
Summary:
Bypass of slow divs based on operand values is currently disabled for
-Os. Do the same when profile summary is available and the working set
size of the application is huge. This is similar to how loop peeling is
guarded by hasHugeWorkingSetSize. In the div bypass case, the generated
extra code (and the extra branch) tendss to outweigh the benefits of the
bypass. This results in noticeable performance improvement on an
internal application.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:31:51 +00:00
Ulrich Weigand
51bf6cb579 [SystemZ] Fix invalid codegen using RISBMux on out-of-range bits
Before using the 32-bit RISBMux set of instructions we need to
verify that the input bits are actually within range of the 32-bit
instruction.  This fixer PR35289.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318177 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:20:46 +00:00
Alex Bradbury
1715109e25 Set hasSideEffects=0 for TargetOpcode::{CFI_INSTRUCTION,EH_LABEL,GC_LABEL,ANNOTATION_LABEL}
D37065 (committed as rL317674) explicitly set hasSideEffects for all 
TargetOpcode::* instructions where it was inferred previously. This is a 
follow-up to that patch, setting hasSideEffects=0 for CFI_INSTRUCTION, 
EH_LABEL, GC_LABEL and ANNOTATION_LABEL. All LLVM tests pass after this 
change.

This patch also modifies MachineInstr::isLabel returns true for a 
TargetOpcode::ANNOTATION_LABEL, which ensures that an annotation label won't 
be incorrectly considered safe to move.

Differential Revision: https://reviews.llvm.org/D39941


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318174 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 19:16:08 +00:00