Changes all static helper functions in MachOObjectFile.cpp that expect a
non-null MachOObjectFile pointer to take a reference instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288608 91177308-0d34-0410-b5e6-96231b3b80d8
Change SectionSymbols so that it doesn't hard-code ELF types, so that
it can be used for non-ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288607 91177308-0d34-0410-b5e6-96231b3b80d8
getNode already prevents formation of out of bounds constant
extract_vector_elts. Do the same for insert_vector_elt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288603 91177308-0d34-0410-b5e6-96231b3b80d8
Use the target triple to determine whether to run the explicit-locals
pass, rather than using a separate command-line argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288602 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIRegisterInfo.cpp: In member function 'void llvm::SIRegisterInfo::spillSGPR(llvm::MachineBasicBlock::iterator, int, llvm::RegScavenger*) const':
lib/Target/AMDGPU/SIRegisterInfo.cpp:572:30: warning: variable 'SubRC' set but not used [-Wunused-but-set-variable]
const TargetRegisterClass *SubRC = nullptr;
^
lib/Target/AMDGPU/SIRegisterInfo.cpp: In member function 'void llvm::SIRegisterInfo::restoreSGPR(llvm::MachineBasicBlock::iterator, int, llvm::RegScavenger*) const':
lib/Target/AMDGPU/SIRegisterInfo.cpp:723:30: warning: variable 'SubRC' set but not used [-Wunused-but-set-variable]
const TargetRegisterClass *SubRC = nullptr;
^
The variable was assigned to, but never used. The functions called did not
mutate state. Simplify the logic and remove the variable. Identified by gcc
5.4.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288601 91177308-0d34-0410-b5e6-96231b3b80d8
Add an optional parameter to `llvm_install_symlink` which allows the symlink
installation to be placed into a specific component rather than the default
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288600 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
"Lookup" is a noun ("lookup table"), "look up" is a verb ("look up
'table' in the dictionary").
Reviewers: chandlerc
Subscribers: silvas, llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D27374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288598 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
Previously in AnalysisManager::invalidate(), we would walk the full
ResultsList even if we knew that nothing was invalidated.
Reviewers: chandlerc
Subscribers: silvas, llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D27371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288595 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
Previously, we were forcing a copy if you passed an lvalue argument; now
we'll take it by reference.
Reviewers: chandlerc
Subscribers: mehdi_amini, silvas, llvm-commits
Differential Revision: https://reviews.llvm.org/D27370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288594 91177308-0d34-0410-b5e6-96231b3b80d8
This was accidentallly broken in r285515 when we started lowering the intrinsic to an ISD node. Should fix PR31241.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288578 91177308-0d34-0410-b5e6-96231b3b80d8
Previously this pass was using up to 5% compile time in some cases which
is a bit much for what it is doing. The pass featured a full blown
data-flow analysis which in the default configuration was restricted to a
single block.
This rewrites the pass under the assumption that we only ever work on a
single block. This is done in a single pass maintaining a state machine
per general purpose register to catch LOH patterns.
Differential Revision: https://reviews.llvm.org/D27329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288561 91177308-0d34-0410-b5e6-96231b3b80d8
VSX has instructions lxsiwax/lxsdx that can load 32/64 bit value into VSX register cheaply. That patch makes it known to memory cost model, so the vectorization of the test case in pr30990 is beneficial.
Differential Revision: https://reviews.llvm.org/D26713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288560 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This is a follow up to r288303, where I have introduced TrigramIndex
to speed up SpecialCaseList for the cases when all rules are
simple wildcards, like *hello*wor.d*.
Here, I add support for escaping, so that it's possible to
specify rules like *c\+\+abi*.
Reviewers: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288553 91177308-0d34-0410-b5e6-96231b3b80d8
This resubmits r288529, which was resubmitted because it broke a
fuzzer bot. According to kcc@ the test that broke was flakey
and it is unlikely to be a result of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288549 91177308-0d34-0410-b5e6-96231b3b80d8
Windows doesn't really support weak aliases, but with some
linker magic we can get something that's pretty close on
Windows. This introduces an interface to accessing weakly
aliased symbols that will work on any platform. Linker
magic changes to come in a separate patch.
Patch by Marcos Pividori
Differential Revision: https://reviews.llvm.org/D27235
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288530 91177308-0d34-0410-b5e6-96231b3b80d8
For -O0 there might be unreachable BBs, which breaks the assumption that all the
BBs have an auxiliary data structure. In this patch, we add another interface
called findBBInfo() so that a nullptr can be returned for the unreachable BBs
(and the callers can ignore those BBs).
This fixes the bug reported
https://llvm.org/bugs/show_bug.cgi?id=31209
Differential Revision: https://reviews.llvm.org/D27280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288528 91177308-0d34-0410-b5e6-96231b3b80d8
Add assembler support for all atomic instructions that weren't already
supported. Some of those could be used to implement codegen for 128-bit
atomic operations, but this isn't done here yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288526 91177308-0d34-0410-b5e6-96231b3b80d8
Add assembler support for instructions manipulating the FPC.
Also add codegen support via the GCC compatibility builtins:
__builtin_s390_sfpc
__builtin_s390_efpc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288525 91177308-0d34-0410-b5e6-96231b3b80d8
Move setting of hasSideEffects out of SystemZInstrFormats.td,
to allow use of the format classes for instructions where this
flag shouldn't be set. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288524 91177308-0d34-0410-b5e6-96231b3b80d8
Demonstrate missed opportunity for urem -> and combine for powerof2 or zero non-uniform constant dividers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288510 91177308-0d34-0410-b5e6-96231b3b80d8
This reverts commit r288497, as it broke the AArch64 build of Compiler-RT's
builtins (twice: once in r288412 and once in r288497). We should investigate
this offline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288508 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
When X = 0 and Y = inf, the original code produces inf, but the transformed
code produces nan. So this transform (and its relatives) should only be
used when the no-infs-fp-math flag is explicitly enabled.
Also disable the transform using fmad (intermediate rounding) when unsafe-math
is not enabled, since it can reduce the precision of the result; consider this
example with binary floating point numbers with two bits of mantissa:
x = 1.01
y = 111
x * (y + 1) = 1.01 * 1000 = 1010 (this is the exact result; no rounding occurs at any step)
x * y + x = 1000.11 + 1.01 =r 1000 + 1.01 = 1001.01 =r 1000 (with rounding towards zero)
The example relies on rounding towards zero at least in the second step.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98578
Reviewers: RKSimon, tstellarAMD, spatel, arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288506 91177308-0d34-0410-b5e6-96231b3b80d8