155959 Commits

Author SHA1 Message Date
Craig Topper
698b76cb6e [ValueTracking] Remove unnecessary temporary APInt from computeNumSignBitsVectorConstant.
We can just use getNumSignBits instead of inverting negative numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 16:35:41 +00:00
Craig Topper
3afd582859 [ValueTracking] Simplify the known bits code for constant vectors a little.
Neither of these cases really require a temporary APInt outside the loop. For the ConstantDataSequential case the APInt will never be larger than 64-bits so its fine to just call getElementAsAPInt. For ConstantVector we can get the APInt by reference and only make a copy where the inversion is needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316265 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 16:35:39 +00:00
Simon Pilgrim
3aad6fd98b [X86][SSE] Add missing extractps scheduling test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316262 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 14:35:09 +00:00
David Green
bbbf08b339 [LoopInterchange] Fix phi node ordering miscompile.
The way that splitInnerLoopHeader splits blocks requires that
the induction PHI will be the first PHI in the inner loop
header. This makes sure that is actually the case when there
are both IV and reduction phis.

Differential Revision: https://reviews.llvm.org/D38682



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316261 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 13:58:37 +00:00
Florian Hahn
449e890f29 [SelectionDAG] Use dyn_cast without cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316258 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 05:37:10 +00:00
Florian Hahn
34f57ff3e8 [SelectionDAG] Use isa to silence unused variable warning (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316257 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 04:57:03 +00:00
Craig Topper
ba5255623c [SelectionDAG] Don't subject ConstantSDNodes to the depth limit in computeKnownBits and ComputeNumSignBits.
We don't need to do any additional recursion, we just need to analyze the APInt stored in the node. This matches what the ValueTracking versions do for IR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316256 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 03:22:13 +00:00
Craig Topper
cbc06db950 [SelectionDAG] Don't subject ISD:Constant to the depth limit in TargetLowering::SimplifyDemandedBits.
Summary:
We shouldn't recurse any further but it doesn't mean we shouldn't be able to give the known bits for a constant. The caller would probably like that we always return the right answer for a constant RHS. This matches what InstCombine does in this case.

I don't have a test case because this showed up while trying to revive D31724.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D38967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316255 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 02:27:19 +00:00
Craig Topper
abd557f982 [X86] Do not generate __multi3 for mul i128 on X86
Summary: __multi3 is not available on x86 (32-bit). Setting lib call name for MULI_128 to nullptr forces DAGTypeLegalizer::ExpandIntRes_MUL to generate instructions for 128-bit multiply instead of a call to an undefined function.  This fixes PR20871 though it may be worth looking at why licm and indvars combine to generate 65-bit multiplies in that test.

Patch by Riyaz V Puthiyapurayil

Reviewers: craig.topper, schweitz

Reviewed By: craig.topper, schweitz

Subscribers: RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D38668

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316254 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 02:26:00 +00:00
Eugene Zelenko
cd986088c5 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316253 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-21 00:57:46 +00:00
Krzysztof Parzyszek
26843fd82c [Packetizer] Add function to check for aliasing between instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316243 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 22:08:40 +00:00
Sanjay Patel
84aa0af495 [utils, x86] add regex for retl/retq to reduce duplicated FileChecking (PR35003)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316242 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 21:55:23 +00:00
Eugene Zelenko
8b6784b39c [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316241 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 21:47:29 +00:00
Sam Clegg
2b6b6ac523 [WebAssembly] MC: Fix crash when -g specified.
At this point we don't output any debug sections or thier
relocations.

Differential Revision: https://reviews.llvm.org/D39076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316240 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 21:28:38 +00:00
Daniel Sanders
d83b5d463d [globalisel][tablegen] Fix small spelling nits. NFC
ComplexRendererFn -> ComplexRendererFns
Corrected a couple lingering references to tied operands that were missed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316237 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 20:55:29 +00:00
Krzysztof Parzyszek
736ecc1636 [Hexagon] Report error instead of crashing on wrong inline-asm constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316236 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 20:24:44 +00:00
Peter Collingbourne
a29687c501 COFF: Add type server pdb files to linkrepro tar file.
Differential Revision: https://reviews.llvm.org/D38977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 19:48:26 +00:00
Krzysztof Parzyszek
ccf5909298 [Hexagon] Reorganize and update instruction patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 19:33:12 +00:00
Simon Pilgrim
def1c1f4c5 [X86][SSE] Add missing _mm_extract_ps fast-isel test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316226 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 19:29:01 +00:00
Sanjay Patel
84832904a0 [x86] avoid FileCheck assert duplication with retl/retq regex; NFC
This was suggested in PR35003:
https://bugs.llvm.org/show_bug.cgi?id=35003

32-bit checks may be identical to 64-bit (if we avoid those pesky scalar params!).

I'll check in the script change shortly assuming this doesn't anger any bots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 18:35:32 +00:00
Simon Pilgrim
b29a89717e [X86][SSE] getTargetShuffleMask - check shuffle input value types. NFCI.
To help identify shuffle combine issues

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316222 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 18:07:50 +00:00
Sam Clegg
711a23dd08 [WebAssembly] MC: Handle (ignore) MCSA_Protected symbol attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316220 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 17:41:12 +00:00
Dave Lee
585416691f Make x86 __ehhandler comdat if parent function is
Summary:
This change comes from using lld for i686-windows-msvc. Before this change, lld
emits an error of:

    error: relocation against symbol in discarded section: .xdata

It's possible that this could be addressed in lld, but I think this change is
reasonable on its own.

At a high level, this is being generated:

    A (.text comdat) -> B (.text) -> C (.xdata comdat)

Where A is a C++ inline function, which references B, an exception handler
thunk, which references C, the exception handling info.

With this structure, lld will error when applying relocations to B if the C it
references has been discarded (some other C has been selected).

This change checks if A is comdat, and if so places the exception registration
thunk (B) in the comdata group of A (and B).

It appears that MSVC makes the __ehhandler function comdat.

Is it possible that duplicate thunks are being emitted into the final binary
with other linkers, or are they stripping the unused thunks?

Reviewers: rnk, majnemer, compnerd, smeenai

Reviewed By: rnk, compnerd

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316219 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 17:04:43 +00:00
Krzysztof Parzyszek
b99a8bcc2b [Hexagon] Allow redefinition with immediates for hw loop conversion
Normally, if the registers holding the induction variable's bounds
are redefined inside of the loop's body, the loop cannot be converted
to a hardware loop. However, if the redefining instruction is actually
loading an immediate value into the register, this conversion is both
possible and legal (since the immediate itself will be used in the
loop setup in the preheader).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316218 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 16:56:33 +00:00
Simon Pilgrim
268fcddc7a [X86] Check all CPU target names.
We ignore the 32-bit/64-bit triple but I've tried to use i686 triples for CPUs that don't support x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 16:55:51 +00:00
Zvi Rackover
0c8405ae08 X86 Tests: Add tests for vector permutes with variable indices. NFC.
Basic tests which are the equivalent of single-source shufflevector with variable mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316216 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 15:32:14 +00:00
Aleksandar Beserminji
88f8f00810 Revert "[mips] Reordering callseq* nodes to be linear"
This reverts commit r314507, because the original patch is causing test
failures.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316215 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 14:35:41 +00:00
Eugene Leviant
4eed9afb35 [ARM] Use post-RA MI scheduler when +use-misched is set
Differential revision: https://reviews.llvm.org/D39100


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316214 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 14:29:17 +00:00
Simon Pilgrim
2d9526eb16 [X86][AVX512] Regenerate regcall tests.
As part of tracking down machine verifier issues (PR27481)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316213 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 14:13:02 +00:00
Nikolai Bozhenov
082e33ac8c [ValueTracking] Enabling ValueTracking patch by default
(recommit #2 after checking for timeout issue). 

The original patch was an improvement to IR ValueTracking on
non-negative integers. It has been checked in to trunk (D18777,
r284022). But was disabled by default due to performance regressions.
Perf impact has improved. The patch would be enabled by default.

Reviewers: reames, hfinkel
 
Differential Revision: https://reviews.llvm.org/D34101
 
Patch by: Olga Chupina <olga.chupina@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316208 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 10:08:47 +00:00
Max Kazantsev
28591001d2 Add test case for LoopSink pass
This test checks that load from constant memory will be sunk regardless of
aliasing stores in the loop.

Patch by Daniil Suchkov!

Differential Revision: https://reviews.llvm.org/D39113


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316207 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 06:40:48 +00:00
Dylan McKay
e536cadb6f [AVR] Fix the select-mbb-placement-bug.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316205 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 04:17:14 +00:00
Lang Hames
dd3a1b1065 [ExecutionEngine] Temporarily remove the ExecutionEngine tls tests.
Will re-enable once I figure out why the necessary runtime functions are
missing on some bots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316203 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 01:18:00 +00:00
Lang Hames
801676c9c6 [ExecutionEngine] After a heroic dev-meeting hack session, the JIT supports TLS.
Turns on EmulatedTLS support by default in EngineBuilder. ;)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316200 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 00:53:16 +00:00
Nemanja Ivanovic
f56176dd98 Disabling the transformation introduced in r315888
The commit at https://reviews.llvm.org/rL315888 is causing some failures
with internal testing. Disabling this code until we can resolve the issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316199 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-20 00:36:46 +00:00
Keith Wyss
4dea1f2710 [XRay] [docs] Document how to generate flamegraphs from xray traces.
Summary:
Updated the XRayExample docs with instructions for using the llvm-xray stacks
command.

Reviewers: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39106

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316192 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 22:35:09 +00:00
Eugene Zelenko
5ce470a389 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316190 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 22:07:16 +00:00
Alex Bradbury
920aa533c1 [RISCV] Add missing hunk from r316188
r316188 didn't set guessInstructionProperties=1 as it should have done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316189 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 21:43:29 +00:00
Alex Bradbury
5a3d179fab [RISCV] Initial codegen support for ALU operations
This adds the minimum necessary to support codegen for simple ALU operations
on RV32. Prolog and epilog insertion, support for memory operations etc etc 
follow in future patches.

Leave guessInstructionProperties=1 until https://reviews.llvm.org/D37065 is 
reviewed and lands.

Differential Revision: https://reviews.llvm.org/D29933


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316188 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 21:37:38 +00:00
Eugene Zelenko
ab16d0abcd [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316187 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 21:21:30 +00:00
Craig Topper
fb5a67b594 [SelectionDAG] Add a check to getVectorShuffle to ensure that the only negative index we allow is -1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316183 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 20:59:41 +00:00
Craig Topper
096ea8c9fd [X86] Remove LowerEXTRACT_SUBVECTOR handler. All EXTRACT_SUBVECTORs are marked as legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316182 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 20:59:40 +00:00
Simon Pilgrim
d369ce4091 [X86][AES] Test AES intrinsics on 32/64-bit targets with/without VEX encoding
Don't just test on 32-bit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316176 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 19:05:04 +00:00
Graham Yiu
1f93c854d8 The cost of splitting a large vector instruction is not being taken into account by the getUserCost function. This was leading to some loops being over unrolled. The cost of a vector instruction is now being multiplied by the cost of the type legalization. This will return a more accurate cost.
Committing on behalf on Brad Nemanich (brad.nemanich@ibm.com)

Differential Revision: https://reviews.llvm.org/D38961

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316174 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 18:16:31 +00:00
Konstantin Zhuravlyov
cb5868c4b8 AMDGPU/Docs: Fix unreadable characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316171 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 17:12:55 +00:00
Krzysztof Parzyszek
99a0c4c3b5 [Hexagon] Fix store conversion from rr to io in optimize addressing modes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316170 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 16:59:22 +00:00
Saleem Abdulrasool
2ac0f38d31 ExecutionEngine: adjust COFF i386 tautological asserts
Modify static_casts to not be tautological in some COFF i386
relocations.

Patch by Alex Langford!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316169 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 16:57:40 +00:00
Alex Bradbury
8f5670fec2 [RISCV] RISCVAsmParser: early exit if RISCVOperand isn't immediate as expected
This is necessary to avoid an assertion in the included test case and similar 
assembler inputs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316168 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 16:22:51 +00:00
Alex Bradbury
695f682406 [RISCV][NFC] Drop unused parameter from createImm helper in RISCVAsmParser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316167 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 16:09:20 +00:00
Nikolai Bozhenov
2942c7833b Revert r315992 because of a found miscompilation failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316164 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 15:36:18 +00:00