Commit Graph

16 Commits

Author SHA1 Message Date
Dan Gohman 9f86840c1c [WebAssembly] Fix trapping behavior in fptosi/fptoui.
This adds code to protect WebAssembly's `trunc_s` family of opcodes
from values outside their domain. Even though such conversions have
full undefined behavior in C/C++, LLVM IR's `fptosi` and `fptoui` do
not, and only return undef.

This also implements the proposed non-trapping float-to-int conversion
feature and uses that instead when available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319128 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-28 01:13:40 +00:00
Derek Schuff c1e866c7f1 [WebAssembly] Add sign extend instructions from atomics proposal
Select them from ISD::SIGN_EXTEND_INREG

Differential Revision: https://reviews.llvm.org/D37603

remove spurious change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313101 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-13 00:29:06 +00:00
Dan Gohman 8dd4db3f49 [WebAssembly] Update opcode values according to recent spec changes.
This corresponds to the "0xd" opcode renumbering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 20:21:49 +00:00
Dan Gohman 6a6f29c0d8 [WebAssembly] Add binary-encoding opcode values to instruction descriptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 21:24:08 +00:00
Michael Kuperstein 175a34b53e [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279129 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:08:15 +00:00
Dan Gohman 492f1085a4 [WebAssembly] Implement anyext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 00:17:35 +00:00
Dan Gohman 10ad208c62 [WebAssembly] Set several MCInstrDesc flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254271 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-29 22:59:19 +00:00
Dan Gohman fe3415b2af [WebAssembly] Use a physical register to describe ARGUMENT liveness.
Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254084 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 19:36:19 +00:00
Dan Gohman 284e00c04e [WebAssembly] Use tabs instead of spaces in assembly output.
This seems to be the most popular convention among the other backends.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253172 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-15 15:34:19 +00:00
Dan Gohman 223fb8cb62 [WebAssembly] Un-mangle the conversion instruction names.
This arranges the types in the LLVM instruction names in the same order that
they appear in the WebAssembly opcode names, and eliminates
double-underscores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-13 00:50:04 +00:00
Dan Gohman 651ccf4012 [WebAssembly] Add AsmString strings for most instructions.
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-05 20:42:30 +00:00
JF Bastien 0c4ea613c4 [WebAssembly] Update opcode name format for conversions
Summary:
Conversion opcode name format should be f64.convert_u/i64 not f64_convert_u

Author: s3ththompson
Reviewers: jfb
Subscribers: sunfish, jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D14160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-29 04:10:52 +00:00
Dan Gohman 645be3e5fe [WebAssembly] Implement the remaining conversion operations.
This is a temporary assembly syntax that will likely evolve along with
broader upcoming syntax changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249225 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-03 02:10:28 +00:00
Dan Gohman 24b507c2c1 [WebAssembly] Rename several functions and types according to the new spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-26 01:09:44 +00:00
Dan Gohman 270e6f8a27 [WebAssembly] Implement int64-to-int32 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247649 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-15 00:55:19 +00:00
JF Bastien 7bfd515593 WebAssembly: basic instructions todo, and basic register info.
Summary:
This code is based on AArch64 for modern backend good practice, and NVPTX for
virtual ISA concerns.

Reviewers: sunfish

Subscribers: aemerson, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11070

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 18:23:10 +00:00