102469 Commits

Author SHA1 Message Date
Simon Pilgrim
3adcb6cd73 Fix typo in comment. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301911 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 10:43:33 +00:00
Simon Pilgrim
ed79276e6b [SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31088)
PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats.

This patch adds support for extension/truncation for both integer and float types.

Differential Revision: https://reviews.llvm.org/D32391

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301910 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 10:33:08 +00:00
Simon Pilgrim
6c9fd8e4c0 [DAGCombiner] Improve MatchBswapHword logic (PR31357)
The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade).

Patch originally introduced by Jim Lewis.

Submitted on the behalf of Dinar Temirbulatov.

Differential Revision: https://reviews.llvm.org/D32039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301907 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 10:16:19 +00:00
Diana Picus
33dd8eaf5d [ARM] GlobalISel: Use TableGen instruction selector
Emit and use the TableGen instruction selector for ARM. At the moment,
this allows us to remove the hand-written code for selecting G_SDIV and
G_UDIV.

Future commits will focus on increasing the code coverage for it and
removing more dead code from the current instruction selector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301905 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 09:40:49 +00:00
Craig Topper
7d66f52694 [APInt] Move APInt::getSplat out of line.
I think this method is probably too complex to be inlined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301901 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 06:32:27 +00:00
Craig Topper
382616f0dc [APInt] Move the setBit and clearBit methods inline.
This makes setBit/clearBit more consistent with setBits which is already inlined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301900 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 05:49:40 +00:00
Xinliang David Li
afb34f6072 Refactor callsite cost computation into a helper function /NFC
Makes code more readable. The function will also be used
by the partial inlining's cost analysis.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301899 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 05:38:41 +00:00
Xinliang David Li
0a9c93cad3 [PartialInlining] Hook up inline cost analysis
Differential Revision: http://reviews.llvm.org/D32666


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301894 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 02:44:14 +00:00
Dylan McKay
8c15c7ba7e [AVR] Save/restore the frame pointer for all functions
A recent commit I made made it so that we only did this for signal or
interrupt handlers. This broke normal functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301893 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 01:57:48 +00:00
Nemanja Ivanovic
ff5dd4527f [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
Fixes PR30730.
This is a re-commit of a pulled commit. The commit was pulled because some
software projects contained uses of Altivec vectors that violated alignment
requirements. Known issues have now been fixed.

Committing on behalf of Lei Huang.

Differential Revision: https://reviews.llvm.org/D26861


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301892 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 01:47:34 +00:00
Dylan McKay
b0cacfc25f [AVR] Fix a bug where the frame pointer is clobbered
Because it was a callee-saved register, we automatically generated code
to spill and unspill its original value so that it is restored after the
function returns.

The problem is that this code was being generated before the epilogue.
The epilogue itself uses the Y register, which could be prematurely
restored by the CSR restoration process.

This removes R29R28 from the CSR list and changes the prologue/epilogue
code to handle it explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301887 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 00:11:34 +00:00
George Burgess IV
4d11ee489b Revert r301880
This change caused buildbot failures, apparently because we're not
passing around types that InstSimplify is used to seeing. I'm not overly
familiar with InstSimplify, so I'm reverting this until I can figure out
what exactly is wrong.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301885 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:54:41 +00:00
Paul Robinson
29f8995a43 Stylistic makeover of DWARFDebugLine before working on it. NFC
Rename parameters and locals to CamelCase, doxygenize the header, and
run clang-format on the whole thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301883 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:27:55 +00:00
Zachary Turner
4c78c0e348 [CodeView] Write CodeView line information.
Differential Revision: https://reviews.llvm.org/D32716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301882 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:27:42 +00:00
Dylan McKay
2cc0b076e8 [AVR] Enable the frame pointer for all functions
This is a temporary measure while we figure out a way to get the frame
pointer working correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301881 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:16:59 +00:00
George Burgess IV
8bd46914df [InstSimplify] Handle selects of GEPs with 0 offset
In particular (since it wouldn't fit nicely in the summary):
(select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

Differential Revision: https://reviews.llvm.org/D31435


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301880 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:12:08 +00:00
Simon Pilgrim
cf6b7526dc [X86] Reduce code for setting operations actions by merging into loops across multiple types/ops. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301879 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:09:01 +00:00
Xin Tong
c16e4224e1 Empty Space. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301878 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 23:08:19 +00:00
Peter Collingbourne
e280c6ab3e Fix a pessimising move warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301852 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:48:10 +00:00
Matthias Braun
5927be1ab4 MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC
This tracks whether MaxCallFrameSize is computed yet. Ideally we would
assert and fail when the value is queried before it is computed, however
this fails various targets that need to be fixed first.

Differential Revision: https://reviews.llvm.org/D32570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301851 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:32:25 +00:00
Davide Italiano
f1457bf082 [NewGVN] Don't derive incorrect implications.
In the testcase attached,  we believe %tmp1 implies %tmp4.
where:
  br i1 %tmp1, label %bb2, label %bb7
  br i1 %tmp4, label %bb5, label %bb7

because Wwhile looking at PredicateInfo stuffs we end up calling
isImpliedTrueByMatchingCmp() with the arguments backwards.

Differential Revision:  https://reviews.llvm.org/D32718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301849 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:26:28 +00:00
Sanjay Patel
5ef20bbe9c [InstCombine] check one-use before applying DeMorgan nor/nand folds
If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need 
the intermediate (~X & Y) value. In that case, we would need an extra instruction to 
generate ~Y + 'or' (as shown in the test changes).

It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the
instruction count or critical path, but we might improve throughput because we can generate 
~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something 
we can't answer in IR.

Differential Revision: https://reviews.llvm.org/D32703


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301848 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:25:42 +00:00
Greg Clayton
ce5526513b Adds initial llvm-dwarfdump --verify support with unit tests.
lldb-dwarfdump gets a new "--verify" option that will verify a single file's DWARF debug info and will print out any errors that it finds. It will return an non-zero exit status if verification fails, and a zero exit status if verification succeeds. Adding the --quiet option will suppress any output the STDOUT or STDERR.

The first part of the verify does the following:

- verifies that all CU relative references (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata) have valid CU offsets
- verifies that all DW_FORM_ref_addr references have valid .debug_info offsets
- verifies that all DW_AT_ranges attributes have valid .debug_ranges offsets
- verifies that all DW_AT_stmt_list attributes have valid .debug_line offsets
- verifies that all DW_FORM_strp attributes have valid .debug_str offsets

Unit tests were added for each of the above cases.

Differential Revision: https://reviews.llvm.org/D32707



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301844 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:07:02 +00:00
Peter Collingbourne
10dbf12dd6 Bitcode: Make the summary reader responsible for merging. NFCI.
This is to prepare for an upcoming change which uses pointers instead of
GUIDs to represent references.

Differential Revision: https://reviews.llvm.org/D32469

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301843 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 22:04:36 +00:00
Quentin Colombet
b4e4acec44 [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.
NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301841 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 21:53:19 +00:00
Peter Collingbourne
4e235f9788 IPO: Add missing build dep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301835 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:57:20 +00:00
Simon Pilgrim
2823253614 [X86][AVX] Rename LowerVectorBroadcast to lowerBuildVectorAsBroadcast. NFCI.
Since the shuffle refactor, this is only used during BUILD_VECTOR lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301834 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:56:35 +00:00
Peter Collingbourne
6a2cc4c156 Object: Remove ModuleSummaryIndexObjectFile class.
Differential Revision: https://reviews.llvm.org/D32195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301832 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:42:32 +00:00
Krzysztof Parzyszek
1b0acac191 [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301829 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek
57b9206670 [Hexagon] Improving error reporting for writing to read only registers
Patch by Colin LeMahieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301828 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek
c7efa3cd92 [Hexagon] Give better error messages for solo instruction errors
Patch by Colin LeMahieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301827 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek
83ab9dc04d [Hexagon] Improve shuffle error reporting
Patch by Colin LeMahieu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301823 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 19:41:43 +00:00
Tim Northover
2e6f882a8d X86: initialize a few subtarget variables.
Otherwise an indeterminate value gets read, causing a bunch of UBSan failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301819 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 17:50:15 +00:00
Xin Tong
7da1589b90 Take indirect branch into account as well when folding.
We may not be able to rewrite indirect branch target, but we also want to take it into
account when folding, i.e. if it and all its successor's predecessors go to the same
destination, we can fold, i.e. no need to thread.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301816 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 17:15:37 +00:00
Sanjoy Das
41673c62ec Add a new WeakVH value handle; NFC
This relands r301425.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301813 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 17:07:54 +00:00
Sanjoy Das
399b4d037d Rename WeakVH to WeakTrackingVH; NFC
This relands r301424.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301812 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 17:07:49 +00:00
Derek Schuff
94499981f9 [WebAssembly] Fix use of SDNodeFlags after API change in r301803
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301811 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:49:39 +00:00
Zachary Turner
3b718709c4 [PDB/CodeView] Rename some classes.
In preparation for introducing writing capabilities for each of
these classes, I would like to adopt a Foo / FooRef naming
convention, where Foo indicates that the class can manipulate and
serialize Foos, and FooRef indicates that it is an immutable view of
an existing Foo.  In other words, Foo is a writer and FooRef is a
reader.  This patch names some existing readers to conform to the
FooRef convention, while offering no functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301810 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:46:39 +00:00
Sanjoy Das
3284bd7d15 Emulate TrackingVH using WeakVH
Summary:
This frees up one slot in the HandleBaseKind enum, which I will use
later to add a new kind of value handle.  The size of the
HandleBaseKind enum is important because we store a HandleBaseKind in
the low two bits of a (in the worst case) 4 byte aligned pointer.

Reviewers: davide, chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32634

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301809 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:28:58 +00:00
Xin Tong
4c37a844b1 [JumpThread] Add some assertions for expected ConstantInt/BlockAddress
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301808 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:19:59 +00:00
Gabor Horvath
4d5ff6d8d6 Remove unnecessary conditions as suggested by clang-tidy. NFC
Patch by: Gergely Angeli!

Differential Revision: https://reviews.llvm.org/D31936


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301807 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:18:42 +00:00
Craig Topper
4e5c5db786 [SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.
This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output.

I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information.

I'll fix CTPOP in a future patch.

Differential Revision: https://reviews.llvm.org/D32692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301806 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 16:08:06 +00:00
Xin Tong
fc533c3fb3 [JumpThread] Do RAUW in case Cond folds to a constant in the CFG
Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32407

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301804 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 15:34:17 +00:00
Amara Emerson
195d3fa988 Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.
This removes BinaryWithFlagsSDNode, and flags are now all passed by value.

Differential Revision: https://reviews.llvm.org/D32527



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301803 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 15:17:51 +00:00
Michael Zuckerman
079b067df7 [LLVM][inline-asm] Altmacro absolute expression '%' feature
In this patch, I introduce a new alt macro feature.
This feature adds meaning for the % when using it as a prefix to the calling macro arguments.

In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. 
As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"Expression results as strings
You can write `%expr' to evaluate the expression expr and use the result as a string."

expression assumptions:

1. '%' can only evaluate an absolute expression.
2. Altmacro '%' must be the first character of the evaluated expression.
3. If no '%' is located before the expression, a regular module operation is expected.
4. The result of Absolute Expressions can be only integer.

Differential Revision: https://reviews.llvm.org/D32526


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301797 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 13:20:12 +00:00
Dylan McKay
02f82baedd [AVR] Implement non-constant bit rotations
This lets us do bit rotations of variable amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301794 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 09:48:55 +00:00
Igor Breger
47d356222f [GlobalISel][X86] Prioritize Tablegen-erated instruction selection. NFC
Summary:
Prioritizes Tablegen-erated instruction selection over C++ instruction selection.
Remove G_ADD/G_SUB C++ selection - implemented by Tablegen.

Reviewers: dsanders, zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301792 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 07:06:08 +00:00
Igor Breger
9b90bf6cee [GlobalISel][X86] G_SEXT/G_ZEXT support.
Reviewers: zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301790 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 06:30:16 +00:00
Igor Breger
cf066a1fa2 [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.
Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Reviewers: zvi, guyblank

Reviewed By: zvi, guyblank

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301788 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 06:08:32 +00:00
Dylan McKay
900da3662a [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset
Before this, the LDS/STS instructions would have their opcodes
overwritten while linking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301782 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-30 23:33:52 +00:00