Commit Graph

121902 Commits

Author SHA1 Message Date
Piotr Padlewski
9ac4d86567 gvn small fix
http://reviews.llvm.org/D12928

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247935 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:34:22 +00:00
Simon Pilgrim
2abbcc9f0c [InstCombine] Added vector demanded bits support for SSE4A EXTRQ/INSERTQ instructions
The SSE4A instructions EXTRQ/INSERTQ only use the lower 64-bits (or less) for many of their input vector operands and all of them have undefined upper 64-bits results.

Differential Revision: http://reviews.llvm.org/D12680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247934 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:32:45 +00:00
Piotr Padlewski
c11b75566a Added MD_invariant_group to LLVMContext
http://reviews.llvm.org/D12926

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247931 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:25:07 +00:00
Teresa Johnson
3011017ecc Restore "Function bitcode index in Value Symbol Table and lazy reading support"
This reverts commit r247898 (which reverted r247894).

Patch fixed to address two issues exposed by buildbots:
- unused variable warning in NDEBUG mode
- std::initializer_list lifetime issue causing test failures

Original Summary:
Support for including the function bitcode indices in the Value Symbol
Table. This requires writing the VST after the function blocks, which in
turn requires a new VST forward declaration record encoding the offset of
the full VST (which is backpatched to contain the offset after the VST
is written).

This patch also enables the lazy function reader to use the new function
indices out of the VST. This support will be used by ThinLTO as well, which
will be in a follow on patch. Backwards compatibility with older bitcode
files is maintained.

A new test is also included.

The bitcode format (used for the lazy reader as well as the upcoming
ThinLTO patches) came out of discussions with Duncan and others and is
described here:
https://drive.google.com/file/d/0B036uwnWM6RWdnBLakxmeDdOeXc/view

Reviewers: dexonsmith, davidxl, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247927 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:12:00 +00:00
Diego Novillo
78bdd69df1 Temporarily fix gcov failures in big-endian hosts.
This test uses a gcov file generated in a little-endian host. The gcov
reader does not allow different endianness, so the test fails on big
endian hosts.

XFAILing for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247920 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 19:05:48 +00:00
Sanjoy Das
4ae0d24c8a [SCEV] Use auto instead of full iterator type; NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247919 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 19:04:09 +00:00
Sanjoy Das
4fd2da7476 [SCEV] Don't repeat method/field names in comment in header; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247918 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 19:04:03 +00:00
Reid Kleckner
afc364cf3b Fix the test case I just committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 17:21:45 +00:00
Reid Kleckner
7ad3e0e009 [WinEH] Add and use hasEHPadSuccessor instead of getLandingPadSuccessor
getLandingPadSuccessor assumes that each invoke can have at most one EH
pad successor, but WinEH invokes can have more than one. Two out of
three callers of getLandingPadSuccessor don't use the returned
landingpad, so we can make them use this simple predicate instead.

Eventually we'll have to circle back and fix SplitKit.cpp so that
register allocation works. Baby steps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247904 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 17:19:40 +00:00
Zia Ansari
3250d26bca Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 16:51:27 +00:00
Teresa Johnson
c9d578aaf4 Revert "Function bitcode index in Value Symbol Table and lazy reading support"
Temporarily revert to fix some buildbot issues. One is a minor issue
with a variable unused in NDEBUG mode. More concerning are some test
failures on win7 that I need to dig into.

This reverts commit 4e66a74543459832cfd571db42b4543580ae1d1d.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 16:19:10 +00:00
Daniel Sanders
92150c7f12 [mips] Add assembler support for the .cprestore directive.
Summary:
This assembler directive is used in O32 PIC to restore the current function's $gp after executing JAL's. The $gp is first stored on the stack at a user-specified offset.
It has the following format: ".cprestore 8" (where 8 is the offset).

This fixes llvm.org/PR20967.

Patch by Toma Tabacu.

Reviewers: seanbruno, tomatabacu

Subscribers: brooks, seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D6267


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 16:08:39 +00:00
Mehdi Amini
b063ae2f80 Fix doc build: sublists require a blank line before/after.
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 15:59:52 +00:00
Teresa Johnson
1f05ba2fcb Function bitcode index in Value Symbol Table and lazy reading support
Summary:
Support for including the function bitcode indices in the Value Symbol
Table. This requires writing the VST after the function blocks, which in
turn requires a new VST forward declaration record encoding the offset of
the full VST (which is backpatched to contain the offset after the VST
is written).

This patch also enables the lazy function reader to use the new function
indices out of the VST. This support will be used by ThinLTO as well, which
will be in a follow on patch. Backwards compatibility with older bitcode
files is maintained.

A new test is also included.

The bitcode format (used for the lazy reader as well as the upcoming
ThinLTO patches) came out of discussions with Duncan and others and is
described here:
https://drive.google.com/file/d/0B036uwnWM6RWdnBLakxmeDdOeXc/view

Reviewers: dexonsmith, davidxl, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247894 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 15:52:30 +00:00
Teresa Johnson
daaec40323 Refactor string encoding checks in BitcodeWriter (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 14:37:35 +00:00
Chad Rosier
fb73c0262a Typos. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 13:10:27 +00:00
Zoran Jovanovic
facd39580a [mips][microMIPS] Implement TEQ, TGE, TGEU, TLT, TLTU and TNE instructions
Differential Revision: http://reviews.llvm.org/D9658


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 10:14:09 +00:00
Elena Demikhovsky
2e5bf5535c AVX-512: shufflevector for i1 vectors <2 x i1> .. <64 x i1>
AVX-512 does not provide an instruction that shuffles mask register. So I do the following way:

mask-2-simd , shuffle simd , simd-2-mask

Differential Revision: http://reviews.llvm.org/D12727



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 06:53:12 +00:00
Diego Novillo
d139c5d412 GCC AutoFDO profile reader - Initial support.
This adds enough machinery to support reading simple GCC AutoFDO
profiles. It now supports reading flat profiles (no function calls).
Subsequent patches will add support for:

- Inlined calls (in particular, the inline call stack is not traversed
  to accumulate samples).

- Working sets and modules. These are used mostly for GCC's LIPO
  optimizations, so they're not needed in LLVM atm. I'm not sure that
  we will ever need them. For now, I've if0'd around the calls.

The patch also adds support in GCOV.h for gcov version V704 (generated
by GCC's profile conversion tool).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247874 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 00:17:24 +00:00
Diego Novillo
1e5eaadbbd Check for errors after reading a sample profile in llvm-profdata.
After reading the profile, check if the reader returned any errors
before showing the profile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 00:17:21 +00:00
Hans Wennborg
33dfebdcfa Try to fix WebAssembly build after r247864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247870 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 23:59:57 +00:00
Naomi Musgrave
c6b5fe6ee7 ScalarEvolution: added tmp to avoid use-after-dtor in for loop.
Summary:
For loop destroyed current instance before invoking next.
Temporary variable added to prevent use-after-dtor when invoke
destructor on current instance.

Reviewers: eugenis

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D12912

Rename temp var.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 23:46:40 +00:00
Eric Christopher
9b7b412516 Make sure we're negating the assembler predicate - no testcase
because it isn't being used on anything via the assembler right
now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247866 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 23:38:18 +00:00
Eric Christopher
4988c1d8c6 Use the cached TargetInstrInfo instead of looking it up again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 23:38:16 +00:00
Eric Christopher
973f7aa32a constify the Function parameter to the TTI creation callback and
propagate to all callers/users/etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247864 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 23:38:13 +00:00
Reid Kleckner
436444d569 [WinEH] Rip out the landingpad-based C++ EH state numbering code
It never really worked, and the new code is working better every day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 22:14:46 +00:00
Chris Bieneman
2334ac1e4c [CMake] More refactoring of symlink creation.
This refactoring is to enable clang to re-use this code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:49:59 +00:00
David Majnemer
f7f5dcbad1 [WinEHPrepare] Turn terminatepad into a cleanuppad + call + cleanupret
The MSVC doesn't really support exception specifications so let's just
turn these into cleanuppads.  Later, we might use terminatepad to more
efficiently encode the "noexcept"-ness of a function body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247848 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:42:16 +00:00
Teresa Johnson
d199fc5aa5 Allow BackpatchWord to be called for non-32-bit aligned words, and
from outside the BitstreamWriter.

Split out of patch D12536 (Function bitcode index in Value Symbol Table
and lazy reading support), which will use it to patch in the VST offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:41:43 +00:00
Sanjoy Das
907ab6ac2a [InstCombine] Optimize icmp slt signum(x), 1 --> icmp slt x, 1
Summary:
`signum(x)` is sometimes implemented as `(x >> 63) | (-x >>> 63)` (for
an `i64` `x`).  This change adds a matcher for that pattern, and an
instcombine rule to optimize `signum(x) s< 1`.

Later, we can also consider optimizing:

  icmp slt signum(x), 0 --> icmp slt x, 0
  icmp sle signum(x), 1 --> true

etc.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12703

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247846 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:41:29 +00:00
Reid Kleckner
66ef931b43 [WinEH] Pull Adjectives and CatchObj out of the catchpad arg list
Clang now passes the adjectives as an argument to catchpad.

Getting the CatchObj working is simply a matter of threading another
static alloca through codegen, first as an alloca, then as a frame
index, and finally as a frame offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:16:27 +00:00
David Majnemer
ad53a65179 [WinEHPrepare] Provide a cloning mode which doesn't demote
We are experimenting with a new approach to saving and restoring SSA
values used across funclets: let the register allocator do the dirty
work for us.

However, this means that we need to be able to clone commoned blocks
without relying on demotion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 18:40:37 +00:00
David Majnemer
6badbab39a [WinEHPrepare] Refactor explicit EH preparation
Split the preparation machinery into several functions, we will want to
selectively enable/disable different parts of it for an alternative
mechanism for dealing with cross-funclet uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247834 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 18:40:24 +00:00
Teresa Johnson
15c79f6c94 Disable the second verification run when performing LTO through
gold in NDEBUG mode.
Follow on patch for r247729 - LTO: Disable extra verify runs in release
builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 18:06:45 +00:00
Reid Kleckner
1b86a3446f [WinEH] Skip state numbering when no EH pads are present
Otherwise we'd try to emit the thunk that passes the LSDA to
__CxxFrameHandler3. We don't emit the LSDA if there were no landingpads,
so we'd end up with an assembler error when trying to write the COFF
object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 17:19:44 +00:00
Mehdi Amini
617bb47635 Improve "default_triple" specification: make it at the directory level for test/tools/llvm-mc
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 17:03:12 +00:00
Dan Gohman
7146e900e8 [WebAssembly] Check in an initial CFG Stackifier pass
This pass implements a simple algorithm for conversion from CFG to
wasm's structured control flow. It doesn't yet handle multiple-entry
loops; that will be added in a future patch.

It also adds initial support for switch statements.

Differential Revision: http://reviews.llvm.org/D12735


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 16:51:30 +00:00
Sanjay Patel
39490133e4 propagate fast-math-flags on DAG nodes
After D10403, we had FMF in the DAG but disabled by default. Nick reported no crashing errors after some stress testing, 
so I enabled them at r243687. However, Escha soon notified us of a bug not covered by any in-tree regression tests: 
if we don't propagate the flags, we may fail to CSE DAG nodes because differing FMF causes them to not match. There is
one test case in this patch to prove that point.

This patch hopes to fix or leave a 'TODO' for all of the in-tree places where we create nodes that are FMF-capable. I 
did this by putting an assert in SelectionDAG.getNode() to find any FMF-capable node that was being created without FMF
( D11807 ). I then ran all regression tests and test-suite and confirmed that everything passes.

This patch exposes remaining work to get DAG FMF to be fully functional: (1) add the flags to non-binary nodes such as
FCMP, FMA and FNEG; (2) add the flags to intrinsics; (3) use the flags as conditions for transforms rather than the
current global settings.

Differential Revision: http://reviews.llvm.org/D12095



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 16:31:21 +00:00
Reid Kleckner
cba458eecc Add assembler fatal error for undefined assembler labels in COFF writer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 16:26:29 +00:00
Sanjay Patel
45acd3e931 don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247813 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 16:21:08 +00:00
Adhemerval Zanella
5f57416779 [sanitizer] Add MSan support for AArch64
This patch adds support for msan on aarch64-linux for both 39 and
42-bit VMA.  The support is enabled by defining the
SANITIZER_AARCH64_VMA compiler flag to either 39 or 42 at build time
for both clang/llvm and compiler-rt.  The default VMA is 39 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 15:10:27 +00:00
Joerg Sonnenberger
e91a80e5b8 [SPARC] Both GNU and Solaris as support eq as condition code for integer ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 14:41:36 +00:00
Joerg Sonnenberger
a370ed740f [SPARC] Recognize st/stx operations with %fsr argument too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 13:30:54 +00:00
David L Kreitzer
992a2ec4f7 Test commit: Fixed a few typos in the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 13:27:30 +00:00
Chad Rosier
ed43215ca8 [ARM] Register ARMPreAllocLoadStoreOpt pass with LLVM pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 13:11:31 +00:00
Daniel Sanders
5369e0fdbe llvm-mc-fuzzer: A fuzzing tool for the MC layer.
Summary:
Only the disassembler is supported in this patch but it has already found a few
issues in the Mips disassembler (mostly invalid instructions being successfully
disassembled).

Reviewers: kcc

Subscribers: russell.gallop, silvas, kcc, llvm-commits

Differential Revision: http://reviews.llvm.org/D12723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 11:49:49 +00:00
Michael Kuperstein
196a1036c4 [X86] Do not generate 64-bit pops of 32-bit GPRs.
When trying emit a stack adjustments using pops, frame lowering selects an
arbitrary free GPR. It should always select one from an appropriate class...
This fixes PR24649.

Patch by: amjad.aboud@intel.com
Differential Revision: http://reviews.llvm.org/D12609


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 11:27:20 +00:00
Michael Kuperstein
b82c32333b [X86] Fix emitEpilogue() to make less assumptions about pops
This is the mirror image of r242395.
When X86FrameLowering::emitEpilogue() looks for where to insert the %esp addition that
deallocates stack space used for local allocations, it assumes that any sequence of pop
instructions from function exit backwards consists purely of restoring callee-save registers.

This may be false, since from some point backward, the pops may be clean-up of stack space
allocated for arguments to a call.

Patch by: amjad.aboud@intel.com
Differential Revision: http://reviews.llvm.org/D12688


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247784 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 11:18:25 +00:00
Zoran Jovanovic
de9de11b23 [mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions
Differential Revision: http://reviews.llvm.org/D9189


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 09:14:35 +00:00
NAKAMURA Takumi
217d6318e4 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 06:36:03 +00:00