7077 Commits

Author SHA1 Message Date
Chandler Carruth
4d7ed3960c [PM/AA] Remove the Location typedef from the AliasAnalysis class now
that it is its own entity in the form of MemoryLocation, and update all
the callers.

This is an entirely mechanical change. References to "Location" within
AA subclases become "MemoryLocation", and elsewhere
"AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps
out-of-tree folks update.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 07:18:54 +00:00
Sanjay Patel
50f4bcf54e rename variables; NFC
...because I see 'StoreBW' and read it as 'store bandwidth'



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:47:19 +00:00
Sanjay Patel
2cd20fef71 extract some code into a helper function for MergeConsecutiveStores(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:05:00 +00:00
Sanjay Patel
7ddee6601d propagate IR-level fast-math-flags to DAG nodes, disabled by default
This is an updated version of the patch that was checked in at:
http://reviews.llvm.org/rL237046

but subsequently reverted because it exposed a bug in the DAG Combiner:
http://reviews.llvm.org/D9893

This time, there's an enablement flag ("EnableFMFInDAG") around the code in
SelectionDAGBuilder where we copy the set of FP optimization flags from IR
instructions to DAG nodes. So, in theory, there should be no functional change
from this patch as-is, but it will allow testing with the added functionality
to proceed via "-enable-fmf-dag" passed to llc.

This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

Differential Revision: http://reviews.llvm.org/D10403



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:25:43 +00:00
Matt Arsenault
5202cab841 Revert "Revert "Fix merges of non-zero vector stores""
Reapply r239539. Don't assume the collected number of
stores is the same vector size. Just take the first N
stores to fill the vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 15:51:48 +00:00
Simon Pilgrim
4692cb1303 [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 16:25:12 +00:00
Simon Pilgrim
4a9a71e3ec [SelectionDAG] Added assertions + UNDEF handling for BSWAP node creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239679 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:23:58 +00:00
Simon Pilgrim
d8b27b1cb1 [DAGCombiner] Added BSWAP vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 14:08:15 +00:00
Simon Pilgrim
6b520d01a2 Stripped trailing whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239674 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:57:36 +00:00
Reid Kleckner
cd354fa84d Revert "Fix merges of non-zero vector stores"
This reverts commit r239539.

It was causing SDAG assertions while building freetype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 17:25:24 +00:00
Matt Arsenault
564ff6478c Fix merges of non-zero vector stores
Now actually stores the non-zero constant instead of 0.
I somehow forgot to include this part of r238108.

The test change was just an independent instruction order swap,
so just add another check line to satisfy CHECK-NEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 16:03:52 +00:00
Igor Laevsky
544d686bc0 [StatepointLowering] Reuse stack slots across basic blocks
During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint.
We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block.

But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries.

Differential Revision: http://reviews.llvm.org/D10251



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 12:31:53 +00:00
Reid Kleckner
bdcbc426af [WinEH] Add 32-bit SEH state table emission prototype
This gets all the handler info through to the asm printer and we can
look at the .xdata tables now. I've convinced one small catch-all test
case to work, but other than that, it would be a stretch to say this is
functional.

The state numbering algorithm avoids doing any scope reconstruction as
we do for C++ to simplify the implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 21:42:19 +00:00
Matt Arsenault
d2f17c4e2b Implement computeKnownBits for min/max nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:41 +00:00
Simon Pilgrim
298222a930 [DAGCombiner] Added CTLZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:19:00 +00:00
Simon Pilgrim
d72b357107 [DAGCombiner] Added CTTZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 09:57:09 +00:00
Simon Pilgrim
43421abda8 [DAGCombiner] Added CTPOP vector constant folding support.
Added tests to the existing SSE/AVX test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239252 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 15:37:14 +00:00
Fiona Glaser
5a0d6b758c DAGCombiner: don't duplicate (fmul x, c) in visitFNEG if fneg is free
For targets with a free fneg, this fold is always a net loss if it
ends up duplicating the multiply, so definitely avoid it.

This might be true for some targets without a free fneg too, but
I'll leave that for future investigation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 17:52:34 +00:00
Andrea Di Biagio
406e5ea598 Simplify code; NFC.
Also, moved test cases from CodeGen/X86/fold-buildvector-bug.ll into
CodeGen/X86/buildvec-insertvec.ll and regenerated CHECK lines using
update_llc_test_checks.py.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 10:29:55 +00:00
Swaroop Sridhar
bb3883dfba Statepoint: Fix handling of Far Immediate calls
gc.statepoint intrinsics with a far immediate call target 
were lowered incorrectly as pc-rel32 calls.

This change fixes the problem, and generates an indirect call 
via a scratch register.

For example: 

Intrinsic:
  %safepoint_token = call i32 (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* inttoptr (i64 140727162896504 to void ()*), i32 0, i32 0, i32 0, i32 0)

Old Incorrect Lowering:
  callq 140727162896504

New Correct Lowering:
  movabsq $140727162896504, %rax 
  callq *%rax

In lowerCallFromStatepoint(), the callee-target was modified and 
represented as a "TargetConstant" node, rather than a "Constant" node.
Undoing this modification enabled LowerCall() to generate the 
correct CALL instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 23:03:21 +00:00
Benjamin Kramer
c9f2b5d535 [SDAG switch lowering] Fix switch case -> or merging for 0 and INT_MIN
The big/small ordering here is based on signed values so SmallValue will
be INT_MIN and BigValue 0. This shouldn't be a problem but the code
assumed that BigValue always had more bits set than SmallValue.

We used to just miss the transformation, but a recent refactoring of
mine turned this into an assertion failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 22:05:51 +00:00
Sergey Dmitrouk
a8dc0ee520 Erase constant dbgloc on reuse in PHI node
Basic block selection involves checking successor BBs for PHI nodes
that depend on the current BB.  In case such BBs are found, the value
being selected is a constant and such constant already exists in
current BB, it's value is reused.

This might lead to wrong locations in some situations, especially if
same constant value ends up being materialized twice in two different
ways, which discards that sharing and leaves us with wrong debug
location in the successor BB.

In code this involves the following sequence of calls:

 SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks ->
 SelectionDAGBuilder::CopyValueToVirtualRegister ->
 SelectionDAGBuilder::getNonRegisterValue

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239089 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 20:48:40 +00:00
Andrea Di Biagio
c07ee0c4ff [DAGCombiner] Fix wrong folding of a build_vector into a blend with zero.
Method 'visitBUILD_VECTOR' in the DAGCombiner knows how to combine a
build_vector of a bunch of extract_vector_elt nodes and constant zero nodes
into a shuffle blend with a zero vector.

However, method 'visitBUILD_VECTOR' forgot that a floating point
build_vector may contain negative zero as well as positive zero.

Example:

define <2 x double> @example(<2 x double> %A) {
entry:
  %0 = extractelement <2 x double> %A, i32 0
  %1 = insertelement <2 x double> undef, double %0, i32 0
  %2 = insertelement <2 x double> %1, double -0.0, i32 1
  ret <2 x double> %2
}

Before this patch, llc (with -mattr=+sse4.1) wrongly generated
  movq   %xmm0, %xmm0  # xmm0 = xmm0[0],zero

So, the sign bit of the negative zero was effectively lost.

This patch fixes the problem by adding explicit checks for positive zero.

With this patch, llc produces the following code for the example above:
  movhpd .LCPI0_0(%rip), %xmm0

where .LCPI0_0 referes to a 'double -0'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239070 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 19:15:01 +00:00
Benjamin Kramer
b0ed8b72ef [SDag switch lowering] Simplify code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 17:07:59 +00:00
Matt Arsenault
a1f2f389f6 Pass address space to isLegalAddressingMode in DAGCombiner
No test because I don't know of a target that makes use
of address spaces and indexed load / store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239051 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 16:17:34 +00:00
Hans Wennborg
bebb0b5a34 Switch lowering: fix assert in buildBitTests (PR23738)
When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated
to the size of the left-hand side. In the case of this PR, the left-hand
side was i4, so BitWidth=64 got truncated to 0 and the assert failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:55:00 +00:00
James Molloy
cd2647f4fd Don't create a MIN/MAX node if the underlying compare has more than one use.
If the compare in a select pattern has another use then it can't be removed, so we'd just
be creating repeated code if we created a min/max node.

Spotted by Matt Arsenault!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239037 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 13:48:23 +00:00
Sanjoy Das
8fadf8f4d3 [SelectionDAG] Fix PR23603.
Summary:
LLVM's MI level notion of invariant_load is different from LLVM's IR
level notion of invariant_load with respect to dereferenceability.  The
IR notion of invariant_load only guarantees that all *non-faulting*
invariant loads result in the same value.  The MI notion of invariant
load guarantees that the load can be legally moved to any location
within its containing function.  The MI notion of invariant_load is
stronger than the IR notion of invariant_load -- an MI invariant_load is
an IR invariant_load + a guarantee that the location being loaded from
is dereferenceable throughout the function's lifetime.

Reviewers: hfinkel, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10075

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-02 22:33:30 +00:00
Chandler Carruth
89a133960b [sdag] Add the helper I most want to the DAG -- building a bitcast
around a value using its existing SDLoc.

Start using this in just one function to save omg lines of code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 04:14:10 +00:00
Jim Grosbach
586c0042da MC: Clean up MCExpr naming. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 01:25:56 +00:00
Fiona Glaser
dbf84c95fe SelectionDAG: fix logic for promoting shift types
r238503 fixed the problem of too-small shift types by promoting them
during legalization, but the correct solution is to promote only the
operands that actually demand promotion.

This fixes a crash on an out-of-tree target caused by trying to
promote an operand that can't be promoted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238632 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 23:37:22 +00:00
Benjamin Kramer
9589ff8949 Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238602 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 19:43:39 +00:00
Reid Kleckner
5f50442d79 [WinEH] Start inserting state number stores for C++ EH
This moves all the state numbering code for C++ EH to WinEHPrepare so
that we can call it from the X86 state numbering IR pass that runs
before isel.

Now we just call the same state numbering machinery and insert a bunch
of stores. It also populates MachineModuleInfo with information about
the current function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 22:00:24 +00:00
David Majnemer
81f64c04d7 [SelectionDAG] Scalar shift amounts may require legalization
The shift amount may be too small to cope with promoted left hand side,
make sure to promote it as well.

This fixes PR23664.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 21:29:59 +00:00
Jan Vesely
72be0e4224 SelectionDAG: Don't do libcall on div/rem if divrem is custom
v2: TargetLoweringBase:: -> TargetLowering::
    Use Ops array
v3: Explicitly use value 0 for ?DIV
    Remove redundant newline

Differential revision: http://reviews.llvm.org/D7803
reviewer: ab

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 16:54:09 +00:00
Elena Demikhovsky
17b7d6bf25 Added promotion to EXTRACT_SUBVECTOR operand.
I encountered with this case in one of KNL tests for i1 vectors.
v16i1 = EXTRACT_SUBVECTOR v32i1, x



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238130 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-25 11:33:13 +00:00
Matt Arsenault
f44ed0919c Add target hook to allow merging stores of nonzero constants
On GPU targets, materializing constants is cheap and stores are
expensive, so only doing this for zero vectors was silly.

Most of the new testcases aren't optimally merged, and are for
later improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 00:51:27 +00:00
Duncan P. N. Exon Smith
ec8c491a06 SDAG: Give SDDbgValues their own allocator (and reset it)
Previously `SDDbgValue`s used the general allocator that lives for all
of `SelectionDAG`.  Instead, give them their own allocator, and reset it
whenever `SDDbgInfo::clear()` is called, plugging a spiritual leak.

This drops `SelectionDAGBuilder::visitIntrinsicCall()` off of my heap
profile (was at around 2% of `llc` for codegen of `-flto -g`).  Thanks
to Pete Cooper for spotting the problem and suggesting the fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 05:45:19 +00:00
Duncan P. N. Exon Smith
73993abb6c SDAG: Cleanup initialization of SDDbgValue, NFC
Cleanup how `SDDbgValue` is initialized, and rearrange the fields to
save two pointers in the struct layout.  No real functionality change
though (and I doubt the memory savings would show up in a profile).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237997 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 05:35:53 +00:00
Simon Pilgrim
87d1836793 [X86][SSE] Improve support for 128-bit vector sign extension
This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization).

It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner.

Differential Revision: http://reviews.llvm.org/D9848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 10:05:03 +00:00
Andrew Kaylor
008a1efecf Fix build warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:28:03 +00:00
Andrew Kaylor
d0f4ffa472 [WinEH] C++ EH state numbering fixes
Differential Revision: http://reviews.llvm.org/D9787



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:22:24 +00:00
Matthias Braun
fa3d0dc026 DAGCombiner: Continue combining if FoldConstantArithmetic() fails.
DAG.FoldConstantArithmetic() can fail even though both operands are
Constants if OpaqueConstants are involved. Continue trying other combine
possibilities in tis case.

Differential Revision: http://reviews.llvm.org/D6946

Somewhat related to PR21801 / rdar://19211454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 18:54:02 +00:00
Pawel Bylica
12f6308247 Fix icmp lowering
Summary:
During icmp lowering it can happen that a constant value can be larger than expected (see the code around the change).
APInt::getMinSignedBits() must be checked again as the shift before can change the constant sign to positive.
I'm not sure it is the best fix possible though.

Test Plan: Regression test included.

Reviewers: resistor, chandlerc, spatel, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D9147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237812 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 17:21:09 +00:00
Pete Cooper
9584e07a9c Change Function::getIntrinsicID() to return an Intrinsic::ID. NFC.
Now that Intrinsic::ID is a typed enum, we can forward declare it and so return it from this method.

This updates all users which were either using an unsigned to store it, or had a now unnecessary cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237810 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 17:16:39 +00:00
Igor Laevsky
efab5a1dfa [StatepointLowering] Support of the gc.relocates for invoke statepoints.
This change implements support for lowering of the gc.relocates tied to the invoke statepoint.
This is acomplished by storing frame indices of the lowered values in "StatepointRelocatedValues" map inside FunctionLoweringInfo instead of storing them in per-basic block structure StatepointLowering.
After this change StatepointLowering is used only during "LowerStatepoint" call and it is not necessary to store it as a field in SelectionDAGBuilder anymore.

Differential Revision: http://reviews.llvm.org/D7798


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 11:37:25 +00:00
Philip Reames
486f97bf19 Remove a stale comment
The todo was implemented a while ago; I just forgot to remove the comment.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 22:26:33 +00:00
Sanjay Patel
041ab65fcd use 'auto *' for pointers; clearer usage, no deep copying
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 20:10:16 +00:00
Sanjay Patel
0f9fcd22b3 tidy up
1. remove duplicate local variable
2. add local variable with name to match comment
3. remove useless comment



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237715 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 19:10:57 +00:00
Sanjay Patel
f75a247286 use range-based for-loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 18:24:33 +00:00