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Author SHA1 Message Date
Artem Belevich
d049b69952 [NVPTX] Added run NVVMReflect pass to NVPTX back-end. 
The pass is needed to remove __nvvm_reflect calls when we link in
libdevice bitcode that comes with CUDA.

Differential Revision: http://reviews.llvm.org/D11663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247072 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 21:04:55 +00:00
Derek Schuff
484f98f066 Fix comments and RUN line in x86-64 stdarg test leftover from last commit 
From http://reviews.llvm.org/D12346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247070 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:58:41 +00:00
Derek Schuff
0d89d696f4 x32. Fixes a bug in how struct va_list is initialized in x32 
Summary: This patch modifies X86TargetLowering::LowerVASTART so that
struct va_list is initialized with 32 bit pointers in x32. It also
includes tests that call @llvm.va_start() for x32.

Patch by João Porto

Subscribers: llvm-commits, hjl.tools
Differential Revision: http://reviews.llvm.org/D12346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247069 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:51:31 +00:00
Kostya Serebryany
88d071c626 [libFuzzer] remove a piece of stale code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247067 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:40:10 +00:00
Kostya Serebryany
e96dc98acb [libFuzzer] be more robust when dealing with files on disk (e.g. don't crash if a file was there but disappeared) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247066 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:36:33 +00:00
Dan Gohman
21b2bb4054 [WebAssembly] Support running without a register allocator in the default CodeGen passes 
This allows backends which don't use a traditional register allocator,
but do need PHI lowering and other passes, to use the default
TargetPassConfig::addFastRegAlloc and
TargetPassConfig::addOptimizedRegAlloc implementations.

Differential Revision: http://reviews.llvm.org/D12691


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247065 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:36:33 +00:00
Matt Arsenault
55478a8b79 Add const overload of findRegisterUseOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247063 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:21:29 +00:00
Vedant Kumar
b74d92d82d [docs] Update documentation for the landingpad instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247062 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:16:35 +00:00
Sanjay Patel
8a6f3c5646 refactor matches for De Morgan's Laws; NFCI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247061 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 20:14:13 +00:00
Matt Arsenault
55ec9f281c AMDGPU: Mark s_barrier as a high latency instruction 
These were marked as WriteSALU, which is low latency.
I'm guessing at the value to use, but it should probably
be considered the highest latency instruction.

I'm not sure this has any actual effect since hasSideEffects
probably is preventing any moving of these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247060 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 19:54:32 +00:00
Matt Arsenault
33f41ffd1f AMDGPU: Fix s_barrier flags 
This should be convergent. This is not a
barrier in the isBarrier sense, nor
hasCtrlDep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247059 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 19:54:25 +00:00
Derek Schuff
c76507d03c x32. Fixes a bug in i8mem_NOREX declaration. 
The old implementation assumed LP64 which is broken for x32.  Specifically, the
MOVE8rm_NOREX and MOVE8mr_NOREX, when selected, would cause a 'Cannot emit
physreg copy instruction' error message to be reported.

This patch also enable the h-register*ll tests for x32.

Differential Revision: http://reviews.llvm.org/D12336

Patch by João Porto

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247058 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 19:47:15 +00:00
Matt Arsenault
626338d11e AMDGPU: Handle sub of constant for DS offset folding 
sub C, x - > add (sub 0, x), C for DS offsets.

This is mostly to fix regressions that show up when
SeparateConstOffsetFromGEP is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247054 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 19:34:22 +00:00
Diego Novillo
965f2c2437 Fix PR 24723 - Handle 0-mass backedges in irreducible loops 
This corner case happens when we have an irreducible SCC that is
deeply nested.  As we work down the tree, the backedge masses start
getting smaller and smaller until we reach one that is down to 0.

Since we distribute the incoming mass using the backedge masses as
weight, the distributor does not allow zero weights.  So, we simply
ignore them (which will just use the weights of the non-zero nodes).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247050 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 19:22:17 +00:00
Davide Italiano
5bd1a50ca2 [MC/ELF] Accept zero for .align directive 
.align directive refuses alignment 0 -- a comment in the code hints this is
done for GNU as compatibility, but it seems GNU as accepts .align 0
(and silently rounds up alignment to 1).

Differential Revision:	 http://reviews.llvm.org/D12682


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247048 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:59:47 +00:00
David Blaikie
46f5c11bed Fix CPP Backend for GEP API changes for opaque pointer types 
Based on a patch by Jerome Witmann.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247047 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:42:29 +00:00
Benjamin Kramer
8f85748178 Merge or combine tests and convert to FileCheck. 
- Move tests only exercising instsimplify to instsimplify's apint-or.ll
- Actually test the CHECK lines in instsimplify's apint-or.ll
- Merge the remaining tests in apint-or1.ll and apint-or2.ll, use FileCheck

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247045 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:36:56 +00:00
Evgeniy Stepanov
242f547927 Fix isDiscardableIfUnused to include available_externally linkage. 
AvailableExternally functions are discardable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247044 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:25:20 +00:00
Sanjay Patel
20a294ea5b remove function names from comments; NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247043 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:24:36 +00:00
Andrew Kaylor
b25ffb37c6 Fix for bz24500: Avoid non-deterministic code generation triggered by the x86 call frame optimization 
Patch by Dave Kreitzer

Differential Revision: http://reviews.llvm.org/D12620



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247042 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:18:46 +00:00
Sanjay Patel
16098c386c add tests for De Morgan instcombines based on PR22723 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247040 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 18:13:03 +00:00
Sanjay Patel
c832b3af78 fix typos, remove noise; NFCI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247035 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:58:22 +00:00
Kostya Serebryany
828d315fd6 [libFuzzer] better documentatio for -save_minimized_corpus=1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247033 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:43:51 +00:00
Vedant Kumar
32a41ddf2d [Bitcode] Add compatibility test for llvm 3.7.0 
This patch adds llvm-3.7 IR and generated bitcode for our compatibility
test (in accordance with the developer policy).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247031 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:39:21 +00:00
Kostya Serebryany
06465a68cc [libFuzzer] remove -iterations as redundant (there is also -num_runs) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247030 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:30:35 +00:00
JF Bastien
13b1346197 WebAssembly: NFC rename shr/sar 
Renamed from: https://github.com/WebAssembly/design/pull/332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247028 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:21:21 +00:00
Kostya Serebryany
872c556fa8 [libFuzzer] add one more mutator: Mutate_ChangeASCIIInteger 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247027 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 17:19:31 +00:00
Jun Bum Lim
3d88beedef Remove white space (test commit) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247021 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 16:11:22 +00:00
Zoran Jovanovic
7e31683981 [mips][microMIPS] Implement LLE, LUI, LW and LWE instructions 
Differential Revision: http://reviews.llvm.org/D1179


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247017 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 15:02:50 +00:00
Dan Gohman
5710177500 [WebAssembly] Temporarily disable this test, as it depends on additional patches that aren't yet checked in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247011 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 13:21:12 +00:00
Igor Breger
b23094366e AVX512: kunpck encoding implementation 
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D12061

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247010 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 13:10:00 +00:00
Dan Gohman
2e6ca7df3a [WebAssembly] Enable SSA lowering and other pre-regalloc passes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247008 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 12:39:25 +00:00
Elena Demikhovsky
1c82e5f791 Removed an old comment, NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247006 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 12:22:22 +00:00
Alex Lorenz
0aeea88439 MIRLangRef: Add documentation for the subregister indices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247005 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 11:39:47 +00:00
Alex Lorenz
1fd577388c MIRLangRef: Add documentation for the global value machine operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247004 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 11:38:16 +00:00
Zoran Jovanovic
3acfef5bd3 [mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructions 
Differential Revision: http://reviews.llvm.org/D11801


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246999 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 10:18:38 +00:00
Jakub Kuderski
df54160123 There is a trunc(lshr (zext A), Cst) optimization in InstCombineCasts that 
removes cast by performing the lshr on smaller types. However, currently there
is no trunc(lshr (sext A), Cst) variant.
This patch add such optimization by transforming trunc(lshr (sext A), Cst)
to ashr A, Cst.

Differential Revision: http://reviews.llvm.org/D12520


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246997 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 10:03:17 +00:00
Daniel Sanders
41517aa3f4 [mips] Reserve address spaces 1-255 for software use. 
Summary: And define them to have noop casts with address spaces 0-255.

Reviewers: pekka.jaaskelainen

Subscribers: pekka.jaaskelainen, llvm-commits

Differential Revision: http://reviews.llvm.org/D12678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246990 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 09:07:03 +00:00
Zoran Jovanovic
0697651ac5 [mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit LBU16, LHU16, LW16, LWGP and LWSP instructions 
Differential Revision: http://reviews.llvm.org/D10956


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246987 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 08:25:34 +00:00
NAKAMURA Takumi
7341392080 [CMake][CMP0051] Avoid for user of objlib to use llvm_update_compile_flags(). 
$<TARGET_OBJECTS> shouldn't require compile flags. Flags are set in obj.${name}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246984 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 07:42:06 +00:00
Elena Demikhovsky
27828d7a5e compilation issue, NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246983 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 07:34:06 +00:00
Elena Demikhovsky
758b9df87a fixed compilation issue, NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246982 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 07:10:08 +00:00
Elena Demikhovsky
1e00496f88 AVX-512: Lowering for 512-bit vector shuffles. 
Vector types: <8 x 64>, <16 x 32>, <32 x 16> float and integer.

Differential Revision: http://reviews.llvm.org/D10683



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246981 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-08 06:38:21 +00:00
Davide Italiano
2206b4bc38 [llvm-readobj] Shrink code a little bit. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246976 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 20:47:03 +00:00
Sanjay Patel
c9e28b8434 add missing regression tests for De Morgan's Law transform in InstCombine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246973 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 19:00:38 +00:00
Zoran Jovanovic
11768ab081 [mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt, FLOOR.W.fmt, TRUNC.L.fmt, TRUNC.W.fmt, RSQRT.fmt and SQRT.fmt instructions 
Differential Revision: http://reviews.llvm.org/D11674


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246968 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 13:01:04 +00:00
Zoran Jovanovic
75a08f5633 [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions 
Differential Revision: http://reviews.llvm.org/D11181


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246963 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 11:56:37 +00:00
John Brawn
1c9fa60e24 [ARM] Get rid of SelectT2ShifterOperandReg, NFC 
SelectT2ShifterOperandReg has identical behaviour to SelectImmShifterOperand,
so get rid of it and use SelectImmShifterOperand instead.

Differential Revision: http://reviews.llvm.org/D12195


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246962 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 11:45:18 +00:00
Zoran Jovanovic
f390c2eb39 [mips][microMIPS] Implement CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, MAX.fmt, MIN.fmt, MAXA.fmt, MINA.fmt and CMP.condn.fmt instructions 
Differential Revision: http://reviews.llvm.org/D12141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246960 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 10:31:31 +00:00
David Majnemer
a35911994e CODE_OWNERS.TXT is supposed to be sorted by surname 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246954 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-09-07 00:41:40 +00:00