107792 Commits

Author SHA1 Message Date
Andrew V. Tischenko
d1f487bc59 Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own.
Differential Revision: https://reviews.llvm.org/D39546


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317330 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 15:25:13 +00:00
Anna Thomas
c9ed638d21 [LoopPredication] NFC: Refactored code to separate out functions being reused
Summary:
Refactored the code to separate out common functions that are being
reused.
This is to reduce the changes for changes coming up wrt loop
predication with reverse loops.

This refactoring is what we have in our downstream code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317324 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 14:25:39 +00:00
Mikael Holmen
9e5188ca17 [ADCE] Use MapVector for BlockInfo to make iteration order deterministic
Summary:
Also added a reserve() method to MapVector since we want to use that from
ADCE.

DenseMap does not provide deterministic iteration order so with that
we will handle the members of BlockInfo in random order, eventually
leading to random order of the blocks in the predecessor lists.

Without this change, I get the same predecessor order in about 90% of the
time when I compile a certain reproducer and in 10% I get a different one.

No idea how to make a proper test case for this.

Reviewers: kuhar, david2050

Reviewed By: kuhar

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317323 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 14:15:08 +00:00
Clement Courbet
3d456013b6 re-land [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass."
Fix undefined references: ExpandMemCmp belongs to CodeGen/, not Scalar/.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317318 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 12:12:27 +00:00
Simon Pilgrim
eb7c044ce9 [X86][SSE] Add PACKUS support to combineVectorTruncation
Similar to the existing code to lower to PACKSS, we can use PACKUS if the input vector's leading zero bits extend all the way to the packed/truncated value.

We have to account for pre-SSE41 targets not supporting PACKUSDW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317315 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 11:33:48 +00:00
Florian Hahn
6cd2a99eb6 [PartialInliner] Skip call sites where inlining fails.
Summary:
InlineFunction can fail, for example when trying to inline vararg
fuctions. In those cases, we do not want to bump partial inlining
counters or set AnyInlined to true, because this could leave an unused
function hanging around.

Reviewers: davidxl, davide, gyiu

Reviewed By: davide

Subscribers: llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D39581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317314 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 11:29:00 +00:00
Diana Picus
5281112161 [ARM GlobalISel] Move the check for Thumb higher up
We're currently bailing out for Thumb targets while lowering formal
parameters, but there used to be some other checks before it, which
could've caused some functions (e.g. those without formal parameters) to
sneak through unnoticed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317312 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 10:30:12 +00:00
Ivan A. Kosarev
74ecc3ab6b [Analysis] Refine matching and merging of TBAA tags
This patch combines the code that matches and merges TBAA access
tags. The aim is to simplify future changes and making sure that
these operations produce consistent results.

Differential Revision: https://reviews.llvm.org/D39463


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317311 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 10:26:25 +00:00
Francis Visoiu Mistrih
ba9125e489 [PEI] Simplify handling of targets with no phys regs. NFC
Make doSpillCalleeSavedRegs a member function, instead of passing most of the
members of PEI as arguments.

Differential Review: https://reviews.llvm.org/D35642

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317309 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 09:46:36 +00:00
Martin Storsjo
19a3ba35df [AArch64] Use dwarf exception handling on MinGW
Ideally we should probably produce WinEH here as well, but until
then, we can use dwarf exceptions, without any further changes
required in clang, libunwind or libcxxabi.

Differential Revision: https://reviews.llvm.org/D39535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317304 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 07:33:20 +00:00
Craig Topper
c43a693efb [X86] Remove PALIGNR/VALIGN handling from combineBitcastForMaskedOp and move to isel patterns instead. Prefer 128-bit VALIGND/VALIGNQ over PALIGNR during lowering when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317299 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 06:48:02 +00:00
Vedant Kumar
931b302025 [LSR] Clarify a comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317295 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 01:01:28 +00:00
Sriraman Tallam
1bd292583c Avoid PLT for external calls when attribute nonlazybind is used.
Differential Revision: https://reviews.llvm.org/D39065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317292 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-03 00:10:19 +00:00
Vedant Kumar
b57c6f4150 [Verifier] Remove the -verify-debug-info cl::opt
This cl::opt has been dead for a while. It's no longer possible to run
the verifier without also verifying debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317288 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:44:20 +00:00
Quentin Colombet
d8375d7368 [AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
This fixes http://llvm.org/PR32560. We were missing a description for
half floating point type and as a result were using the FPR 32 mapping.
Because of the size mismatch the generic code was complaining that the
default mapping is not appropriate. Fix the mapping description so that
the default mapping can be properly applied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317287 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:38:19 +00:00
Quentin Colombet
87cdca2231 [AArch64][RegisterBankInfo] Add FPR16 support in value mapping.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317286 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:38:13 +00:00
Puyan Lotfi
0ae3f32f56 mir-canon: First commit.
mir-canon (MIRCanonicalizerPass) is a pass designed to reorder instructions and
rename operands so that two similar programs will diff more cleanly after being
run through mir-canon than they would otherwise. This project is still a work
in progress and there are ideas still being discussed for improving diff
quality.

M    include/llvm/InitializePasses.h
M    lib/CodeGen/CMakeLists.txt
M    lib/CodeGen/CodeGen.cpp
A    lib/CodeGen/MIRCanonicalizerPass.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317285 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:37:32 +00:00
Craig Topper
6d06c89303 [X86] Give AVX512VL instructions priority over their AVX equivalents.
I thought we had gotten all these priority bugs worked out, but I guess not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317283 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:23:37 +00:00
Adrian Prantl
a555cf0683 IndVarSimplify: preserve debug information attached to widened PHI nodes.
This fixes PR35015.

https://bugs.llvm.org/show_bug.cgi?id=35015

Differential Revision: https://reviews.llvm.org/D39345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317282 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 23:17:06 +00:00
Konstantin Zhuravlyov
f79fab6f98 AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317280 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 22:35:22 +00:00
Hiroshi Yamauchi
dd33e177dd Irreducible loop metadata for more accurate block frequency under PGO.
Summary:
Currently the block frequency analysis is an approximation for irreducible
loops.

The new irreducible loop metadata is used to annotate the irreducible loop
headers with their header weights based on the PGO profile (currently this is
approximated to be evenly weighted) and to help improve the accuracy of the
block frequency analysis for irreducible loops.

This patch is a basic support for this.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: mehdi_amini, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D39028

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317278 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 22:26:51 +00:00
Krzysztof Parzyszek
da35e5e8be [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr
If the offset is an immediate, avoid putting it in a register
to get Rs+Rt<<#0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317275 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 21:56:59 +00:00
Anna Thomas
b69a2a9ae3 [LoopPredication] Enable predication when latchCheckIV is wider than rangeCheck
Summary:
This patch allows us to predicate range checks that have a type narrower than
the latch check type. We leverage SCEV analysis to identify a truncate for the
latchLimit and latchStart.
There is also safety checks in place which requires the start and limit to be
known at compile time. We require this to make sure that the SCEV truncate expr
for the IV corresponding to the latch does not cause us to lose information
about the IV range.
Added tests show the loop predication over range checks that are of various
types and are narrower than the latch type.
This enhancement has been in our downstream tree for a while.

Reviewers: apilipenko, sanjoy, mkazantsev

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317269 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 21:21:02 +00:00
Konstantin Zhuravlyov
37bbee84d8 AMDGPU: Remove outdated fixme (it was already fixed)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 20:48:06 +00:00
Craig Topper
2bbdf00230 [X86] Simplify the pentium4 code in getHostCPUName to be based on feature flags. Don't use 'x86-64' ever.
'x86-64' has started to reflect a sort of generic tuning flag for more modern 64-bit CPUs. We probably shouldn't be using it as the name of an unidentifiable pentium4. So use nocona for all 64-bit pentium4s instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317230 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 19:13:34 +00:00
Craig Topper
161385fddd [X86] Change getHostCPUName fallback code to not select 'x86-64' for unknown CPUs in family 6 that has 64-bit support but not any newer SSE features. Use 'core2' instead
We know that's the earliest CPU with 64-bit support. x86-64 has taken on a role of representing a more modern 64-bit CPU so we probably shouldn't be using that when we can't identify things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317229 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 19:13:32 +00:00
Anna Thomas
0c059eff81 Strip off invariant.start because memory locations arent invariant
The original change was reverted in rL317217 because of the failure in
the RS4GC testcase. I couldn't reproduce the failure on my local machine
(macbook) but could reproduce it on a linux box.

The failure was around removing the uses of invariant.start. The fix
here is to just RAUW undef (which was the first implementation in D39388).
This is perfectly valid IR as discussed in the review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317225 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 18:24:04 +00:00
Anna Thomas
685fd43490 Revert "[RS4GC] Strip off invariant.start because memory locations arent invariant"
This reverts commit r317215, investigating the test failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 16:45:51 +00:00
Anna Thomas
2880b72d32 [RS4GC] Strip off invariant.start because memory locations arent invariant
Summary:
Invariant.start on memory locations has the property that the memory
location is unchanging. However, this is not true in the face of
rewriting statepoints for GC.
Teach RS4GC about removing invariant.start so that optimizations after
RS4GC does not incorrect sink a load from the memory location past a
statepoint.

Added test showcasing the issue.

Reviewers: reames, apilipenko, dneilson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317215 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 16:23:31 +00:00
Clement Courbet
c022286730 Revert "[ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass."
undefined reference to `llvm::TargetPassConfig::ID' on
clang-ppc64le-linux-multistage

This reverts commit eea333c33fa73ad225ef28607795984829f65688.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317213 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 15:53:10 +00:00
Clement Courbet
f08c3d1d13 [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass.
Summary:
This is mostly a noop (most of the test diffs are renamed blocks).
There are a few temporary register renames (eax<->ecx) and a few blocks are
shuffled around.

See the discussion in PR33325 for more details.

Reviewers: spatel

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D39456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317211 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 15:02:51 +00:00
Ayman Musa
a223e90991 [X86] Fix bug in legalize vector types - Split large loads
When splitting a large load to smaller legally-typed loads, the last load should be padded to reach the size of the previous one so a CONCAT_VECTORS node could reunite them again.
The code currently pads the last load to reach the size of the first load (instead of the previous).

Differential Revision: https://reviews.llvm.org/D38495

Change-Id: Ib60b55ed26ce901fabf68108daf52683fbd5013f

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317206 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 13:07:06 +00:00
Simon Dardis
652842ec9a [mips] Use register scavenging with MSA.
MSA stores and loads to the stack are more likely to require an
emergency GPR spill slot due to the smaller offsets available
with those instructions.

Handle this by overestimating the size of the stack by determining
the largest offset presuming that all callee save registers are
spilled and accounting of incoming arguments when determining
whether an emergency spill slot is required.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D39056


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317204 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 12:47:22 +00:00
Sam McCall
66af8bde13 Temporary workaround for msan false positive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317203 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 12:29:47 +00:00
Yichao Yu
52f6f2ce7b Allow inaccessiblememonly and inaccessiblemem_or_argmemonly to be overwriten on call site with operand bundle
Summary:
Similar to argmemonly, readonly and readnone.

Fix PR35128

Reviewers: andrew.w.kaylor, chandlerc, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D39434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317201 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 12:18:33 +00:00
Francis Visoiu Mistrih
4352a046c5 [AsmPrinterDwarf] Add support for .cfi_restore directive
As of today we only use .cfi_offset to specify the offset of a CSR, but
we never use .cfi_restore when the CSR is restored.

If we want to perform a more advanced type of shrink-wrapping, we need
to use .cfi_restore in order to switch the CFI state between blocks.

This patch only aims at adding support for the directive.

Differential Revision: https://reviews.llvm.org/D36114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317199 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 12:00:58 +00:00
Bjorn Pettersson
1e702fd905 [SimplifyCFG] Discard speculated dbg intrinsics
Summary:
SpeculativelyExecuteBB can flatten the CFG by doing
speculative execution followed by a select instruction.
When the speculatively executed BB contained dbg intrinsics
the result could be a little bit weird, since those dbg
intrinsics were inserted before the select in the flattened
CFG. So when single stepping in the debugger, printing the
value of the variable referenced in the dbg intrinsic, it
could happen that it looked like the variable had values
that never actually were assigned to the variable.

This patch simply discards all dbg intrinsics that were found
in the speculatively executed BB.

Reviewers: aprantl, chandlerc, craig.topper

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317198 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 11:55:14 +00:00
Sam Parker
b7c0518566 [ARM] and, or, xor and add with shl combine
The generic dag combiner will fold:

(shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
(shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)

This can create constants which are too large to use as an immediate.
Many ALU operations are also able of performing the shl, so we can
unfold the transformation to prevent a mov imm instruction from being
generated.

Other patterns, such as b + ((a << 1) | 510), can also be simplified
in the same manner.

Differential Revision: https://reviews.llvm.org/D38084


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317197 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 10:43:10 +00:00
Andrew V. Tischenko
4746ebdd8b The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR, VPERMILx, VBROADCASTx, etc.
PR32857 should be closed.
Differential Revision: https://reviews.llvm.org/D39227


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317196 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 10:33:41 +00:00
Craig Topper
fb073aa062 [X86] Remove the model checks from the 486 detection code in Host.cpp
This just provided a bunch of comments to read and not much else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 03:32:50 +00:00
Craig Topper
c5a51cfc34 [X86] Simplify the detection of pentium-mmx in Host.cpp.
Rather than looking at model numbers just check for the mmx feature flag. While there promote INTEL_PENTIUM_MMX to a CPU type instead of a subtype so that we don't have weird type with only one subtype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317184 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-02 03:32:49 +00:00
Jake Ehrlich
9ae2da659f [yaml2obj][ELF] Add support for setting alignment in program headers
Sometimes program headers have larger alignments than any of the
sections they contain. Currently yaml2obj can't produce such files. A
bug recently appeared in llvm-objcopy that failed in such a case. I'd
like to be able to add tests to llvm-objcopy for such cases.

This change adds an optional alignment parameter to program headers that
will be used instead of calculating the alignment.

Differential Revision: https://reviews.llvm.org/D39130

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317139 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 23:14:48 +00:00
Adrian Prantl
368924ad91 loop-unroll: teach remapInstruction to update dbg.value intrinsics.
Fixes PR35112.

https://bugs.llvm.org/show_bug.cgi?id=35112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317138 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 23:12:35 +00:00
Petar Jovanovic
5616b72dcf Revert "Correct dwarf unwind information in function epilogue for X86"
This reverts r317100 as it introduced sanitizer-x86_64-linux-autoconf
buildbot failure (build #15606).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317136 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 23:05:52 +00:00
whitequark
8b4e833a6e [LLVM-C] Expose functions to create debug locations via DIBuilder.
These include:
  * Several functions for creating an LLVMDIBuilder,
  * LLVMDIBuilderCreateCompileUnit,
  * LLVMDIBuilderCreateFile,
  * LLVMDIBuilderCreateDebugLocation.

Patch by Harlan Haskins.

Differential Revision: https://reviews.llvm.org/D32368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317135 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 22:18:52 +00:00
Craig Topper
01dd53d4bd [X86] Use foreach in X86.td to combine some of the CPU names that are obviously aliases. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317134 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 22:15:49 +00:00
Craig Topper
3f1a9263fc [X86] Add CMOV feature to 'i686' processor, making it a proper alias of pentiumpro which I believe it should be.
This is consistent with current gcc behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317133 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 22:15:40 +00:00
Daniel Sanders
8ec459f49c [globalisel][regbank] Warn about MIR ambiguities when register bank/class names clash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317132 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 22:13:05 +00:00
Simon Pilgrim
d005962cad [X86][SSE] Add PACKUS support to LowerTruncate
Similar to the existing code to lower to PACKSS, we can use PACKUS if the input vector's leading zero bits extend all the way to the packed/truncated value.

We have to account for pre-SSE41 targets not supporting PACKUSDW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317128 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 21:52:29 +00:00
Rui Ueyama
7f53f83a3c Rewrite FileOutputBuffer as two separate classes.
This patch is to rewrite FileOutputBuffer as two separate classes;
one for file-backed output buffer and the other for memory-backed
output buffer. I think the new code is easier to follow because two
different implementations are now actually separated as different
classes.

Unlike the previous implementation, the class that does not replace the
final output file using rename(2) does not create a temporary file at
all. Instead, it allocates memory using mmap(2) and use it. I think
this is an improvement because it is now guaranteed that the temporary
memory region doesn't trigger any I/O and there's now zero chance to
leave a temporary file behind. Also, it shouldn't impose new restrictions
because were using mmap IO too.

Differential Revision: https://reviews.llvm.org/D39449

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 21:38:14 +00:00